[PATCH glibc] Define PC, SP and SYSRETURN for hurd x86_64

[PATCH glibc] Define PC, SP and SYSRETURN for hurd x86_64

[Flavio Cruz]

Moved thread_state.h to x86 directory since we only need to customize
those 3 definitions.
---
 sysdeps/mach/{i386 => x86}/thread_state.h | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)
 rename sysdeps/mach/{i386 => x86}/thread_state.h (90%)

diff --git a/sysdeps/mach/i386/thread_state.h b/sysdeps/mach/x86/thread_state.h
similarity index 90%
rename from sysdeps/mach/i386/thread_state.h
rename to sysdeps/mach/x86/thread_state.h
index 4e6ce1f7dd..5be0bec150 100644
--- a/sysdeps/mach/i386/thread_state.h
+++ b/sysdeps/mach/x86/thread_state.h
@@ -16,8 +16,8 @@
    License along with the GNU C Library; if not, see
    <https://www.gnu.org/licenses/>.  */
 
-#ifndef _MACH_I386_THREAD_STATE_H
-#define _MACH_I386_THREAD_STATE_H 1
+#ifndef _MACH_X86_THREAD_STATE_H
+#define _MACH_X86_THREAD_STATE_H 1
 
 #include <mach/machine/thread_status.h>
 
@@ -29,9 +29,15 @@
 
 #define machine_thread_state i386_thread_state
 
+#ifdef __x86_64__
+#define PC rip
+#define SP ursp
+#define SYSRETURN rax
+#else
 #define PC eip
 #define SP uesp
 #define SYSRETURN eax
+#endif
 
 #define MACHINE_THREAD_STATE_FIX_NEW(ts) do { \
 	asm ("mov %%cs, %w0" : "=q" ((ts)->cs)); \
@@ -50,4 +56,4 @@ struct machine_thread_all_state
 
 #include <sysdeps/mach/thread_state.h>
 
-#endif /* mach/i386/thread_state.h */
+#endif /* mach/x86/thread_state.h */
-- 
2.39.1

Re: [PATCH glibc] Define PC, SP and SYSRETURN for hurd x86_64

[Sergey Bugaev]

On Wed, Feb 15, 2023 at 9:17 AM Flavio Cruz <flaviocruz@gmail.com> wrote:
>
> Moved thread_state.h to x86 directory since we only need to customize
> those 3 definitions.

No, that won't be enough. We also need to customize those
MACHINE_THREAD_STATE_FLAVOR definitions to include the potential new
i386_FSGS_BASE_STATE that we were discussing recently [0].

[0] https://sourceware.org/pipermail/libc-alpha/2023-February/145528.html

I was just looking at this file yesterday and concluded the
MACHINE_THREAD_STATE_FLAVOR / MACHINE_NEW_THREAD_STATE_FLAVOR
abstraction cannot work as is for x86_64, because half of the time
it's used for indeed accessing registers like SP and PC, and other
times it's used to access TLS/TCB. So this needs to be two distinct
definitions, and all the users inside glibc have to be reworked.

So let's please not rush with moving this to x86/

Sergey

Re: [PATCH glibc] Define PC, SP and SYSRETURN for hurd x86_64

[Samuel Thibault]

Applied, thanks!

Flavio Cruz, le mer. 15 févr. 2023 01:16:38 -0500, a ecrit:
> Moved thread_state.h to x86 directory since we only need to customize
> those 3 definitions.
> ---
>  sysdeps/mach/{i386 => x86}/thread_state.h | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>  rename sysdeps/mach/{i386 => x86}/thread_state.h (90%)
> 
> diff --git a/sysdeps/mach/i386/thread_state.h b/sysdeps/mach/x86/thread_state.h
> similarity index 90%
> rename from sysdeps/mach/i386/thread_state.h
> rename to sysdeps/mach/x86/thread_state.h
> index 4e6ce1f7dd..5be0bec150 100644
> --- a/sysdeps/mach/i386/thread_state.h
> +++ b/sysdeps/mach/x86/thread_state.h
> @@ -16,8 +16,8 @@
>     License along with the GNU C Library; if not, see
>     <https://www.gnu.org/licenses/>.  */
>  
> -#ifndef _MACH_I386_THREAD_STATE_H
> -#define _MACH_I386_THREAD_STATE_H 1
> +#ifndef _MACH_X86_THREAD_STATE_H
> +#define _MACH_X86_THREAD_STATE_H 1
>  
>  #include <mach/machine/thread_status.h>
>  
> @@ -29,9 +29,15 @@
>  
>  #define machine_thread_state i386_thread_state
>  
> +#ifdef __x86_64__
> +#define PC rip
> +#define SP ursp
> +#define SYSRETURN rax
> +#else
>  #define PC eip
>  #define SP uesp
>  #define SYSRETURN eax
> +#endif
>  
>  #define MACHINE_THREAD_STATE_FIX_NEW(ts) do { \
>  	asm ("mov %%cs, %w0" : "=q" ((ts)->cs)); \
> @@ -50,4 +56,4 @@ struct machine_thread_all_state
>  
>  #include <sysdeps/mach/thread_state.h>
>  
> -#endif /* mach/i386/thread_state.h */
> +#endif /* mach/x86/thread_state.h */
> -- 
> 2.39.1
> 
> 

-- 
Samuel
---
Pour une évaluation indépendante, transparente et rigoureuse !
Je soutiens la Commission d'Évaluation de l'Inria.