* x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
@ 2023-09-21 14:38 Noah Goldstein
2023-09-21 14:39 ` Noah Goldstein
2023-10-04 18:48 ` Noah Goldstein
0 siblings, 2 replies; 12+ messages in thread
From: Noah Goldstein @ 2023-09-21 14:38 UTC (permalink / raw)
To: libc-alpha; +Cc: goldstein.w.n, hjl.tools, carlos
This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
common implementation: `strrchr-evex-base.S`.
The motivation is `strrchr-evex` needed to be refactored to not use
64-bit masked registers in preperation for AVX10.
Once vec-width masked register combining was removed, the EVEX and
EVEX512 implementations can easily be implemented in the same file
without any major overhead.
The net result is performance improvements (measured on TGL) for both
`strrchr-evex` and `strrchr-evex512`. Although, note there are some
regressions in the test suite and it may be many of the cases that
make the total-geomean of improvement/regression across bench-strrchr
are cold. The point of the performance measurement is to show there
are no major regressions, but the primary motivation is preperation
for AVX10.
Benchmarks where taken on TGL:
https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
Full check passes on x86.
---
sysdeps/x86_64/multiarch/strrchr-evex-base.S | 466 ++++++++++++-------
sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
3 files changed, 294 insertions(+), 565 deletions(-)
diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
index 58b2853ab6..2c98f07fca 100644
--- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
+++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
@@ -25,240 +25,354 @@
# include <sysdep.h>
# ifdef USE_AS_WCSRCHR
+# if VEC_SIZE == 64
+# define RCX_M cx
+# define kortestM kortestw
+# else
+# define RCX_M cl
+# define kortestM kortestb
+# endif
+
+# define SHIFT_REG VRCX
+# define VPCOMPRESS vpcompressd
# define CHAR_SIZE 4
-# define VPBROADCAST vpbroadcastd
-# define VPCMPEQ vpcmpeqd
-# define VPMINU vpminud
+# define VPMIN vpminud
# define VPTESTN vptestnmd
+# define VPTEST vptestmd
+# define VPBROADCAST vpbroadcastd
+# define VPCMPEQ vpcmpeqd
+# define VPCMP vpcmpd
# else
+# define SHIFT_REG VRDI
+# define VPCOMPRESS vpcompressb
# define CHAR_SIZE 1
-# define VPBROADCAST vpbroadcastb
-# define VPCMPEQ vpcmpeqb
-# define VPMINU vpminub
+# define VPMIN vpminub
# define VPTESTN vptestnmb
+# define VPTEST vptestmb
+# define VPBROADCAST vpbroadcastb
+# define VPCMPEQ vpcmpeqb
+# define VPCMP vpcmpb
+
+# define RCX_M VRCX
+# define kortestM KORTEST
# endif
-# define PAGE_SIZE 4096
+# define VMATCH VMM(0)
# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
+# define PAGE_SIZE 4096
.section SECTION(.text), "ax", @progbits
-/* Aligning entry point to 64 byte, provides better performance for
- one vector length string. */
-ENTRY_P2ALIGN (STRRCHR, 6)
-
- /* Broadcast CHAR to VMM(0). */
- VPBROADCAST %esi, %VMM(0)
+ /* Aligning entry point to 64 byte, provides better performance for
+ one vector length string. */
+ENTRY_P2ALIGN(STRRCHR, 6)
movl %edi, %eax
- sall $20, %eax
- cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
- ja L(page_cross)
+ /* Broadcast CHAR to VMATCH. */
+ VPBROADCAST %esi, %VMATCH
-L(page_cross_continue):
- /* Compare [w]char for null, mask bit will be set for match. */
- VMOVU (%rdi), %VMM(1)
+ andl $(PAGE_SIZE - 1), %eax
+ cmpl $(PAGE_SIZE - VEC_SIZE), %eax
+ jg L(cross_page_boundary)
- VPTESTN %VMM(1), %VMM(1), %k1
- KMOV %k1, %VRCX
- test %VRCX, %VRCX
- jz L(align_more)
-
- VPCMPEQ %VMM(1), %VMM(0), %k0
- KMOV %k0, %VRAX
- BLSMSK %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(ret)
-
- BSR %VRAX, %VRAX
+ VMOVU (%rdi), %VMM(1)
+ /* k0 has a 1 for each zero CHAR in YMM1. */
+ VPTESTN %VMM(1), %VMM(1), %k0
+ KMOV %k0, %VGPR(rsi)
+ test %VGPR(rsi), %VGPR(rsi)
+ jz L(aligned_more)
+ /* fallthrough: zero CHAR in first VEC. */
+L(page_cross_return):
+ /* K1 has a 1 for each search CHAR match in VEC(1). */
+ VPCMPEQ %VMATCH, %VMM(1), %k1
+ KMOV %k1, %VGPR(rax)
+ /* Build mask up until first zero CHAR (used to mask of
+ potential search CHAR matches past the end of the string). */
+ blsmsk %VGPR(rsi), %VGPR(rsi)
+ and %VGPR(rsi), %VGPR(rax)
+ jz L(ret0)
+ /* Get last match (the `and` removed any out of bounds matches). */
+ bsr %VGPR(rax), %VGPR(rax)
# ifdef USE_AS_WCSRCHR
leaq (%rdi, %rax, CHAR_SIZE), %rax
# else
- add %rdi, %rax
+ addq %rdi, %rax
# endif
-L(ret):
+L(ret0):
ret
-L(vector_x2_end):
- VPCMPEQ %VMM(2), %VMM(0), %k2
- KMOV %k2, %VRAX
- BLSMSK %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(vector_x1_ret)
-
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
- /* Check the first vector at very last to look for match. */
-L(vector_x1_ret):
- VPCMPEQ %VMM(1), %VMM(0), %k2
- KMOV %k2, %VRAX
- test %VRAX, %VRAX
- jz L(ret)
-
- BSR %VRAX, %VRAX
+ /* Returns for first vec x1/x2/x3 have hard coded backward
+ search path for earlier matches. */
+ .p2align 4,, 6
+L(first_vec_x1):
+ VPCMPEQ %VMATCH, %VMM(2), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* eax non-zero if search CHAR in range. */
+ and %VGPR(rcx), %VGPR(rax)
+ jnz L(first_vec_x1_return)
+
+ /* fallthrough: no match in YMM2 then need to check for earlier
+ matches (in YMM1). */
+ .p2align 4,, 4
+L(first_vec_x0_test):
+ VPCMPEQ %VMATCH, %VMM(1), %k1
+ KMOV %k1, %VGPR(rax)
+ test %VGPR(rax), %VGPR(rax)
+ jz L(ret1)
+ bsr %VGPR(rax), %VGPR(rax)
# ifdef USE_AS_WCSRCHR
leaq (%rsi, %rax, CHAR_SIZE), %rax
# else
- add %rsi, %rax
+
+ addq %rsi, %rax
# endif
+L(ret1):
+ ret
+
+ .p2align 4,, 10
+L(first_vec_x3):
+ VPCMPEQ %VMATCH, %VMM(4), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
+ and %VGPR(rcx), %VGPR(rax)
+ jz L(first_vec_x1_or_x2)
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
+ ret
+ .p2align 4,, 4
+
+L(first_vec_x2):
+ VPCMPEQ %VMATCH, %VMM(3), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
+ and %VGPR(rcx), %VGPR(rax)
+ jz L(first_vec_x0_x1_test)
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
ret
-L(align_more):
- /* Zero r8 to store match result. */
- xorl %r8d, %r8d
- /* Save pointer of first vector, in case if no match found. */
+ .p2align 4,, 6
+L(first_vec_x0_x1_test):
+ VPCMPEQ %VMATCH, %VMM(2), %k1
+ KMOV %k1, %VGPR(rax)
+ /* Check YMM2 for last match first. If no match try YMM1. */
+ test %VGPR(rax), %VGPR(rax)
+ jz L(first_vec_x0_test)
+ .p2align 4,, 4
+L(first_vec_x1_return):
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
+ ret
+
+ .p2align 4,, 12
+L(aligned_more):
+L(page_cross_continue):
+ /* Need to keep original pointer incase VEC(1) has last match. */
movq %rdi, %rsi
- /* Align pointer to vector size. */
andq $-VEC_SIZE, %rdi
- /* Loop unroll for 2 vector loop. */
- VMOVA (VEC_SIZE)(%rdi), %VMM(2)
+
+ VMOVU VEC_SIZE(%rdi), %VMM(2)
VPTESTN %VMM(2), %VMM(2), %k0
KMOV %k0, %VRCX
+ movq %rdi, %r8
test %VRCX, %VRCX
- jnz L(vector_x2_end)
+ jnz L(first_vec_x1)
+
+ VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
+ VPTESTN %VMM(3), %VMM(3), %k0
+ KMOV %k0, %VRCX
+
+ test %VRCX, %VRCX
+ jnz L(first_vec_x2)
+
+ VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
+ VPTESTN %VMM(4), %VMM(4), %k0
+ KMOV %k0, %VRCX
+
+ /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
+ padding for efficient nop before loop alignment. */
+ test %rcx, %rcx
+ jnz L(first_vec_x3)
- /* Save pointer of second vector, in case if no match
- found. */
- movq %rdi, %r9
- /* Align address to VEC_SIZE * 2 for loop. */
andq $-(VEC_SIZE * 2), %rdi
+ .p2align 4
+L(first_aligned_loop):
+ /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
+ gurantee they don't store a match. */
+ VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
+ VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
- .p2align 4,,11
-L(loop):
- /* 2 vector loop, as it provide better performance as compared
- to 4 vector loop. */
- VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
- VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
- VPCMPEQ %VMM(3), %VMM(0), %k1
- VPCMPEQ %VMM(4), %VMM(0), %k2
- VPMINU %VMM(3), %VMM(4), %VMM(5)
- VPTESTN %VMM(5), %VMM(5), %k0
- KOR %k1, %k2, %k3
- subq $-(VEC_SIZE * 2), %rdi
- /* If k0 and k3 zero, match and end of string not found. */
- KORTEST %k0, %k3
- jz L(loop)
-
- /* If k0 is non zero, end of string found. */
- KORTEST %k0, %k0
- jnz L(endloop)
-
- lea VEC_SIZE(%rdi), %r8
- /* A match found, it need to be stored in r8 before loop
- continue. */
- /* Check second vector first. */
- KMOV %k2, %VRDX
- test %VRDX, %VRDX
- jnz L(loop_vec_x2_match)
+ VPCMP $4, %VMM(5), %VMATCH, %k2
+ VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
+
+ VPMIN %VMM(5), %VMM(6), %VMM(7)
+
+ VPTEST %VMM(7), %VMM(7), %k1{%k3}
+ subq $(VEC_SIZE * -2), %rdi
+ kortestM %k1, %k1
+ jc L(first_aligned_loop)
+ VPTESTN %VMM(7), %VMM(7), %k1
KMOV %k1, %VRDX
- /* Match is in first vector, rdi offset need to be subtracted
- by VEC_SIZE. */
- sub $VEC_SIZE, %r8
-
- /* If second vector doesn't have match, first vector must
- have match. */
-L(loop_vec_x2_match):
- BSR %VRDX, %VRDX
-# ifdef USE_AS_WCSRCHR
- sal $2, %rdx
-# endif
- add %rdx, %r8
- jmp L(loop)
+ test %VRDX, %VRDX
+ jz L(second_aligned_loop_prep)
-L(endloop):
- /* Check if string end in first loop vector. */
- VPTESTN %VMM(3), %VMM(3), %k0
- KMOV %k0, %VRCX
- test %VRCX, %VRCX
- jnz L(loop_vector_x1_end)
+ kortestM %k3, %k3
+ jnc L(return_first_aligned_loop)
- /* Check if it has match in first loop vector. */
- KMOV %k1, %VRAX
+ .p2align 4,, 6
+L(first_vec_x1_or_x2_or_x3):
+ VPCMPEQ %VMM(4), %VMATCH, %k4
+ KMOV %k4, %VRAX
test %VRAX, %VRAX
- jz L(loop_vector_x2_end)
+ jz L(first_vec_x1_or_x2)
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
+ ret
- BSR %VRAX, %VRAX
- leaq (%rdi, %rax, CHAR_SIZE), %r8
- /* String must end in second loop vector. */
-L(loop_vector_x2_end):
- VPTESTN %VMM(4), %VMM(4), %k0
+ .p2align 4,, 8
+L(return_first_aligned_loop):
+ VPTESTN %VMM(5), %VMM(5), %k0
KMOV %k0, %VRCX
+ blsmsk %VRCX, %VRCX
+ jnc L(return_first_new_match_first)
+ blsmsk %VRDX, %VRDX
+ VPCMPEQ %VMM(6), %VMATCH, %k0
+ KMOV %k0, %VRAX
+ addq $VEC_SIZE, %rdi
+ and %VRDX, %VRAX
+ jnz L(return_first_new_match_ret)
+ subq $VEC_SIZE, %rdi
+L(return_first_new_match_first):
KMOV %k2, %VRAX
- BLSMSK %VRCX, %VRCX
- /* Check if it has match in second loop vector. */
+# ifdef USE_AS_WCSRCHR
+ xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
and %VRCX, %VRAX
- jz L(check_last_match)
+# else
+ andn %VRCX, %VRAX, %VRAX
+# endif
+ jz L(first_vec_x1_or_x2_or_x3)
+L(return_first_new_match_ret):
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
+ ret
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
+ .p2align 4,, 10
+L(first_vec_x1_or_x2):
+ VPCMPEQ %VMM(3), %VMATCH, %k3
+ KMOV %k3, %VRAX
+ test %VRAX, %VRAX
+ jz L(first_vec_x0_x1_test)
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
ret
- /* String end in first loop vector. */
-L(loop_vector_x1_end):
- KMOV %k1, %VRAX
- BLSMSK %VRCX, %VRCX
- /* Check if it has match in second loop vector. */
- and %VRCX, %VRAX
- jz L(check_last_match)
- BSR %VRAX, %VRAX
- leaq (%rdi, %rax, CHAR_SIZE), %rax
- ret
+ .p2align 4
+ /* We can throw away the work done for the first 4x checks here
+ as we have a later match. This is the 'fast' path persay. */
+L(second_aligned_loop_prep):
+L(second_aligned_loop_set_furthest_match):
+ movq %rdi, %rsi
+ VMOVA %VMM(5), %VMM(7)
+ VMOVA %VMM(6), %VMM(8)
+ .p2align 4
+L(second_aligned_loop):
+ VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
+ VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
+ VPCMP $4, %VMM(5), %VMATCH, %k2
+ VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
+
+ VPMIN %VMM(5), %VMM(6), %VMM(4)
+
+ VPTEST %VMM(4), %VMM(4), %k1{%k3}
+ subq $(VEC_SIZE * -2), %rdi
+ KMOV %k1, %VRCX
+ inc %RCX_M
+ jz L(second_aligned_loop)
+ VPTESTN %VMM(4), %VMM(4), %k1
+ KMOV %k1, %VRDX
+ test %VRDX, %VRDX
+ jz L(second_aligned_loop_set_furthest_match)
- /* No match in first and second loop vector. */
-L(check_last_match):
- /* Check if any match recorded in r8. */
- test %r8, %r8
- jz L(vector_x2_ret)
- movq %r8, %rax
+ kortestM %k3, %k3
+ jnc L(return_new_match)
+ /* branch here because there is a significant advantage interms
+ of output dependency chance in using edx. */
+
+
+L(return_old_match):
+ VPCMPEQ %VMM(8), %VMATCH, %k0
+ KMOV %k0, %VRCX
+ bsr %VRCX, %VRCX
+ jnz L(return_old_match_ret)
+
+ VPCMPEQ %VMM(7), %VMATCH, %k0
+ KMOV %k0, %VRCX
+ bsr %VRCX, %VRCX
+ subq $VEC_SIZE, %rsi
+L(return_old_match_ret):
+ leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
ret
- /* No match recorded in r8. Check the second saved vector
- in beginning. */
-L(vector_x2_ret):
- VPCMPEQ %VMM(2), %VMM(0), %k2
- KMOV %k2, %VRAX
- test %VRAX, %VRAX
- jz L(vector_x1_ret)
- /* Match found in the second saved vector. */
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
+L(return_new_match):
+ VPTESTN %VMM(5), %VMM(5), %k0
+ KMOV %k0, %VRCX
+ blsmsk %VRCX, %VRCX
+ jnc L(return_new_match_first)
+ dec %VRDX
+ VPCMPEQ %VMM(6), %VMATCH, %k0
+ KMOV %k0, %VRAX
+ addq $VEC_SIZE, %rdi
+ and %VRDX, %VRAX
+ jnz L(return_new_match_ret)
+ subq $VEC_SIZE, %rdi
+L(return_new_match_first):
+ KMOV %k2, %VRAX
+# ifdef USE_AS_WCSRCHR
+ xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
+ and %VRCX, %VRAX
+# else
+ andn %VRCX, %VRAX, %VRAX
+# endif
+ jz L(return_old_match)
+L(return_new_match_ret):
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
ret
-L(page_cross):
- mov %rdi, %rax
- movl %edi, %ecx
+ .p2align 4,, 4
+L(cross_page_boundary):
+ xorq %rdi, %rax
+ mov $-1, %VRDX
+ VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
+ VPTESTN %VMM(6), %VMM(6), %k0
+ KMOV %k0, %VRSI
# ifdef USE_AS_WCSRCHR
- /* Calculate number of compare result bits to be skipped for
- wide string alignment adjustment. */
- andl $(VEC_SIZE - 1), %ecx
- sarl $2, %ecx
+ movl %edi, %ecx
+ and $(VEC_SIZE - 1), %ecx
+ shrl $2, %ecx
# endif
- /* ecx contains number of w[char] to be skipped as a result
- of address alignment. */
- andq $-VEC_SIZE, %rax
- VMOVA (%rax), %VMM(1)
- VPTESTN %VMM(1), %VMM(1), %k1
- KMOV %k1, %VRAX
- SHR %cl, %VRAX
- jz L(page_cross_continue)
- VPCMPEQ %VMM(1), %VMM(0), %k0
- KMOV %k0, %VRDX
- SHR %cl, %VRDX
- BLSMSK %VRAX, %VRAX
- and %VRDX, %VRAX
- jz L(ret)
- BSR %VRAX, %VRAX
+ shlx %SHIFT_REG, %VRDX, %VRDX
+
# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
+ kmovw %edx, %k1
# else
- add %rdi, %rax
+ KMOV %VRDX, %k1
# endif
- ret
-END (STRRCHR)
+ VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
+ /* We could technically just jmp back after the vpcompress but
+ it doesn't save any 16-byte blocks. */
+
+ shrx %SHIFT_REG, %VRSI, %VRSI
+ test %VRSI, %VRSI
+ jnz L(page_cross_return)
+ jmp L(page_cross_continue)
+ /* 1-byte from cache line. */
+END(STRRCHR)
#endif
diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S b/sysdeps/x86_64/multiarch/strrchr-evex.S
index 85e3b0119f..b606e6f69c 100644
--- a/sysdeps/x86_64/multiarch/strrchr-evex.S
+++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
@@ -1,394 +1,8 @@
-/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
- Copyright (C) 2021-2023 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <https://www.gnu.org/licenses/>. */
-
-#include <isa-level.h>
-
-#if ISA_SHOULD_BUILD (4)
-
-# include <sysdep.h>
-
# ifndef STRRCHR
# define STRRCHR __strrchr_evex
# endif
-# include "x86-evex256-vecs.h"
-
-# ifdef USE_AS_WCSRCHR
-# define SHIFT_REG rsi
-# define kunpck_2x kunpckbw
-# define kmov_2x kmovd
-# define maskz_2x ecx
-# define maskm_2x eax
-# define CHAR_SIZE 4
-# define VPMIN vpminud
-# define VPTESTN vptestnmd
-# define VPTEST vptestmd
-# define VPBROADCAST vpbroadcastd
-# define VPCMPEQ vpcmpeqd
-# define VPCMP vpcmpd
-
-# define USE_WIDE_CHAR
-# else
-# define SHIFT_REG rdi
-# define kunpck_2x kunpckdq
-# define kmov_2x kmovq
-# define maskz_2x rcx
-# define maskm_2x rax
-
-# define CHAR_SIZE 1
-# define VPMIN vpminub
-# define VPTESTN vptestnmb
-# define VPTEST vptestmb
-# define VPBROADCAST vpbroadcastb
-# define VPCMPEQ vpcmpeqb
-# define VPCMP vpcmpb
-# endif
-
-# include "reg-macros.h"
-
-# define VMATCH VMM(0)
-# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
-# define PAGE_SIZE 4096
-
- .section SECTION(.text), "ax", @progbits
-ENTRY_P2ALIGN(STRRCHR, 6)
- movl %edi, %eax
- /* Broadcast CHAR to VMATCH. */
- VPBROADCAST %esi, %VMATCH
-
- andl $(PAGE_SIZE - 1), %eax
- cmpl $(PAGE_SIZE - VEC_SIZE), %eax
- jg L(cross_page_boundary)
-L(page_cross_continue):
- VMOVU (%rdi), %VMM(1)
- /* k0 has a 1 for each zero CHAR in VEC(1). */
- VPTESTN %VMM(1), %VMM(1), %k0
- KMOV %k0, %VRSI
- test %VRSI, %VRSI
- jz L(aligned_more)
- /* fallthrough: zero CHAR in first VEC. */
- /* K1 has a 1 for each search CHAR match in VEC(1). */
- VPCMPEQ %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- /* Build mask up until first zero CHAR (used to mask of
- potential search CHAR matches past the end of the string).
- */
- blsmsk %VRSI, %VRSI
- and %VRSI, %VRAX
- jz L(ret0)
- /* Get last match (the `and` removed any out of bounds matches).
- */
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
-# else
- addq %rdi, %rax
-# endif
-L(ret0):
- ret
-
- /* Returns for first vec x1/x2/x3 have hard coded backward
- search path for earlier matches. */
- .p2align 4,, 6
-L(first_vec_x1):
- VPCMPEQ %VMATCH, %VMM(2), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* eax non-zero if search CHAR in range. */
- and %VRCX, %VRAX
- jnz L(first_vec_x1_return)
-
- /* fallthrough: no match in VEC(2) then need to check for
- earlier matches (in VEC(1)). */
- .p2align 4,, 4
-L(first_vec_x0_test):
- VPCMPEQ %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- test %VRAX, %VRAX
- jz L(ret1)
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rsi, %rax, CHAR_SIZE), %rax
-# else
- addq %rsi, %rax
-# endif
-L(ret1):
- ret
-
- .p2align 4,, 10
-L(first_vec_x1_or_x2):
- VPCMPEQ %VMM(3), %VMATCH, %k3
- VPCMPEQ %VMM(2), %VMATCH, %k2
- /* K2 and K3 have 1 for any search CHAR match. Test if any
- matches between either of them. Otherwise check VEC(1). */
- KORTEST %k2, %k3
- jz L(first_vec_x0_test)
-
- /* Guaranteed that VEC(2) and VEC(3) are within range so merge
- the two bitmasks then get last result. */
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
- ret
-
- .p2align 4,, 7
-L(first_vec_x3):
- VPCMPEQ %VMATCH, %VMM(4), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
- */
- and %VRCX, %VRAX
- jz L(first_vec_x1_or_x2)
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 6
-L(first_vec_x0_x1_test):
- VPCMPEQ %VMATCH, %VMM(2), %k1
- KMOV %k1, %VRAX
- /* Check VEC(2) for last match first. If no match try VEC(1).
- */
- test %VRAX, %VRAX
- jz L(first_vec_x0_test)
- .p2align 4,, 4
-L(first_vec_x1_return):
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 10
-L(first_vec_x2):
- VPCMPEQ %VMATCH, %VMM(3), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* Check VEC(3) for last match first. If no match try
- VEC(2)/VEC(1). */
- and %VRCX, %VRAX
- jz L(first_vec_x0_x1_test)
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 12
-L(aligned_more):
- /* Need to keep original pointer in case VEC(1) has last match.
- */
- movq %rdi, %rsi
- andq $-VEC_SIZE, %rdi
-
- VMOVU VEC_SIZE(%rdi), %VMM(2)
- VPTESTN %VMM(2), %VMM(2), %k0
- KMOV %k0, %VRCX
-
- test %VRCX, %VRCX
- jnz L(first_vec_x1)
-
- VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
- VPTESTN %VMM(3), %VMM(3), %k0
- KMOV %k0, %VRCX
-
- test %VRCX, %VRCX
- jnz L(first_vec_x2)
-
- VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
- VPTESTN %VMM(4), %VMM(4), %k0
- KMOV %k0, %VRCX
- movq %rdi, %r8
- test %VRCX, %VRCX
- jnz L(first_vec_x3)
-
- andq $-(VEC_SIZE * 2), %rdi
- .p2align 4,, 10
-L(first_aligned_loop):
- /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
- guarantee they don't store a match. */
- VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
- VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
-
- VPCMPEQ %VMM(5), %VMATCH, %k2
- vpxord %VMM(6), %VMATCH, %VMM(7)
-
- VPMIN %VMM(5), %VMM(6), %VMM(8)
- VPMIN %VMM(8), %VMM(7), %VMM(7)
-
- VPTESTN %VMM(7), %VMM(7), %k1
- subq $(VEC_SIZE * -2), %rdi
- KORTEST %k1, %k2
- jz L(first_aligned_loop)
-
- VPCMPEQ %VMM(6), %VMATCH, %k3
- VPTESTN %VMM(8), %VMM(8), %k1
-
- /* If k1 is zero, then we found a CHAR match but no null-term.
- We can now safely throw out VEC1-4. */
- KTEST %k1, %k1
- jz L(second_aligned_loop_prep)
-
- KORTEST %k2, %k3
- jnz L(return_first_aligned_loop)
-
-
- .p2align 4,, 6
-L(first_vec_x1_or_x2_or_x3):
- VPCMPEQ %VMM(4), %VMATCH, %k4
- KMOV %k4, %VRAX
- bsr %VRAX, %VRAX
- jz L(first_vec_x1_or_x2)
- leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 8
-L(return_first_aligned_loop):
- VPTESTN %VMM(5), %VMM(5), %k0
-
- /* Combined results from VEC5/6. */
- kunpck_2x %k0, %k1, %k0
- kmov_2x %k0, %maskz_2x
-
- blsmsk %maskz_2x, %maskz_2x
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
- and %maskz_2x, %maskm_2x
- jz L(first_vec_x1_or_x2_or_x3)
-
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
- .p2align 4
- /* We can throw away the work done for the first 4x checks here
- as we have a later match. This is the 'fast' path persay.
- */
-L(second_aligned_loop_prep):
-L(second_aligned_loop_set_furthest_match):
- movq %rdi, %rsi
- /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
- port0 and have noticeable overhead in the loop. */
- VMOVA %VMM(5), %VMM(7)
- VMOVA %VMM(6), %VMM(8)
- .p2align 4
-L(second_aligned_loop):
- VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
- VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
- VPCMPEQ %VMM(5), %VMATCH, %k2
- vpxord %VMM(6), %VMATCH, %VMM(3)
-
- VPMIN %VMM(5), %VMM(6), %VMM(4)
- VPMIN %VMM(3), %VMM(4), %VMM(3)
-
- VPTESTN %VMM(3), %VMM(3), %k1
- subq $(VEC_SIZE * -2), %rdi
- KORTEST %k1, %k2
- jz L(second_aligned_loop)
- VPCMPEQ %VMM(6), %VMATCH, %k3
- VPTESTN %VMM(4), %VMM(4), %k1
- KTEST %k1, %k1
- jz L(second_aligned_loop_set_furthest_match)
-
- /* branch here because we know we have a match in VEC7/8 but
- might not in VEC5/6 so the latter is expected to be less
- likely. */
- KORTEST %k2, %k3
- jnz L(return_new_match)
-
-L(return_old_match):
- VPCMPEQ %VMM(8), %VMATCH, %k0
- KMOV %k0, %VRCX
- bsr %VRCX, %VRCX
- jnz L(return_old_match_ret)
-
- VPCMPEQ %VMM(7), %VMATCH, %k0
- KMOV %k0, %VRCX
- bsr %VRCX, %VRCX
- subq $VEC_SIZE, %rsi
-L(return_old_match_ret):
- leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
- ret
-
- .p2align 4,, 10
-L(return_new_match):
- VPTESTN %VMM(5), %VMM(5), %k0
-
- /* Combined results from VEC5/6. */
- kunpck_2x %k0, %k1, %k0
- kmov_2x %k0, %maskz_2x
-
- blsmsk %maskz_2x, %maskz_2x
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
-
- /* Match at end was out-of-bounds so use last known match. */
- and %maskz_2x, %maskm_2x
- jz L(return_old_match)
-
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-L(cross_page_boundary):
- /* eax contains all the page offset bits of src (rdi). `xor rdi,
- rax` sets pointer will all page offset bits cleared so
- offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
- before page cross (guaranteed to be safe to read). Doing this
- as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
- a bit of code size. */
- xorq %rdi, %rax
- VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
- VPTESTN %VMM(1), %VMM(1), %k0
- KMOV %k0, %VRCX
-
- /* Shift out zero CHAR matches that are before the beginning of
- src (rdi). */
-# ifdef USE_AS_WCSRCHR
- movl %edi, %esi
- andl $(VEC_SIZE - 1), %esi
- shrl $2, %esi
-# endif
- shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
-
- test %VRCX, %VRCX
- jz L(page_cross_continue)
+#include "x86-evex512-vecs.h"
+#include "reg-macros.h"
- /* Found zero CHAR so need to test for search CHAR. */
- VPCMP $0, %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- /* Shift out search CHAR matches that are before the beginning of
- src (rdi). */
- shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
-
- /* Check if any search CHAR match in range. */
- blsmsk %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(ret3)
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
-# else
- addq %rdi, %rax
-# endif
-L(ret3):
- ret
-END(STRRCHR)
-#endif
+#include "strrchr-evex-base.S"
diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
index e5c5fe3bf2..a584cd3f43 100644
--- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
+++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
@@ -4,4 +4,5 @@
#define STRRCHR WCSRCHR
#define USE_AS_WCSRCHR 1
+#define USE_WIDE_CHAR 1
#include "strrchr-evex.S"
--
2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-09-21 14:38 x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10 Noah Goldstein
@ 2023-09-21 14:39 ` Noah Goldstein
2023-09-21 15:16 ` H.J. Lu
2023-10-04 18:48 ` Noah Goldstein
1 sibling, 1 reply; 12+ messages in thread
From: Noah Goldstein @ 2023-09-21 14:39 UTC (permalink / raw)
To: libc-alpha; +Cc: hjl.tools, carlos
[-- Attachment #1: Type: text/plain, Size: 33942 bytes --]
On Thu, Sep 21, 2023 at 9:38 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> common implementation: `strrchr-evex-base.S`.
>
> The motivation is `strrchr-evex` needed to be refactored to not use
> 64-bit masked registers in preperation for AVX10.
>
> Once vec-width masked register combining was removed, the EVEX and
> EVEX512 implementations can easily be implemented in the same file
> without any major overhead.
>
> The net result is performance improvements (measured on TGL) for both
> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> regressions in the test suite and it may be many of the cases that
> make the total-geomean of improvement/regression across bench-strrchr
> are cold. The point of the performance measurement is to show there
> are no major regressions, but the primary motivation is preperation
> for AVX10.
>
> Benchmarks where taken on TGL:
> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
>
> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
Full summary of attached here.
>
> Full check passes on x86.
> ---
> sysdeps/x86_64/multiarch/strrchr-evex-base.S | 466 ++++++++++++-------
> sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
> sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
> 3 files changed, 294 insertions(+), 565 deletions(-)
>
> diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> index 58b2853ab6..2c98f07fca 100644
> --- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> +++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> @@ -25,240 +25,354 @@
> # include <sysdep.h>
>
> # ifdef USE_AS_WCSRCHR
> +# if VEC_SIZE == 64
> +# define RCX_M cx
> +# define kortestM kortestw
> +# else
> +# define RCX_M cl
> +# define kortestM kortestb
> +# endif
> +
> +# define SHIFT_REG VRCX
> +# define VPCOMPRESS vpcompressd
> # define CHAR_SIZE 4
> -# define VPBROADCAST vpbroadcastd
> -# define VPCMPEQ vpcmpeqd
> -# define VPMINU vpminud
> +# define VPMIN vpminud
> # define VPTESTN vptestnmd
> +# define VPTEST vptestmd
> +# define VPBROADCAST vpbroadcastd
> +# define VPCMPEQ vpcmpeqd
> +# define VPCMP vpcmpd
> # else
> +# define SHIFT_REG VRDI
> +# define VPCOMPRESS vpcompressb
> # define CHAR_SIZE 1
> -# define VPBROADCAST vpbroadcastb
> -# define VPCMPEQ vpcmpeqb
> -# define VPMINU vpminub
> +# define VPMIN vpminub
> # define VPTESTN vptestnmb
> +# define VPTEST vptestmb
> +# define VPBROADCAST vpbroadcastb
> +# define VPCMPEQ vpcmpeqb
> +# define VPCMP vpcmpb
> +
> +# define RCX_M VRCX
> +# define kortestM KORTEST
> # endif
>
> -# define PAGE_SIZE 4096
> +# define VMATCH VMM(0)
> # define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> +# define PAGE_SIZE 4096
>
> .section SECTION(.text), "ax", @progbits
> -/* Aligning entry point to 64 byte, provides better performance for
> - one vector length string. */
> -ENTRY_P2ALIGN (STRRCHR, 6)
> -
> - /* Broadcast CHAR to VMM(0). */
> - VPBROADCAST %esi, %VMM(0)
> + /* Aligning entry point to 64 byte, provides better performance for
> + one vector length string. */
> +ENTRY_P2ALIGN(STRRCHR, 6)
> movl %edi, %eax
> - sall $20, %eax
> - cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
> - ja L(page_cross)
> + /* Broadcast CHAR to VMATCH. */
> + VPBROADCAST %esi, %VMATCH
>
> -L(page_cross_continue):
> - /* Compare [w]char for null, mask bit will be set for match. */
> - VMOVU (%rdi), %VMM(1)
> + andl $(PAGE_SIZE - 1), %eax
> + cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> + jg L(cross_page_boundary)
>
> - VPTESTN %VMM(1), %VMM(1), %k1
> - KMOV %k1, %VRCX
> - test %VRCX, %VRCX
> - jz L(align_more)
> -
> - VPCMPEQ %VMM(1), %VMM(0), %k0
> - KMOV %k0, %VRAX
> - BLSMSK %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(ret)
> -
> - BSR %VRAX, %VRAX
> + VMOVU (%rdi), %VMM(1)
> + /* k0 has a 1 for each zero CHAR in YMM1. */
> + VPTESTN %VMM(1), %VMM(1), %k0
> + KMOV %k0, %VGPR(rsi)
> + test %VGPR(rsi), %VGPR(rsi)
> + jz L(aligned_more)
> + /* fallthrough: zero CHAR in first VEC. */
> +L(page_cross_return):
> + /* K1 has a 1 for each search CHAR match in VEC(1). */
> + VPCMPEQ %VMATCH, %VMM(1), %k1
> + KMOV %k1, %VGPR(rax)
> + /* Build mask up until first zero CHAR (used to mask of
> + potential search CHAR matches past the end of the string). */
> + blsmsk %VGPR(rsi), %VGPR(rsi)
> + and %VGPR(rsi), %VGPR(rax)
> + jz L(ret0)
> + /* Get last match (the `and` removed any out of bounds matches). */
> + bsr %VGPR(rax), %VGPR(rax)
> # ifdef USE_AS_WCSRCHR
> leaq (%rdi, %rax, CHAR_SIZE), %rax
> # else
> - add %rdi, %rax
> + addq %rdi, %rax
> # endif
> -L(ret):
> +L(ret0):
> ret
>
> -L(vector_x2_end):
> - VPCMPEQ %VMM(2), %VMM(0), %k2
> - KMOV %k2, %VRAX
> - BLSMSK %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(vector_x1_ret)
> -
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> - /* Check the first vector at very last to look for match. */
> -L(vector_x1_ret):
> - VPCMPEQ %VMM(1), %VMM(0), %k2
> - KMOV %k2, %VRAX
> - test %VRAX, %VRAX
> - jz L(ret)
> -
> - BSR %VRAX, %VRAX
> + /* Returns for first vec x1/x2/x3 have hard coded backward
> + search path for earlier matches. */
> + .p2align 4,, 6
> +L(first_vec_x1):
> + VPCMPEQ %VMATCH, %VMM(2), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* eax non-zero if search CHAR in range. */
> + and %VGPR(rcx), %VGPR(rax)
> + jnz L(first_vec_x1_return)
> +
> + /* fallthrough: no match in YMM2 then need to check for earlier
> + matches (in YMM1). */
> + .p2align 4,, 4
> +L(first_vec_x0_test):
> + VPCMPEQ %VMATCH, %VMM(1), %k1
> + KMOV %k1, %VGPR(rax)
> + test %VGPR(rax), %VGPR(rax)
> + jz L(ret1)
> + bsr %VGPR(rax), %VGPR(rax)
> # ifdef USE_AS_WCSRCHR
> leaq (%rsi, %rax, CHAR_SIZE), %rax
> # else
> - add %rsi, %rax
> +
> + addq %rsi, %rax
> # endif
> +L(ret1):
> + ret
> +
> + .p2align 4,, 10
> +L(first_vec_x3):
> + VPCMPEQ %VMATCH, %VMM(4), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
> + and %VGPR(rcx), %VGPR(rax)
> + jz L(first_vec_x1_or_x2)
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> + ret
> + .p2align 4,, 4
> +
> +L(first_vec_x2):
> + VPCMPEQ %VMATCH, %VMM(3), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
> + and %VGPR(rcx), %VGPR(rax)
> + jz L(first_vec_x0_x1_test)
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> ret
>
> -L(align_more):
> - /* Zero r8 to store match result. */
> - xorl %r8d, %r8d
> - /* Save pointer of first vector, in case if no match found. */
> + .p2align 4,, 6
> +L(first_vec_x0_x1_test):
> + VPCMPEQ %VMATCH, %VMM(2), %k1
> + KMOV %k1, %VGPR(rax)
> + /* Check YMM2 for last match first. If no match try YMM1. */
> + test %VGPR(rax), %VGPR(rax)
> + jz L(first_vec_x0_test)
> + .p2align 4,, 4
> +L(first_vec_x1_return):
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
> + ret
> +
> + .p2align 4,, 12
> +L(aligned_more):
> +L(page_cross_continue):
> + /* Need to keep original pointer incase VEC(1) has last match. */
> movq %rdi, %rsi
> - /* Align pointer to vector size. */
> andq $-VEC_SIZE, %rdi
> - /* Loop unroll for 2 vector loop. */
> - VMOVA (VEC_SIZE)(%rdi), %VMM(2)
> +
> + VMOVU VEC_SIZE(%rdi), %VMM(2)
> VPTESTN %VMM(2), %VMM(2), %k0
> KMOV %k0, %VRCX
> + movq %rdi, %r8
> test %VRCX, %VRCX
> - jnz L(vector_x2_end)
> + jnz L(first_vec_x1)
> +
> + VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> + VPTESTN %VMM(3), %VMM(3), %k0
> + KMOV %k0, %VRCX
> +
> + test %VRCX, %VRCX
> + jnz L(first_vec_x2)
> +
> + VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> + VPTESTN %VMM(4), %VMM(4), %k0
> + KMOV %k0, %VRCX
> +
> + /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
> + padding for efficient nop before loop alignment. */
> + test %rcx, %rcx
> + jnz L(first_vec_x3)
>
> - /* Save pointer of second vector, in case if no match
> - found. */
> - movq %rdi, %r9
> - /* Align address to VEC_SIZE * 2 for loop. */
> andq $-(VEC_SIZE * 2), %rdi
> + .p2align 4
> +L(first_aligned_loop):
> + /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> + gurantee they don't store a match. */
> + VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> + VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
>
> - .p2align 4,,11
> -L(loop):
> - /* 2 vector loop, as it provide better performance as compared
> - to 4 vector loop. */
> - VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
> - VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
> - VPCMPEQ %VMM(3), %VMM(0), %k1
> - VPCMPEQ %VMM(4), %VMM(0), %k2
> - VPMINU %VMM(3), %VMM(4), %VMM(5)
> - VPTESTN %VMM(5), %VMM(5), %k0
> - KOR %k1, %k2, %k3
> - subq $-(VEC_SIZE * 2), %rdi
> - /* If k0 and k3 zero, match and end of string not found. */
> - KORTEST %k0, %k3
> - jz L(loop)
> -
> - /* If k0 is non zero, end of string found. */
> - KORTEST %k0, %k0
> - jnz L(endloop)
> -
> - lea VEC_SIZE(%rdi), %r8
> - /* A match found, it need to be stored in r8 before loop
> - continue. */
> - /* Check second vector first. */
> - KMOV %k2, %VRDX
> - test %VRDX, %VRDX
> - jnz L(loop_vec_x2_match)
> + VPCMP $4, %VMM(5), %VMATCH, %k2
> + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> +
> + VPMIN %VMM(5), %VMM(6), %VMM(7)
> +
> + VPTEST %VMM(7), %VMM(7), %k1{%k3}
> + subq $(VEC_SIZE * -2), %rdi
> + kortestM %k1, %k1
> + jc L(first_aligned_loop)
>
> + VPTESTN %VMM(7), %VMM(7), %k1
> KMOV %k1, %VRDX
> - /* Match is in first vector, rdi offset need to be subtracted
> - by VEC_SIZE. */
> - sub $VEC_SIZE, %r8
> -
> - /* If second vector doesn't have match, first vector must
> - have match. */
> -L(loop_vec_x2_match):
> - BSR %VRDX, %VRDX
> -# ifdef USE_AS_WCSRCHR
> - sal $2, %rdx
> -# endif
> - add %rdx, %r8
> - jmp L(loop)
> + test %VRDX, %VRDX
> + jz L(second_aligned_loop_prep)
>
> -L(endloop):
> - /* Check if string end in first loop vector. */
> - VPTESTN %VMM(3), %VMM(3), %k0
> - KMOV %k0, %VRCX
> - test %VRCX, %VRCX
> - jnz L(loop_vector_x1_end)
> + kortestM %k3, %k3
> + jnc L(return_first_aligned_loop)
>
> - /* Check if it has match in first loop vector. */
> - KMOV %k1, %VRAX
> + .p2align 4,, 6
> +L(first_vec_x1_or_x2_or_x3):
> + VPCMPEQ %VMM(4), %VMATCH, %k4
> + KMOV %k4, %VRAX
> test %VRAX, %VRAX
> - jz L(loop_vector_x2_end)
> + jz L(first_vec_x1_or_x2)
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> + ret
>
> - BSR %VRAX, %VRAX
> - leaq (%rdi, %rax, CHAR_SIZE), %r8
>
> - /* String must end in second loop vector. */
> -L(loop_vector_x2_end):
> - VPTESTN %VMM(4), %VMM(4), %k0
> + .p2align 4,, 8
> +L(return_first_aligned_loop):
> + VPTESTN %VMM(5), %VMM(5), %k0
> KMOV %k0, %VRCX
> + blsmsk %VRCX, %VRCX
> + jnc L(return_first_new_match_first)
> + blsmsk %VRDX, %VRDX
> + VPCMPEQ %VMM(6), %VMATCH, %k0
> + KMOV %k0, %VRAX
> + addq $VEC_SIZE, %rdi
> + and %VRDX, %VRAX
> + jnz L(return_first_new_match_ret)
> + subq $VEC_SIZE, %rdi
> +L(return_first_new_match_first):
> KMOV %k2, %VRAX
> - BLSMSK %VRCX, %VRCX
> - /* Check if it has match in second loop vector. */
> +# ifdef USE_AS_WCSRCHR
> + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> and %VRCX, %VRAX
> - jz L(check_last_match)
> +# else
> + andn %VRCX, %VRAX, %VRAX
> +# endif
> + jz L(first_vec_x1_or_x2_or_x3)
> +L(return_first_new_match_ret):
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> + ret
>
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> + .p2align 4,, 10
> +L(first_vec_x1_or_x2):
> + VPCMPEQ %VMM(3), %VMATCH, %k3
> + KMOV %k3, %VRAX
> + test %VRAX, %VRAX
> + jz L(first_vec_x0_x1_test)
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> ret
>
> - /* String end in first loop vector. */
> -L(loop_vector_x1_end):
> - KMOV %k1, %VRAX
> - BLSMSK %VRCX, %VRCX
> - /* Check if it has match in second loop vector. */
> - and %VRCX, %VRAX
> - jz L(check_last_match)
>
> - BSR %VRAX, %VRAX
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> - ret
> + .p2align 4
> + /* We can throw away the work done for the first 4x checks here
> + as we have a later match. This is the 'fast' path persay. */
> +L(second_aligned_loop_prep):
> +L(second_aligned_loop_set_furthest_match):
> + movq %rdi, %rsi
> + VMOVA %VMM(5), %VMM(7)
> + VMOVA %VMM(6), %VMM(8)
> + .p2align 4
> +L(second_aligned_loop):
> + VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> + VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> + VPCMP $4, %VMM(5), %VMATCH, %k2
> + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> +
> + VPMIN %VMM(5), %VMM(6), %VMM(4)
> +
> + VPTEST %VMM(4), %VMM(4), %k1{%k3}
> + subq $(VEC_SIZE * -2), %rdi
> + KMOV %k1, %VRCX
> + inc %RCX_M
> + jz L(second_aligned_loop)
> + VPTESTN %VMM(4), %VMM(4), %k1
> + KMOV %k1, %VRDX
> + test %VRDX, %VRDX
> + jz L(second_aligned_loop_set_furthest_match)
>
> - /* No match in first and second loop vector. */
> -L(check_last_match):
> - /* Check if any match recorded in r8. */
> - test %r8, %r8
> - jz L(vector_x2_ret)
> - movq %r8, %rax
> + kortestM %k3, %k3
> + jnc L(return_new_match)
> + /* branch here because there is a significant advantage interms
> + of output dependency chance in using edx. */
> +
> +
> +L(return_old_match):
> + VPCMPEQ %VMM(8), %VMATCH, %k0
> + KMOV %k0, %VRCX
> + bsr %VRCX, %VRCX
> + jnz L(return_old_match_ret)
> +
> + VPCMPEQ %VMM(7), %VMATCH, %k0
> + KMOV %k0, %VRCX
> + bsr %VRCX, %VRCX
> + subq $VEC_SIZE, %rsi
> +L(return_old_match_ret):
> + leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> ret
>
> - /* No match recorded in r8. Check the second saved vector
> - in beginning. */
> -L(vector_x2_ret):
> - VPCMPEQ %VMM(2), %VMM(0), %k2
> - KMOV %k2, %VRAX
> - test %VRAX, %VRAX
> - jz L(vector_x1_ret)
>
> - /* Match found in the second saved vector. */
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
> +L(return_new_match):
> + VPTESTN %VMM(5), %VMM(5), %k0
> + KMOV %k0, %VRCX
> + blsmsk %VRCX, %VRCX
> + jnc L(return_new_match_first)
> + dec %VRDX
> + VPCMPEQ %VMM(6), %VMATCH, %k0
> + KMOV %k0, %VRAX
> + addq $VEC_SIZE, %rdi
> + and %VRDX, %VRAX
> + jnz L(return_new_match_ret)
> + subq $VEC_SIZE, %rdi
> +L(return_new_match_first):
> + KMOV %k2, %VRAX
> +# ifdef USE_AS_WCSRCHR
> + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> + and %VRCX, %VRAX
> +# else
> + andn %VRCX, %VRAX, %VRAX
> +# endif
> + jz L(return_old_match)
> +L(return_new_match_ret):
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> ret
>
> -L(page_cross):
> - mov %rdi, %rax
> - movl %edi, %ecx
> + .p2align 4,, 4
> +L(cross_page_boundary):
> + xorq %rdi, %rax
> + mov $-1, %VRDX
> + VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
> + VPTESTN %VMM(6), %VMM(6), %k0
> + KMOV %k0, %VRSI
>
> # ifdef USE_AS_WCSRCHR
> - /* Calculate number of compare result bits to be skipped for
> - wide string alignment adjustment. */
> - andl $(VEC_SIZE - 1), %ecx
> - sarl $2, %ecx
> + movl %edi, %ecx
> + and $(VEC_SIZE - 1), %ecx
> + shrl $2, %ecx
> # endif
> - /* ecx contains number of w[char] to be skipped as a result
> - of address alignment. */
> - andq $-VEC_SIZE, %rax
> - VMOVA (%rax), %VMM(1)
> - VPTESTN %VMM(1), %VMM(1), %k1
> - KMOV %k1, %VRAX
> - SHR %cl, %VRAX
> - jz L(page_cross_continue)
> - VPCMPEQ %VMM(1), %VMM(0), %k0
> - KMOV %k0, %VRDX
> - SHR %cl, %VRDX
> - BLSMSK %VRAX, %VRAX
> - and %VRDX, %VRAX
> - jz L(ret)
> - BSR %VRAX, %VRAX
> + shlx %SHIFT_REG, %VRDX, %VRDX
> +
> # ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> + kmovw %edx, %k1
> # else
> - add %rdi, %rax
> + KMOV %VRDX, %k1
> # endif
>
> - ret
> -END (STRRCHR)
> + VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
> + /* We could technically just jmp back after the vpcompress but
> + it doesn't save any 16-byte blocks. */
> +
> + shrx %SHIFT_REG, %VRSI, %VRSI
> + test %VRSI, %VRSI
> + jnz L(page_cross_return)
> + jmp L(page_cross_continue)
> + /* 1-byte from cache line. */
> +END(STRRCHR)
> #endif
> diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S b/sysdeps/x86_64/multiarch/strrchr-evex.S
> index 85e3b0119f..b606e6f69c 100644
> --- a/sysdeps/x86_64/multiarch/strrchr-evex.S
> +++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
> @@ -1,394 +1,8 @@
> -/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
> - Copyright (C) 2021-2023 Free Software Foundation, Inc.
> - This file is part of the GNU C Library.
> -
> - The GNU C Library is free software; you can redistribute it and/or
> - modify it under the terms of the GNU Lesser General Public
> - License as published by the Free Software Foundation; either
> - version 2.1 of the License, or (at your option) any later version.
> -
> - The GNU C Library is distributed in the hope that it will be useful,
> - but WITHOUT ANY WARRANTY; without even the implied warranty of
> - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> - Lesser General Public License for more details.
> -
> - You should have received a copy of the GNU Lesser General Public
> - License along with the GNU C Library; if not, see
> - <https://www.gnu.org/licenses/>. */
> -
> -#include <isa-level.h>
> -
> -#if ISA_SHOULD_BUILD (4)
> -
> -# include <sysdep.h>
> -
> # ifndef STRRCHR
> # define STRRCHR __strrchr_evex
> # endif
>
> -# include "x86-evex256-vecs.h"
> -
> -# ifdef USE_AS_WCSRCHR
> -# define SHIFT_REG rsi
> -# define kunpck_2x kunpckbw
> -# define kmov_2x kmovd
> -# define maskz_2x ecx
> -# define maskm_2x eax
> -# define CHAR_SIZE 4
> -# define VPMIN vpminud
> -# define VPTESTN vptestnmd
> -# define VPTEST vptestmd
> -# define VPBROADCAST vpbroadcastd
> -# define VPCMPEQ vpcmpeqd
> -# define VPCMP vpcmpd
> -
> -# define USE_WIDE_CHAR
> -# else
> -# define SHIFT_REG rdi
> -# define kunpck_2x kunpckdq
> -# define kmov_2x kmovq
> -# define maskz_2x rcx
> -# define maskm_2x rax
> -
> -# define CHAR_SIZE 1
> -# define VPMIN vpminub
> -# define VPTESTN vptestnmb
> -# define VPTEST vptestmb
> -# define VPBROADCAST vpbroadcastb
> -# define VPCMPEQ vpcmpeqb
> -# define VPCMP vpcmpb
> -# endif
> -
> -# include "reg-macros.h"
> -
> -# define VMATCH VMM(0)
> -# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> -# define PAGE_SIZE 4096
> -
> - .section SECTION(.text), "ax", @progbits
> -ENTRY_P2ALIGN(STRRCHR, 6)
> - movl %edi, %eax
> - /* Broadcast CHAR to VMATCH. */
> - VPBROADCAST %esi, %VMATCH
> -
> - andl $(PAGE_SIZE - 1), %eax
> - cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> - jg L(cross_page_boundary)
> -L(page_cross_continue):
> - VMOVU (%rdi), %VMM(1)
> - /* k0 has a 1 for each zero CHAR in VEC(1). */
> - VPTESTN %VMM(1), %VMM(1), %k0
> - KMOV %k0, %VRSI
> - test %VRSI, %VRSI
> - jz L(aligned_more)
> - /* fallthrough: zero CHAR in first VEC. */
> - /* K1 has a 1 for each search CHAR match in VEC(1). */
> - VPCMPEQ %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - /* Build mask up until first zero CHAR (used to mask of
> - potential search CHAR matches past the end of the string).
> - */
> - blsmsk %VRSI, %VRSI
> - and %VRSI, %VRAX
> - jz L(ret0)
> - /* Get last match (the `and` removed any out of bounds matches).
> - */
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rdi, %rax
> -# endif
> -L(ret0):
> - ret
> -
> - /* Returns for first vec x1/x2/x3 have hard coded backward
> - search path for earlier matches. */
> - .p2align 4,, 6
> -L(first_vec_x1):
> - VPCMPEQ %VMATCH, %VMM(2), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* eax non-zero if search CHAR in range. */
> - and %VRCX, %VRAX
> - jnz L(first_vec_x1_return)
> -
> - /* fallthrough: no match in VEC(2) then need to check for
> - earlier matches (in VEC(1)). */
> - .p2align 4,, 4
> -L(first_vec_x0_test):
> - VPCMPEQ %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - test %VRAX, %VRAX
> - jz L(ret1)
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rsi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rsi, %rax
> -# endif
> -L(ret1):
> - ret
> -
> - .p2align 4,, 10
> -L(first_vec_x1_or_x2):
> - VPCMPEQ %VMM(3), %VMATCH, %k3
> - VPCMPEQ %VMM(2), %VMATCH, %k2
> - /* K2 and K3 have 1 for any search CHAR match. Test if any
> - matches between either of them. Otherwise check VEC(1). */
> - KORTEST %k2, %k3
> - jz L(first_vec_x0_test)
> -
> - /* Guaranteed that VEC(2) and VEC(3) are within range so merge
> - the two bitmasks then get last result. */
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4,, 7
> -L(first_vec_x3):
> - VPCMPEQ %VMATCH, %VMM(4), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
> - */
> - and %VRCX, %VRAX
> - jz L(first_vec_x1_or_x2)
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 6
> -L(first_vec_x0_x1_test):
> - VPCMPEQ %VMATCH, %VMM(2), %k1
> - KMOV %k1, %VRAX
> - /* Check VEC(2) for last match first. If no match try VEC(1).
> - */
> - test %VRAX, %VRAX
> - jz L(first_vec_x0_test)
> - .p2align 4,, 4
> -L(first_vec_x1_return):
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 10
> -L(first_vec_x2):
> - VPCMPEQ %VMATCH, %VMM(3), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* Check VEC(3) for last match first. If no match try
> - VEC(2)/VEC(1). */
> - and %VRCX, %VRAX
> - jz L(first_vec_x0_x1_test)
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 12
> -L(aligned_more):
> - /* Need to keep original pointer in case VEC(1) has last match.
> - */
> - movq %rdi, %rsi
> - andq $-VEC_SIZE, %rdi
> -
> - VMOVU VEC_SIZE(%rdi), %VMM(2)
> - VPTESTN %VMM(2), %VMM(2), %k0
> - KMOV %k0, %VRCX
> -
> - test %VRCX, %VRCX
> - jnz L(first_vec_x1)
> -
> - VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> - VPTESTN %VMM(3), %VMM(3), %k0
> - KMOV %k0, %VRCX
> -
> - test %VRCX, %VRCX
> - jnz L(first_vec_x2)
> -
> - VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> - VPTESTN %VMM(4), %VMM(4), %k0
> - KMOV %k0, %VRCX
> - movq %rdi, %r8
> - test %VRCX, %VRCX
> - jnz L(first_vec_x3)
> -
> - andq $-(VEC_SIZE * 2), %rdi
> - .p2align 4,, 10
> -L(first_aligned_loop):
> - /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> - guarantee they don't store a match. */
> - VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> - VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> -
> - VPCMPEQ %VMM(5), %VMATCH, %k2
> - vpxord %VMM(6), %VMATCH, %VMM(7)
> -
> - VPMIN %VMM(5), %VMM(6), %VMM(8)
> - VPMIN %VMM(8), %VMM(7), %VMM(7)
> -
> - VPTESTN %VMM(7), %VMM(7), %k1
> - subq $(VEC_SIZE * -2), %rdi
> - KORTEST %k1, %k2
> - jz L(first_aligned_loop)
> -
> - VPCMPEQ %VMM(6), %VMATCH, %k3
> - VPTESTN %VMM(8), %VMM(8), %k1
> -
> - /* If k1 is zero, then we found a CHAR match but no null-term.
> - We can now safely throw out VEC1-4. */
> - KTEST %k1, %k1
> - jz L(second_aligned_loop_prep)
> -
> - KORTEST %k2, %k3
> - jnz L(return_first_aligned_loop)
> -
> -
> - .p2align 4,, 6
> -L(first_vec_x1_or_x2_or_x3):
> - VPCMPEQ %VMM(4), %VMATCH, %k4
> - KMOV %k4, %VRAX
> - bsr %VRAX, %VRAX
> - jz L(first_vec_x1_or_x2)
> - leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 8
> -L(return_first_aligned_loop):
> - VPTESTN %VMM(5), %VMM(5), %k0
> -
> - /* Combined results from VEC5/6. */
> - kunpck_2x %k0, %k1, %k0
> - kmov_2x %k0, %maskz_2x
> -
> - blsmsk %maskz_2x, %maskz_2x
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> - and %maskz_2x, %maskm_2x
> - jz L(first_vec_x1_or_x2_or_x3)
> -
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4
> - /* We can throw away the work done for the first 4x checks here
> - as we have a later match. This is the 'fast' path persay.
> - */
> -L(second_aligned_loop_prep):
> -L(second_aligned_loop_set_furthest_match):
> - movq %rdi, %rsi
> - /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
> - port0 and have noticeable overhead in the loop. */
> - VMOVA %VMM(5), %VMM(7)
> - VMOVA %VMM(6), %VMM(8)
> - .p2align 4
> -L(second_aligned_loop):
> - VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> - VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> - VPCMPEQ %VMM(5), %VMATCH, %k2
> - vpxord %VMM(6), %VMATCH, %VMM(3)
> -
> - VPMIN %VMM(5), %VMM(6), %VMM(4)
> - VPMIN %VMM(3), %VMM(4), %VMM(3)
> -
> - VPTESTN %VMM(3), %VMM(3), %k1
> - subq $(VEC_SIZE * -2), %rdi
> - KORTEST %k1, %k2
> - jz L(second_aligned_loop)
> - VPCMPEQ %VMM(6), %VMATCH, %k3
> - VPTESTN %VMM(4), %VMM(4), %k1
> - KTEST %k1, %k1
> - jz L(second_aligned_loop_set_furthest_match)
> -
> - /* branch here because we know we have a match in VEC7/8 but
> - might not in VEC5/6 so the latter is expected to be less
> - likely. */
> - KORTEST %k2, %k3
> - jnz L(return_new_match)
> -
> -L(return_old_match):
> - VPCMPEQ %VMM(8), %VMATCH, %k0
> - KMOV %k0, %VRCX
> - bsr %VRCX, %VRCX
> - jnz L(return_old_match_ret)
> -
> - VPCMPEQ %VMM(7), %VMATCH, %k0
> - KMOV %k0, %VRCX
> - bsr %VRCX, %VRCX
> - subq $VEC_SIZE, %rsi
> -L(return_old_match_ret):
> - leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4,, 10
> -L(return_new_match):
> - VPTESTN %VMM(5), %VMM(5), %k0
> -
> - /* Combined results from VEC5/6. */
> - kunpck_2x %k0, %k1, %k0
> - kmov_2x %k0, %maskz_2x
> -
> - blsmsk %maskz_2x, %maskz_2x
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> -
> - /* Match at end was out-of-bounds so use last known match. */
> - and %maskz_2x, %maskm_2x
> - jz L(return_old_match)
> -
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -L(cross_page_boundary):
> - /* eax contains all the page offset bits of src (rdi). `xor rdi,
> - rax` sets pointer will all page offset bits cleared so
> - offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
> - before page cross (guaranteed to be safe to read). Doing this
> - as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
> - a bit of code size. */
> - xorq %rdi, %rax
> - VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
> - VPTESTN %VMM(1), %VMM(1), %k0
> - KMOV %k0, %VRCX
> -
> - /* Shift out zero CHAR matches that are before the beginning of
> - src (rdi). */
> -# ifdef USE_AS_WCSRCHR
> - movl %edi, %esi
> - andl $(VEC_SIZE - 1), %esi
> - shrl $2, %esi
> -# endif
> - shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
> -
> - test %VRCX, %VRCX
> - jz L(page_cross_continue)
> +#include "x86-evex512-vecs.h"
> +#include "reg-macros.h"
>
> - /* Found zero CHAR so need to test for search CHAR. */
> - VPCMP $0, %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - /* Shift out search CHAR matches that are before the beginning of
> - src (rdi). */
> - shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
> -
> - /* Check if any search CHAR match in range. */
> - blsmsk %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(ret3)
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rdi, %rax
> -# endif
> -L(ret3):
> - ret
> -END(STRRCHR)
> -#endif
> +#include "strrchr-evex-base.S"
> diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> index e5c5fe3bf2..a584cd3f43 100644
> --- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> +++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> @@ -4,4 +4,5 @@
>
> #define STRRCHR WCSRCHR
> #define USE_AS_WCSRCHR 1
> +#define USE_WIDE_CHAR 1
> #include "strrchr-evex.S"
> --
> 2.34.1
>
[-- Attachment #2: strrchr-evex512-data-tgl.txt --]
[-- Type: text/plain, Size: 165398 bytes --]
Results For: strrchr
align,freq ,len ,max_char ,pos ,seek ,strrchr-dev ,strrchr-glibc ,strrchr-dev/strrchr-glibc
0 ,1 ,1 ,127 ,0 ,0 ,2.953 ,3.078 ,0.959
0 ,1 ,1 ,127 ,0 ,23 ,3.178 ,3.188 ,0.997
0 ,1 ,10 ,127 ,9 ,0 ,3.081 ,3.463 ,0.89
0 ,1 ,10 ,127 ,9 ,23 ,3.145 ,3.437 ,0.915
0 ,1 ,1024 ,127 ,0 ,0 ,3.123 ,3.626 ,0.861
0 ,1 ,1024 ,127 ,0 ,23 ,19.23 ,21.471 ,0.896
0 ,1 ,1024 ,127 ,1024 ,0 ,17.362 ,20.028 ,0.867
0 ,1 ,1024 ,127 ,1024 ,23 ,18.9 ,21.757 ,0.869
0 ,1 ,1024 ,127 ,144 ,0 ,4.986 ,6.808 ,0.732
0 ,1 ,1024 ,127 ,144 ,23 ,17.706 ,21.908 ,0.808
0 ,1 ,1024 ,127 ,192 ,0 ,5.393 ,7.996 ,0.674
0 ,1 ,1024 ,127 ,192 ,23 ,17.277 ,21.515 ,0.803
0 ,1 ,1024 ,127 ,240 ,0 ,5.226 ,8.055 ,0.649
0 ,1 ,1024 ,127 ,240 ,23 ,17.189 ,22.304 ,0.771
0 ,1 ,1024 ,127 ,288 ,0 ,7.933 ,8.578 ,0.925
0 ,1 ,1024 ,127 ,288 ,23 ,18.501 ,24.366 ,0.759
0 ,1 ,1024 ,127 ,48 ,0 ,3.053 ,4.341 ,0.703
0 ,1 ,1024 ,127 ,48 ,23 ,19.11 ,21.532 ,0.888
0 ,1 ,1024 ,127 ,736 ,0 ,12.208 ,15.197 ,0.803
0 ,1 ,1024 ,127 ,736 ,23 ,18.065 ,23.566 ,0.767
0 ,1 ,1024 ,127 ,784 ,0 ,13.641 ,16.227 ,0.841
0 ,1 ,1024 ,127 ,784 ,23 ,18.869 ,24.555 ,0.768
0 ,1 ,1024 ,127 ,832 ,0 ,14.175 ,16.458 ,0.861
0 ,1 ,1024 ,127 ,832 ,23 ,18.311 ,22.605 ,0.81
0 ,1 ,1024 ,127 ,880 ,0 ,13.896 ,16.366 ,0.849
0 ,1 ,1024 ,127 ,880 ,23 ,19.03 ,25.616 ,0.743
0 ,1 ,1024 ,127 ,928 ,0 ,15.214 ,18.45 ,0.825
0 ,1 ,1024 ,127 ,928 ,23 ,19.255 ,23.225 ,0.829
0 ,1 ,1024 ,127 ,96 ,0 ,4.884 ,4.969 ,0.983
0 ,1 ,1024 ,127 ,96 ,23 ,18.357 ,22.832 ,0.804
0 ,1 ,1024 ,127 ,976 ,0 ,15.796 ,18.741 ,0.843
0 ,1 ,1024 ,127 ,976 ,23 ,18.915 ,24.523 ,0.771
0 ,1 ,1072 ,127 ,1024 ,0 ,17.09 ,19.652 ,0.87
0 ,1 ,1072 ,127 ,1024 ,23 ,18.211 ,23.276 ,0.782
0 ,1 ,11 ,127 ,10 ,0 ,3.136 ,3.301 ,0.95
0 ,1 ,11 ,127 ,10 ,23 ,3.16 ,3.516 ,0.899
0 ,1 ,112 ,127 ,144 ,0 ,4.981 ,4.323 ,1.152
0 ,1 ,112 ,127 ,144 ,23 ,5.125 ,5.25 ,0.976
0 ,1 ,112 ,127 ,16 ,0 ,3.098 ,3.151 ,0.983
0 ,1 ,112 ,127 ,16 ,23 ,4.441 ,5.117 ,0.868
0 ,1 ,112 ,127 ,256 ,0 ,4.933 ,4.223 ,1.168
0 ,1 ,112 ,127 ,256 ,23 ,5.031 ,5.075 ,0.991
0 ,1 ,112 ,127 ,64 ,0 ,4.957 ,4.164 ,1.191
0 ,1 ,112 ,127 ,64 ,23 ,5.006 ,4.21 ,1.189
0 ,1 ,112 ,127 ,96 ,0 ,4.933 ,4.019 ,1.227
0 ,1 ,112 ,127 ,96 ,23 ,5.031 ,5.669 ,0.887
0 ,1 ,1120 ,127 ,1024 ,0 ,17.092 ,20.59 ,0.83
0 ,1 ,1120 ,127 ,1024 ,23 ,18.837 ,22.851 ,0.824
0 ,1 ,1168 ,127 ,1024 ,0 ,17.058 ,22.111 ,0.771
0 ,1 ,1168 ,127 ,1024 ,23 ,22.504 ,29.475 ,0.763
0 ,1 ,12 ,127 ,11 ,0 ,3.009 ,3.155 ,0.954
0 ,1 ,12 ,127 ,11 ,23 ,3.19 ,3.153 ,1.012
0 ,1 ,1216 ,127 ,1024 ,0 ,17.007 ,20.269 ,0.839
0 ,1 ,1216 ,127 ,1024 ,23 ,20.889 ,26.587 ,0.786
0 ,1 ,1264 ,127 ,1024 ,0 ,16.923 ,20.842 ,0.812
0 ,1 ,1264 ,127 ,1024 ,23 ,21.588 ,26.289 ,0.821
0 ,1 ,128 ,127 ,0 ,0 ,3.099 ,3.174 ,0.976
0 ,1 ,128 ,127 ,0 ,23 ,5.803 ,8.722 ,0.665
0 ,1 ,128 ,127 ,112 ,0 ,4.933 ,3.916 ,1.26
0 ,1 ,128 ,127 ,112 ,23 ,5.254 ,8.698 ,0.604
0 ,1 ,128 ,127 ,128 ,0 ,5.091 ,6.146 ,0.828
0 ,1 ,128 ,127 ,128 ,23 ,6.28 ,8.127 ,0.773
0 ,1 ,128 ,127 ,144 ,0 ,5.207 ,6.103 ,0.853
0 ,1 ,128 ,127 ,144 ,23 ,6.443 ,8.413 ,0.766
0 ,1 ,128 ,127 ,192 ,0 ,5.085 ,6.159 ,0.826
0 ,1 ,128 ,127 ,192 ,23 ,6.341 ,9.672 ,0.656
0 ,1 ,128 ,127 ,240 ,0 ,5.088 ,6.309 ,0.806
0 ,1 ,128 ,127 ,240 ,23 ,6.289 ,8.934 ,0.704
0 ,1 ,128 ,127 ,288 ,0 ,5.289 ,6.064 ,0.872
0 ,1 ,128 ,127 ,288 ,23 ,6.258 ,9.495 ,0.659
0 ,1 ,128 ,127 ,32 ,0 ,3.094 ,3.209 ,0.964
0 ,1 ,128 ,127 ,32 ,23 ,6.02 ,8.555 ,0.704
0 ,1 ,128 ,127 ,48 ,0 ,3.099 ,3.3 ,0.939
0 ,1 ,128 ,127 ,48 ,23 ,5.846 ,8.252 ,0.708
0 ,1 ,128 ,127 ,80 ,0 ,4.958 ,4.269 ,1.161
0 ,1 ,128 ,127 ,80 ,23 ,5.379 ,7.371 ,0.73
0 ,1 ,128 ,127 ,96 ,0 ,4.956 ,4.144 ,1.196
0 ,1 ,128 ,127 ,96 ,23 ,5.423 ,7.668 ,0.707
0 ,1 ,13 ,127 ,12 ,0 ,3.053 ,3.478 ,0.878
0 ,1 ,13 ,127 ,12 ,23 ,3.169 ,3.306 ,0.959
0 ,1 ,1312 ,127 ,1024 ,0 ,16.929 ,22.15 ,0.764
0 ,1 ,1312 ,127 ,1024 ,23 ,23.496 ,28.888 ,0.813
0 ,1 ,14 ,127 ,13 ,0 ,3.087 ,3.311 ,0.932
0 ,1 ,14 ,127 ,13 ,23 ,3.145 ,3.27 ,0.962
0 ,1 ,144 ,127 ,128 ,0 ,5.095 ,6.041 ,0.843
0 ,1 ,144 ,127 ,128 ,23 ,5.325 ,6.875 ,0.775
0 ,1 ,15 ,127 ,14 ,0 ,3.136 ,3.056 ,1.026
0 ,1 ,15 ,127 ,14 ,23 ,3.145 ,3.309 ,0.95
0 ,1 ,16 ,127 ,0 ,0 ,3.116 ,3.867 ,0.806
0 ,1 ,16 ,127 ,0 ,23 ,3.149 ,3.453 ,0.912
0 ,1 ,16 ,127 ,144 ,0 ,3.083 ,3.039 ,1.015
0 ,1 ,16 ,127 ,144 ,23 ,3.852 ,3.699 ,1.041
0 ,1 ,16 ,127 ,15 ,0 ,3.048 ,3.481 ,0.875
0 ,1 ,16 ,127 ,15 ,23 ,3.204 ,3.403 ,0.942
0 ,1 ,16 ,127 ,16 ,0 ,3.13 ,3.178 ,0.985
0 ,1 ,16 ,127 ,16 ,23 ,3.768 ,3.776 ,0.998
0 ,1 ,16 ,127 ,192 ,0 ,3.099 ,3.305 ,0.938
0 ,1 ,16 ,127 ,192 ,23 ,3.755 ,3.683 ,1.02
0 ,1 ,16 ,127 ,240 ,0 ,3.122 ,3.284 ,0.951
0 ,1 ,16 ,127 ,240 ,23 ,3.764 ,3.709 ,1.015
0 ,1 ,16 ,127 ,256 ,0 ,3.166 ,3.44 ,0.921
0 ,1 ,16 ,127 ,256 ,23 ,3.792 ,3.847 ,0.986
0 ,1 ,16 ,127 ,288 ,0 ,3.114 ,3.166 ,0.983
0 ,1 ,16 ,127 ,288 ,23 ,4.129 ,3.874 ,1.066
0 ,1 ,16 ,127 ,48 ,0 ,3.11 ,3.159 ,0.985
0 ,1 ,16 ,127 ,48 ,23 ,3.774 ,3.804 ,0.992
0 ,1 ,16 ,127 ,64 ,0 ,3.098 ,3.101 ,0.999
0 ,1 ,16 ,127 ,64 ,23 ,3.773 ,3.994 ,0.945
0 ,1 ,16 ,127 ,96 ,0 ,3.13 ,3.151 ,0.993
0 ,1 ,16 ,127 ,96 ,23 ,3.794 ,3.755 ,1.01
0 ,1 ,160 ,127 ,144 ,0 ,5.076 ,6.069 ,0.836
0 ,1 ,160 ,127 ,144 ,23 ,5.318 ,6.691 ,0.795
0 ,1 ,160 ,127 ,16 ,0 ,3.084 ,3.166 ,0.974
0 ,1 ,160 ,127 ,16 ,23 ,5.866 ,8.417 ,0.697
0 ,1 ,160 ,127 ,256 ,0 ,5.387 ,5.984 ,0.9
0 ,1 ,160 ,127 ,256 ,23 ,6.289 ,8.095 ,0.777
0 ,1 ,160 ,127 ,64 ,0 ,5.007 ,4.453 ,1.124
0 ,1 ,160 ,127 ,64 ,23 ,5.595 ,7.571 ,0.739
0 ,1 ,160 ,127 ,96 ,0 ,4.981 ,4.675 ,1.065
0 ,1 ,160 ,127 ,96 ,23 ,5.388 ,7.77 ,0.693
0 ,1 ,17 ,127 ,16 ,0 ,3.024 ,3.367 ,0.898
0 ,1 ,17 ,127 ,16 ,23 ,3.153 ,3.303 ,0.954
0 ,1 ,176 ,127 ,128 ,0 ,5.107 ,6.03 ,0.847
0 ,1 ,176 ,127 ,128 ,23 ,5.166 ,6.57 ,0.786
0 ,1 ,176 ,127 ,160 ,0 ,5.087 ,5.925 ,0.859
0 ,1 ,176 ,127 ,160 ,23 ,5.204 ,7.107 ,0.732
0 ,1 ,176 ,127 ,32 ,0 ,3.098 ,3.584 ,0.865
0 ,1 ,176 ,127 ,32 ,23 ,5.966 ,8.015 ,0.744
0 ,1 ,1760 ,127 ,2048 ,0 ,26.801 ,28.778 ,0.931
0 ,1 ,1760 ,127 ,2048 ,23 ,27.873 ,30.757 ,0.906
0 ,1 ,1760 ,127 ,288 ,0 ,7.739 ,9.704 ,0.798
0 ,1 ,1760 ,127 ,288 ,23 ,27.582 ,33.667 ,0.819
0 ,1 ,18 ,127 ,17 ,0 ,3.166 ,3.214 ,0.985
0 ,1 ,18 ,127 ,17 ,23 ,3.153 ,3.391 ,0.93
0 ,1 ,1808 ,127 ,2048 ,0 ,27.859 ,31.173 ,0.894
0 ,1 ,1808 ,127 ,2048 ,23 ,29.615 ,32.244 ,0.918
0 ,1 ,1808 ,127 ,240 ,0 ,5.02 ,7.922 ,0.634
0 ,1 ,1808 ,127 ,240 ,23 ,28.216 ,32.914 ,0.857
0 ,1 ,1856 ,127 ,192 ,0 ,4.952 ,8.102 ,0.611
0 ,1 ,1856 ,127 ,192 ,23 ,28.129 ,32.761 ,0.859
0 ,1 ,1856 ,127 ,2048 ,0 ,28.685 ,30.899 ,0.928
0 ,1 ,1856 ,127 ,2048 ,23 ,30.153 ,32.325 ,0.933
0 ,1 ,19 ,127 ,18 ,0 ,3.064 ,3.373 ,0.908
0 ,1 ,19 ,127 ,18 ,23 ,3.174 ,3.314 ,0.958
0 ,1 ,1904 ,127 ,144 ,0 ,4.963 ,6.725 ,0.738
0 ,1 ,1904 ,127 ,144 ,23 ,28.694 ,32.558 ,0.881
0 ,1 ,1904 ,127 ,2048 ,0 ,28.546 ,30.818 ,0.926
0 ,1 ,1904 ,127 ,2048 ,23 ,29.761 ,32.772 ,0.908
0 ,1 ,192 ,127 ,176 ,0 ,5.245 ,6.23 ,0.842
0 ,1 ,192 ,127 ,176 ,23 ,5.649 ,8.73 ,0.647
0 ,1 ,1952 ,127 ,2048 ,0 ,29.867 ,31.426 ,0.95
0 ,1 ,1952 ,127 ,2048 ,23 ,31.458 ,33.255 ,0.946
0 ,1 ,1952 ,127 ,96 ,0 ,4.814 ,4.921 ,0.978
0 ,1 ,1952 ,127 ,96 ,23 ,30.899 ,33.712 ,0.917
0 ,1 ,2 ,127 ,1 ,0 ,2.919 ,3.139 ,0.93
0 ,1 ,2 ,127 ,1 ,23 ,3.178 ,3.483 ,0.912
0 ,1 ,20 ,127 ,19 ,0 ,3.038 ,3.106 ,0.978
0 ,1 ,20 ,127 ,19 ,23 ,3.137 ,3.349 ,0.937
0 ,1 ,2000 ,127 ,2048 ,0 ,30.484 ,32.671 ,0.933
0 ,1 ,2000 ,127 ,2048 ,23 ,31.584 ,33.561 ,0.941
0 ,1 ,2000 ,127 ,48 ,0 ,3.038 ,4.75 ,0.64
0 ,1 ,2000 ,127 ,48 ,23 ,33.027 ,35.259 ,0.937
0 ,1 ,2048 ,127 ,0 ,0 ,3.039 ,4.422 ,0.687
0 ,1 ,2048 ,127 ,0 ,23 ,33.124 ,38.138 ,0.869
0 ,1 ,2048 ,127 ,1024 ,0 ,15.974 ,22.101 ,0.723
0 ,1 ,2048 ,127 ,1024 ,23 ,34.138 ,39.756 ,0.859
0 ,1 ,2048 ,127 ,128 ,0 ,5.028 ,6.031 ,0.834
0 ,1 ,2048 ,127 ,128 ,23 ,32.031 ,35.342 ,0.906
0 ,1 ,2048 ,127 ,144 ,0 ,4.971 ,6.858 ,0.725
0 ,1 ,2048 ,127 ,144 ,23 ,31.915 ,36.571 ,0.873
0 ,1 ,2048 ,127 ,1760 ,0 ,27.017 ,30.804 ,0.877
0 ,1 ,2048 ,127 ,1760 ,23 ,36.742 ,46.636 ,0.788
0 ,1 ,2048 ,127 ,1808 ,0 ,27.686 ,31.56 ,0.877
0 ,1 ,2048 ,127 ,1808 ,23 ,35.858 ,41.571 ,0.863
0 ,1 ,2048 ,127 ,1856 ,0 ,28.132 ,30.865 ,0.911
0 ,1 ,2048 ,127 ,1856 ,23 ,35.061 ,43.113 ,0.813
0 ,1 ,2048 ,127 ,1904 ,0 ,28.136 ,31.06 ,0.906
0 ,1 ,2048 ,127 ,1904 ,23 ,37.04 ,51.291 ,0.722
0 ,1 ,2048 ,127 ,192 ,0 ,5.131 ,7.662 ,0.67
0 ,1 ,2048 ,127 ,192 ,23 ,31.421 ,36.868 ,0.852
0 ,1 ,2048 ,127 ,1952 ,0 ,29.478 ,32.207 ,0.915
0 ,1 ,2048 ,127 ,1952 ,23 ,35.721 ,41.805 ,0.854
0 ,1 ,2048 ,127 ,2000 ,0 ,30.193 ,33.171 ,0.91
0 ,1 ,2048 ,127 ,2000 ,23 ,37.127 ,47.851 ,0.776
0 ,1 ,2048 ,127 ,2048 ,0 ,32.362 ,33.903 ,0.955
0 ,1 ,2048 ,127 ,2048 ,23 ,34.087 ,35.347 ,0.964
0 ,1 ,2048 ,127 ,240 ,0 ,4.845 ,7.533 ,0.643
0 ,1 ,2048 ,127 ,240 ,23 ,31.459 ,36.229 ,0.868
0 ,1 ,2048 ,127 ,256 ,0 ,8.423 ,8.247 ,1.021
0 ,1 ,2048 ,127 ,256 ,23 ,32.5 ,36.053 ,0.901
0 ,1 ,2048 ,127 ,288 ,0 ,7.616 ,9.511 ,0.801
0 ,1 ,2048 ,127 ,288 ,23 ,32.728 ,37.416 ,0.875
0 ,1 ,2048 ,127 ,32 ,0 ,3.749 ,4.91 ,0.764
0 ,1 ,2048 ,127 ,32 ,23 ,33.571 ,35.647 ,0.942
0 ,1 ,2048 ,127 ,4096 ,0 ,30.151 ,37.401 ,0.806
0 ,1 ,2048 ,127 ,4096 ,23 ,33.08 ,35.407 ,0.934
0 ,1 ,2048 ,127 ,48 ,0 ,3.024 ,4.447 ,0.68
0 ,1 ,2048 ,127 ,48 ,23 ,32.7 ,35.269 ,0.927
0 ,1 ,2048 ,127 ,512 ,0 ,9.928 ,13.903 ,0.714
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0 ,4 ,656 ,127 ,512 ,23 ,14.344 ,20.61 ,0.696
0 ,4 ,7 ,127 ,6 ,23 ,3.161 ,3.203 ,0.987
0 ,4 ,704 ,127 ,512 ,23 ,14.396 ,21.377 ,0.673
0 ,4 ,736 ,127 ,1024 ,23 ,13.777 ,17.84 ,0.772
0 ,4 ,736 ,127 ,288 ,23 ,13.273 ,17.739 ,0.748
0 ,4 ,752 ,127 ,512 ,23 ,14.422 ,19.826 ,0.727
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0 ,4 ,80 ,127 ,128 ,23 ,5.101 ,4.346 ,1.174
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0 ,4 ,80 ,127 ,48 ,23 ,4.644 ,5.06 ,0.918
0 ,4 ,80 ,127 ,64 ,23 ,5.102 ,4.101 ,1.244
0 ,4 ,800 ,127 ,512 ,23 ,16.352 ,22.201 ,0.737
0 ,4 ,832 ,127 ,1024 ,23 ,15.508 ,20.118 ,0.771
0 ,4 ,832 ,127 ,192 ,23 ,13.498 ,18.374 ,0.735
0 ,4 ,880 ,127 ,1024 ,23 ,15.342 ,20.264 ,0.757
0 ,4 ,880 ,127 ,144 ,23 ,14.276 ,18.818 ,0.759
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0 ,4 ,928 ,127 ,1024 ,23 ,17.968 ,22.487 ,0.799
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0 ,4 ,96 ,127 ,80 ,23 ,5.082 ,3.996 ,1.272
0 ,4 ,976 ,127 ,1024 ,23 ,17.833 ,23.204 ,0.769
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0 ,64 ,1024 ,127 ,736 ,23 ,19.648 ,25.354 ,0.775
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0 ,64 ,1024 ,127 ,832 ,23 ,20.144 ,26.621 ,0.757
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0 ,64 ,12 ,127 ,11 ,23 ,3.145 ,3.252 ,0.967
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0 ,64 ,128 ,127 ,80 ,23 ,5.253 ,7.627 ,0.689
0 ,64 ,128 ,127 ,96 ,23 ,5.255 ,7.744 ,0.679
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0 ,64 ,1312 ,127 ,1024 ,23 ,26.18 ,32.955 ,0.794
0 ,64 ,14 ,127 ,13 ,23 ,3.177 ,3.374 ,0.941
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0 ,64 ,16 ,127 ,192 ,23 ,3.161 ,3.366 ,0.939
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0 ,64 ,16 ,127 ,288 ,23 ,3.177 ,5.36 ,0.593
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0 ,64 ,16 ,127 ,96 ,23 ,3.16 ,3.366 ,0.939
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0 ,64 ,160 ,127 ,16 ,23 ,6.034 ,8.181 ,0.738
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0 ,64 ,1760 ,127 ,2048 ,23 ,32.844 ,42.674 ,0.77
0 ,64 ,1760 ,127 ,288 ,23 ,26.748 ,31.352 ,0.853
0 ,64 ,18 ,127 ,17 ,23 ,3.145 ,3.246 ,0.969
0 ,64 ,1808 ,127 ,2048 ,23 ,34.984 ,52.589 ,0.665
0 ,64 ,1808 ,127 ,240 ,23 ,27.354 ,31.114 ,0.879
0 ,64 ,1856 ,127 ,192 ,23 ,26.956 ,31.912 ,0.845
0 ,64 ,1856 ,127 ,2048 ,23 ,34.706 ,49.761 ,0.697
0 ,64 ,19 ,127 ,18 ,23 ,3.16 ,3.305 ,0.956
0 ,64 ,1904 ,127 ,144 ,23 ,27.98 ,32.474 ,0.862
0 ,64 ,1904 ,127 ,2048 ,23 ,35.375 ,47.52 ,0.744
0 ,64 ,192 ,127 ,176 ,23 ,5.522 ,7.308 ,0.756
0 ,64 ,1952 ,127 ,2048 ,23 ,37.207 ,55.957 ,0.665
0 ,64 ,1952 ,127 ,96 ,23 ,30.383 ,33.955 ,0.895
0 ,64 ,2 ,127 ,1 ,23 ,3.145 ,3.449 ,0.912
0 ,64 ,20 ,127 ,19 ,23 ,3.186 ,3.288 ,0.969
0 ,64 ,2000 ,127 ,2048 ,23 ,37.863 ,50.048 ,0.757
0 ,64 ,2000 ,127 ,48 ,23 ,31.004 ,33.297 ,0.931
0 ,64 ,2048 ,127 ,0 ,23 ,33.109 ,35.365 ,0.936
0 ,64 ,2048 ,127 ,1024 ,23 ,36.863 ,46.556 ,0.792
0 ,64 ,2048 ,127 ,128 ,23 ,31.899 ,35.557 ,0.897
0 ,64 ,2048 ,127 ,144 ,23 ,32.337 ,35.749 ,0.905
0 ,64 ,2048 ,127 ,1760 ,23 ,38.362 ,49.274 ,0.779
0 ,64 ,2048 ,127 ,1808 ,23 ,47.114 ,51.886 ,0.908
0 ,64 ,2048 ,127 ,1856 ,23 ,42.602 ,50.278 ,0.847
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0 ,64 ,2048 ,127 ,1952 ,23 ,53.408 ,53.41 ,1.0
0 ,64 ,2048 ,127 ,2000 ,23 ,46.835 ,61.275 ,0.764
0 ,64 ,2048 ,127 ,2048 ,23 ,48.348 ,61.244 ,0.789
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0 ,64 ,2048 ,127 ,288 ,23 ,32.194 ,36.297 ,0.887
0 ,64 ,2048 ,127 ,32 ,23 ,33.772 ,36.12 ,0.935
0 ,64 ,2048 ,127 ,4096 ,23 ,44.43 ,65.192 ,0.682
0 ,64 ,2048 ,127 ,48 ,23 ,32.937 ,34.616 ,0.952
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0 ,64 ,2048 ,127 ,96 ,23 ,32.17 ,35.893 ,0.896
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0 ,64 ,2096 ,127 ,2048 ,23 ,39.554 ,55.173 ,0.717
0 ,64 ,21 ,127 ,20 ,23 ,3.161 ,3.255 ,0.971
0 ,64 ,2144 ,127 ,2048 ,23 ,56.928 ,58.526 ,0.973
0 ,64 ,2192 ,127 ,2048 ,23 ,58.545 ,55.186 ,1.061
0 ,64 ,22 ,127 ,21 ,23 ,3.161 ,3.203 ,0.987
0 ,64 ,224 ,127 ,128 ,23 ,5.687 ,7.27 ,0.782
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0 ,64 ,2240 ,127 ,2048 ,23 ,58.563 ,55.918 ,1.047
0 ,64 ,2288 ,127 ,2048 ,23 ,58.429 ,55.175 ,1.059
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0 ,64 ,2336 ,127 ,2048 ,23 ,67.585 ,57.044 ,1.185
0 ,64 ,24 ,127 ,23 ,23 ,3.159 ,3.309 ,0.955
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0 ,64 ,256 ,127 ,96 ,23 ,8.318 ,10.306 ,0.807
0 ,64 ,26 ,127 ,25 ,23 ,3.153 ,3.394 ,0.929
0 ,64 ,27 ,127 ,26 ,23 ,3.161 ,3.349 ,0.944
0 ,64 ,272 ,127 ,128 ,23 ,7.589 ,9.763 ,0.777
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0 ,64 ,28 ,127 ,27 ,23 ,3.161 ,3.5 ,0.903
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0 ,64 ,29 ,127 ,28 ,23 ,3.161 ,3.347 ,0.944
0 ,64 ,3 ,127 ,2 ,23 ,3.178 ,3.302 ,0.962
0 ,64 ,30 ,127 ,29 ,23 ,3.177 ,3.604 ,0.881
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0 ,64 ,464 ,127 ,48 ,23 ,10.167 ,13.469 ,0.755
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0 ,64 ,5 ,127 ,4 ,23 ,3.161 ,3.341 ,0.946
0 ,64 ,512 ,127 ,0 ,23 ,12.66 ,15.548 ,0.814
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0 ,64 ,512 ,127 ,192 ,23 ,9.987 ,16.142 ,0.619
0 ,64 ,512 ,127 ,224 ,23 ,10.083 ,14.313 ,0.704
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0 ,64 ,512 ,127 ,320 ,23 ,10.655 ,15.312 ,0.696
0 ,64 ,512 ,127 ,368 ,23 ,10.903 ,19.033 ,0.573
0 ,64 ,512 ,127 ,416 ,23 ,11.917 ,16.12 ,0.739
0 ,64 ,512 ,127 ,464 ,23 ,13.572 ,16.613 ,0.817
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0 ,64 ,512 ,127 ,512 ,23 ,13.403 ,16.757 ,0.8
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0 ,64 ,560 ,127 ,512 ,23 ,12.314 ,16.035 ,0.768
0 ,64 ,6 ,127 ,5 ,23 ,3.153 ,3.264 ,0.966
0 ,64 ,608 ,127 ,512 ,23 ,12.215 ,16.937 ,0.721
0 ,64 ,64 ,127 ,0 ,23 ,4.706 ,5.479 ,0.859
0 ,64 ,64 ,127 ,144 ,23 ,4.425 ,5.032 ,0.879
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0 ,64 ,64 ,127 ,192 ,23 ,4.404 ,5.307 ,0.83
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0 ,64 ,64 ,127 ,256 ,23 ,4.523 ,4.998 ,0.905
0 ,64 ,64 ,127 ,288 ,23 ,4.402 ,5.587 ,0.788
0 ,64 ,64 ,127 ,48 ,23 ,4.404 ,5.033 ,0.875
0 ,64 ,64 ,127 ,64 ,23 ,4.402 ,5.03 ,0.875
0 ,64 ,64 ,127 ,96 ,23 ,4.692 ,5.006 ,0.937
0 ,64 ,656 ,127 ,512 ,23 ,15.147 ,20.982 ,0.722
0 ,64 ,7 ,127 ,6 ,23 ,3.161 ,3.322 ,0.951
0 ,64 ,704 ,127 ,512 ,23 ,16.274 ,21.22 ,0.767
0 ,64 ,736 ,127 ,1024 ,23 ,14.662 ,20.05 ,0.731
0 ,64 ,736 ,127 ,288 ,23 ,13.172 ,18.485 ,0.713
0 ,64 ,752 ,127 ,512 ,23 ,14.427 ,20.594 ,0.701
0 ,64 ,784 ,127 ,1024 ,23 ,16.441 ,22.664 ,0.725
0 ,64 ,784 ,127 ,240 ,23 ,13.402 ,17.85 ,0.751
0 ,64 ,8 ,127 ,7 ,23 ,3.161 ,3.482 ,0.908
0 ,64 ,80 ,127 ,128 ,23 ,5.032 ,4.142 ,1.215
0 ,64 ,80 ,127 ,32 ,23 ,4.522 ,4.981 ,0.908
0 ,64 ,80 ,127 ,48 ,23 ,4.644 ,5.048 ,0.92
0 ,64 ,80 ,127 ,64 ,23 ,5.035 ,4.293 ,1.173
0 ,64 ,800 ,127 ,512 ,23 ,17.382 ,24.301 ,0.715
0 ,64 ,832 ,127 ,1024 ,23 ,17.625 ,22.821 ,0.772
0 ,64 ,832 ,127 ,192 ,23 ,13.428 ,18.869 ,0.712
0 ,64 ,880 ,127 ,1024 ,23 ,17.879 ,23.056 ,0.775
0 ,64 ,880 ,127 ,144 ,23 ,14.114 ,18.776 ,0.752
0 ,64 ,9 ,127 ,8 ,23 ,3.168 ,3.321 ,0.954
0 ,64 ,928 ,127 ,1024 ,23 ,18.496 ,24.652 ,0.75
0 ,64 ,928 ,127 ,96 ,23 ,16.785 ,20.217 ,0.83
0 ,64 ,96 ,127 ,80 ,23 ,5.058 ,4.14 ,1.222
0 ,64 ,976 ,127 ,1024 ,23 ,19.09 ,25.806 ,0.74
0 ,64 ,976 ,127 ,48 ,23 ,17.251 ,20.872 ,0.827
1 ,1 ,2048 ,127 ,32 ,0 ,3.097 ,3.169 ,0.977
1 ,1 ,2048 ,127 ,32 ,23 ,33.081 ,35.633 ,0.928
1 ,1 ,256 ,127 ,64 ,0 ,5.057 ,4.086 ,1.238
1 ,1 ,256 ,127 ,64 ,23 ,7.95 ,11.379 ,0.699
1 ,16 ,2048 ,127 ,32 ,23 ,33.403 ,35.357 ,0.945
1 ,16 ,256 ,127 ,64 ,23 ,9.528 ,11.335 ,0.841
1 ,256 ,2048 ,127 ,32 ,23 ,32.954 ,34.96 ,0.943
1 ,256 ,256 ,127 ,64 ,23 ,9.146 ,10.794 ,0.847
1 ,4 ,2048 ,127 ,32 ,23 ,33.177 ,35.606 ,0.932
1 ,4 ,256 ,127 ,64 ,23 ,7.868 ,11.304 ,0.696
1 ,64 ,2048 ,127 ,32 ,23 ,33.723 ,35.765 ,0.943
1 ,64 ,256 ,127 ,64 ,23 ,9.038 ,11.406 ,0.792
105 ,1 ,256 ,127 ,64 ,0 ,5.634 ,3.956 ,1.424
105 ,1 ,256 ,127 ,64 ,23 ,8.222 ,11.162 ,0.737
105 ,16 ,256 ,127 ,64 ,23 ,8.202 ,11.547 ,0.71
105 ,256 ,256 ,127 ,64 ,23 ,10.737 ,11.705 ,0.917
105 ,4 ,256 ,127 ,64 ,23 ,8.221 ,11.32 ,0.726
105 ,64 ,256 ,127 ,64 ,23 ,8.221 ,11.637 ,0.706
15 ,1 ,256 ,127 ,64 ,0 ,5.098 ,3.704 ,1.376
15 ,1 ,256 ,127 ,64 ,23 ,7.842 ,11.545 ,0.679
15 ,16 ,256 ,127 ,64 ,23 ,7.974 ,11.892 ,0.671
15 ,256 ,256 ,127 ,64 ,23 ,9.086 ,11.35 ,0.801
15 ,4 ,256 ,127 ,64 ,23 ,7.946 ,11.221 ,0.708
15 ,64 ,256 ,127 ,64 ,23 ,9.209 ,11.459 ,0.804
2 ,1 ,2048 ,127 ,64 ,0 ,4.814 ,5.635 ,0.854
2 ,1 ,2048 ,127 ,64 ,23 ,32.353 ,35.062 ,0.923
2 ,1 ,256 ,127 ,64 ,0 ,4.65 ,3.772 ,1.233
2 ,1 ,256 ,127 ,64 ,23 ,7.992 ,11.405 ,0.701
2 ,16 ,2048 ,127 ,64 ,23 ,32.676 ,36.217 ,0.902
2 ,16 ,256 ,127 ,64 ,23 ,8.101 ,11.102 ,0.73
2 ,256 ,2048 ,127 ,64 ,23 ,32.515 ,34.674 ,0.938
2 ,256 ,256 ,127 ,64 ,23 ,9.231 ,11.704 ,0.789
2 ,4 ,2048 ,127 ,64 ,23 ,32.761 ,35.128 ,0.933
2 ,4 ,256 ,127 ,64 ,23 ,7.913 ,11.403 ,0.694
2 ,64 ,2048 ,127 ,64 ,23 ,32.715 ,35.393 ,0.924
2 ,64 ,256 ,127 ,64 ,23 ,9.352 ,11.399 ,0.82
3 ,1 ,2048 ,127 ,128 ,0 ,4.762 ,7.398 ,0.644
3 ,1 ,2048 ,127 ,128 ,23 ,32.033 ,36.078 ,0.888
3 ,1 ,256 ,127 ,64 ,0 ,4.802 ,3.903 ,1.23
3 ,1 ,256 ,127 ,64 ,23 ,8.052 ,12.555 ,0.641
3 ,16 ,2048 ,127 ,128 ,23 ,32.283 ,35.991 ,0.897
3 ,16 ,256 ,127 ,64 ,23 ,8.082 ,11.55 ,0.7
3 ,256 ,2048 ,127 ,128 ,23 ,31.861 ,35.979 ,0.886
3 ,256 ,256 ,127 ,64 ,23 ,9.626 ,11.665 ,0.825
3 ,4 ,2048 ,127 ,128 ,23 ,31.805 ,36.182 ,0.879
3 ,4 ,256 ,127 ,64 ,23 ,8.113 ,11.608 ,0.699
3 ,64 ,2048 ,127 ,128 ,23 ,31.828 ,36.292 ,0.877
3 ,64 ,256 ,127 ,64 ,23 ,9.415 ,11.211 ,0.84
30 ,1 ,256 ,127 ,64 ,0 ,4.805 ,4.243 ,1.133
30 ,1 ,256 ,127 ,64 ,23 ,8.108 ,12.058 ,0.672
30 ,16 ,256 ,127 ,64 ,23 ,8.033 ,11.376 ,0.706
30 ,256 ,256 ,127 ,64 ,23 ,9.271 ,11.242 ,0.825
30 ,4 ,256 ,127 ,64 ,23 ,7.963 ,11.373 ,0.7
30 ,64 ,256 ,127 ,64 ,23 ,9.405 ,11.978 ,0.785
4 ,1 ,2048 ,127 ,256 ,0 ,8.184 ,9.293 ,0.881
4 ,1 ,2048 ,127 ,256 ,23 ,32.519 ,36.906 ,0.881
4 ,1 ,256 ,127 ,64 ,0 ,4.612 ,3.916 ,1.178
4 ,1 ,256 ,127 ,64 ,23 ,8.086 ,11.768 ,0.687
4 ,16 ,2048 ,127 ,256 ,23 ,32.358 ,36.867 ,0.878
4 ,16 ,256 ,127 ,64 ,23 ,8.252 ,11.421 ,0.723
4 ,256 ,2048 ,127 ,256 ,23 ,32.511 ,36.341 ,0.895
4 ,256 ,256 ,127 ,64 ,23 ,9.471 ,11.957 ,0.792
4 ,4 ,2048 ,127 ,256 ,23 ,32.482 ,36.985 ,0.878
4 ,4 ,256 ,127 ,64 ,23 ,8.109 ,11.491 ,0.706
4 ,64 ,2048 ,127 ,256 ,23 ,32.575 ,35.95 ,0.906
4 ,64 ,256 ,127 ,64 ,23 ,9.371 ,11.319 ,0.828
4080 ,1 ,31 ,127 ,30 ,0 ,5.576 ,4.368 ,1.276
4080 ,1 ,31 ,127 ,30 ,23 ,5.659 ,4.474 ,1.265
4080 ,1 ,32 ,127 ,31 ,0 ,5.663 ,4.347 ,1.303
4080 ,1 ,32 ,127 ,31 ,23 ,5.632 ,4.474 ,1.259
4080 ,16 ,31 ,127 ,30 ,23 ,5.687 ,4.606 ,1.235
4080 ,16 ,32 ,127 ,31 ,23 ,6.282 ,4.5 ,1.396
4080 ,256 ,31 ,127 ,30 ,23 ,5.658 ,4.477 ,1.264
4080 ,256 ,32 ,127 ,31 ,23 ,5.701 ,4.393 ,1.298
4080 ,4 ,31 ,127 ,30 ,23 ,5.658 ,4.476 ,1.264
4080 ,4 ,32 ,127 ,31 ,23 ,5.659 ,4.336 ,1.305
4080 ,64 ,31 ,127 ,30 ,23 ,5.659 ,4.622 ,1.224
4080 ,64 ,32 ,127 ,31 ,23 ,5.688 ,4.5 ,1.264
4081 ,1 ,29 ,127 ,28 ,0 ,5.521 ,4.253 ,1.298
4081 ,1 ,29 ,127 ,28 ,23 ,5.747 ,4.778 ,1.203
4081 ,1 ,30 ,127 ,29 ,0 ,5.493 ,4.55 ,1.207
4081 ,1 ,30 ,127 ,29 ,23 ,5.661 ,4.652 ,1.217
4081 ,16 ,29 ,127 ,28 ,23 ,5.689 ,4.544 ,1.252
4081 ,16 ,30 ,127 ,29 ,23 ,6.183 ,4.74 ,1.304
4081 ,256 ,29 ,127 ,28 ,23 ,5.702 ,4.477 ,1.274
4081 ,256 ,30 ,127 ,29 ,23 ,5.659 ,4.375 ,1.293
4081 ,4 ,29 ,127 ,28 ,23 ,5.687 ,4.77 ,1.192
4081 ,4 ,30 ,127 ,29 ,23 ,5.687 ,4.519 ,1.258
4081 ,64 ,29 ,127 ,28 ,23 ,5.689 ,4.668 ,1.219
4081 ,64 ,30 ,127 ,29 ,23 ,5.717 ,4.647 ,1.23
4082 ,1 ,27 ,127 ,26 ,0 ,5.467 ,4.284 ,1.276
4082 ,1 ,27 ,127 ,26 ,23 ,5.659 ,4.668 ,1.212
4082 ,1 ,28 ,127 ,27 ,0 ,5.493 ,4.366 ,1.258
4082 ,1 ,28 ,127 ,27 ,23 ,5.717 ,4.58 ,1.248
4082 ,16 ,27 ,127 ,26 ,23 ,5.794 ,4.337 ,1.336
4082 ,16 ,28 ,127 ,27 ,23 ,5.66 ,4.476 ,1.264
4082 ,256 ,27 ,127 ,26 ,23 ,5.659 ,4.402 ,1.286
4082 ,256 ,28 ,127 ,27 ,23 ,5.659 ,4.531 ,1.249
4082 ,4 ,27 ,127 ,26 ,23 ,5.69 ,4.381 ,1.299
4082 ,4 ,28 ,127 ,27 ,23 ,5.66 ,4.499 ,1.258
4082 ,64 ,27 ,127 ,26 ,23 ,5.743 ,4.5 ,1.276
4082 ,64 ,28 ,127 ,27 ,23 ,5.66 ,4.668 ,1.213
4083 ,1 ,25 ,127 ,24 ,0 ,5.467 ,4.348 ,1.257
4083 ,1 ,25 ,127 ,24 ,23 ,5.632 ,4.644 ,1.213
4083 ,1 ,26 ,127 ,25 ,0 ,5.441 ,4.369 ,1.245
4083 ,1 ,26 ,127 ,25 ,23 ,5.659 ,4.508 ,1.255
4083 ,16 ,25 ,127 ,24 ,23 ,5.779 ,4.644 ,1.244
4083 ,16 ,26 ,127 ,25 ,23 ,5.631 ,4.545 ,1.239
4083 ,256 ,25 ,127 ,24 ,23 ,5.706 ,4.337 ,1.316
4083 ,256 ,26 ,127 ,25 ,23 ,5.659 ,4.769 ,1.187
4083 ,4 ,25 ,127 ,24 ,23 ,5.701 ,4.667 ,1.222
4083 ,4 ,26 ,127 ,25 ,23 ,5.689 ,4.381 ,1.299
4083 ,64 ,25 ,127 ,24 ,23 ,5.688 ,4.477 ,1.27
4083 ,64 ,26 ,127 ,25 ,23 ,5.702 ,4.49 ,1.27
4084 ,1 ,23 ,127 ,22 ,0 ,5.441 ,4.328 ,1.257
4084 ,1 ,23 ,127 ,22 ,23 ,5.659 ,4.655 ,1.216
4084 ,1 ,24 ,127 ,23 ,0 ,5.584 ,4.327 ,1.291
4084 ,1 ,24 ,127 ,23 ,23 ,5.689 ,4.358 ,1.305
4084 ,16 ,23 ,127 ,22 ,23 ,5.706 ,4.545 ,1.255
4084 ,16 ,24 ,127 ,23 ,23 ,5.687 ,4.545 ,1.251
4084 ,256 ,23 ,127 ,22 ,23 ,5.658 ,4.499 ,1.258
4084 ,256 ,24 ,127 ,23 ,23 ,5.717 ,4.598 ,1.243
4084 ,4 ,23 ,127 ,22 ,23 ,5.659 ,4.746 ,1.192
4084 ,4 ,24 ,127 ,23 ,23 ,5.66 ,4.665 ,1.213
4084 ,64 ,23 ,127 ,22 ,23 ,5.659 ,4.638 ,1.22
4084 ,64 ,24 ,127 ,23 ,23 ,5.687 ,4.897 ,1.161
4085 ,1 ,21 ,127 ,20 ,0 ,5.603 ,4.296 ,1.304
4085 ,1 ,21 ,127 ,20 ,23 ,5.717 ,4.381 ,1.305
4085 ,1 ,22 ,127 ,21 ,0 ,5.604 ,4.53 ,1.237
4085 ,1 ,22 ,127 ,21 ,23 ,5.678 ,4.547 ,1.249
4085 ,16 ,21 ,127 ,20 ,23 ,5.659 ,4.568 ,1.239
4085 ,16 ,22 ,127 ,21 ,23 ,5.659 ,4.544 ,1.245
4085 ,256 ,21 ,127 ,20 ,23 ,5.688 ,4.668 ,1.218
4085 ,256 ,22 ,127 ,21 ,23 ,5.658 ,4.644 ,1.219
4085 ,4 ,21 ,127 ,20 ,23 ,5.736 ,4.381 ,1.309
4085 ,4 ,22 ,127 ,21 ,23 ,5.692 ,4.499 ,1.265
4085 ,64 ,21 ,127 ,20 ,23 ,5.687 ,4.403 ,1.292
4085 ,64 ,22 ,127 ,21 ,23 ,5.688 ,4.847 ,1.173
4086 ,1 ,19 ,127 ,18 ,0 ,5.466 ,4.462 ,1.225
4086 ,1 ,19 ,127 ,18 ,23 ,5.661 ,4.476 ,1.265
4086 ,1 ,20 ,127 ,19 ,0 ,5.467 ,4.256 ,1.284
4086 ,1 ,20 ,127 ,19 ,23 ,5.631 ,4.597 ,1.225
4086 ,16 ,19 ,127 ,18 ,23 ,5.687 ,4.381 ,1.298
4086 ,16 ,20 ,127 ,19 ,23 ,5.735 ,4.644 ,1.235
4086 ,256 ,19 ,127 ,18 ,23 ,5.632 ,4.545 ,1.239
4086 ,256 ,20 ,127 ,19 ,23 ,5.631 ,4.425 ,1.273
4086 ,4 ,19 ,127 ,18 ,23 ,5.717 ,4.699 ,1.217
4086 ,4 ,20 ,127 ,19 ,23 ,5.734 ,5.147 ,1.114
4086 ,64 ,19 ,127 ,18 ,23 ,5.659 ,4.359 ,1.298
4086 ,64 ,20 ,127 ,19 ,23 ,5.717 ,4.499 ,1.271
4087 ,1 ,17 ,127 ,16 ,0 ,5.522 ,4.674 ,1.181
4087 ,1 ,17 ,127 ,16 ,23 ,5.659 ,4.499 ,1.258
4087 ,1 ,18 ,127 ,17 ,0 ,5.607 ,4.401 ,1.274
4087 ,1 ,18 ,127 ,17 ,23 ,5.688 ,4.402 ,1.292
4087 ,16 ,17 ,127 ,16 ,23 ,5.812 ,4.499 ,1.292
4087 ,16 ,18 ,127 ,17 ,23 ,5.716 ,4.538 ,1.26
4087 ,256 ,17 ,127 ,16 ,23 ,5.688 ,4.638 ,1.226
4087 ,256 ,18 ,127 ,17 ,23 ,5.802 ,4.522 ,1.283
4087 ,4 ,17 ,127 ,16 ,23 ,5.717 ,4.337 ,1.318
4087 ,4 ,18 ,127 ,17 ,23 ,5.682 ,4.476 ,1.269
4087 ,64 ,17 ,127 ,16 ,23 ,5.659 ,4.899 ,1.155
4087 ,64 ,18 ,127 ,17 ,23 ,5.688 ,4.477 ,1.271
4088 ,1 ,15 ,127 ,14 ,0 ,5.551 ,4.566 ,1.216
4088 ,1 ,15 ,127 ,14 ,23 ,5.848 ,4.521 ,1.293
4088 ,1 ,16 ,127 ,15 ,0 ,5.469 ,4.524 ,1.209
4088 ,1 ,16 ,127 ,15 ,23 ,5.688 ,4.454 ,1.277
4088 ,16 ,15 ,127 ,14 ,23 ,5.658 ,4.402 ,1.285
4088 ,16 ,16 ,127 ,15 ,23 ,5.658 ,4.597 ,1.231
4088 ,256 ,15 ,127 ,14 ,23 ,5.659 ,4.698 ,1.204
4088 ,256 ,16 ,127 ,15 ,23 ,5.705 ,4.477 ,1.274
4088 ,4 ,15 ,127 ,14 ,23 ,5.78 ,4.5 ,1.284
4088 ,4 ,16 ,127 ,15 ,23 ,5.693 ,4.469 ,1.274
4088 ,64 ,15 ,127 ,14 ,23 ,5.687 ,4.499 ,1.264
4088 ,64 ,16 ,127 ,15 ,23 ,5.676 ,4.524 ,1.255
4089 ,1 ,13 ,127 ,12 ,0 ,5.616 ,5.667 ,0.991
4089 ,1 ,13 ,127 ,12 ,23 ,5.688 ,4.515 ,1.26
4089 ,1 ,14 ,127 ,13 ,0 ,5.549 ,4.362 ,1.272
4089 ,1 ,14 ,127 ,13 ,23 ,5.659 ,4.403 ,1.285
4089 ,16 ,13 ,127 ,12 ,23 ,5.718 ,4.75 ,1.204
4089 ,16 ,14 ,127 ,13 ,23 ,5.688 ,4.598 ,1.237
4089 ,256 ,13 ,127 ,12 ,23 ,5.766 ,4.499 ,1.282
4089 ,256 ,14 ,127 ,13 ,23 ,5.688 ,4.597 ,1.237
4089 ,4 ,13 ,127 ,12 ,23 ,5.688 ,4.568 ,1.245
4089 ,4 ,14 ,127 ,13 ,23 ,5.688 ,4.563 ,1.247
4089 ,64 ,13 ,127 ,12 ,23 ,5.688 ,4.544 ,1.252
4089 ,64 ,14 ,127 ,13 ,23 ,5.742 ,4.499 ,1.276
4090 ,1 ,11 ,127 ,10 ,0 ,5.549 ,4.651 ,1.193
4090 ,1 ,11 ,127 ,10 ,23 ,5.687 ,4.402 ,1.292
4090 ,1 ,12 ,127 ,11 ,0 ,5.414 ,4.686 ,1.155
4090 ,1 ,12 ,127 ,11 ,23 ,5.717 ,4.522 ,1.264
4090 ,16 ,11 ,127 ,10 ,23 ,5.632 ,4.496 ,1.253
4090 ,16 ,12 ,127 ,11 ,23 ,5.746 ,4.523 ,1.27
4090 ,256 ,11 ,127 ,10 ,23 ,5.659 ,4.597 ,1.231
4090 ,256 ,12 ,127 ,11 ,23 ,5.66 ,4.359 ,1.299
4090 ,4 ,11 ,127 ,10 ,23 ,5.674 ,4.645 ,1.222
4090 ,4 ,12 ,127 ,11 ,23 ,5.677 ,4.5 ,1.262
4090 ,64 ,11 ,127 ,10 ,23 ,5.659 ,4.621 ,1.225
4090 ,64 ,12 ,127 ,11 ,23 ,5.659 ,4.535 ,1.248
4091 ,1 ,10 ,127 ,9 ,0 ,5.466 ,4.59 ,1.191
4091 ,1 ,10 ,127 ,9 ,23 ,5.659 ,4.523 ,1.251
4091 ,1 ,9 ,127 ,8 ,0 ,5.505 ,4.284 ,1.285
4091 ,1 ,9 ,127 ,8 ,23 ,5.659 ,4.499 ,1.258
4091 ,16 ,10 ,127 ,9 ,23 ,5.717 ,4.545 ,1.258
4091 ,16 ,9 ,127 ,8 ,23 ,5.687 ,4.522 ,1.258
4091 ,256 ,10 ,127 ,9 ,23 ,5.659 ,4.568 ,1.239
4091 ,256 ,9 ,127 ,8 ,23 ,5.63 ,4.522 ,1.245
4091 ,4 ,10 ,127 ,9 ,23 ,5.717 ,4.5 ,1.27
4091 ,4 ,9 ,127 ,8 ,23 ,5.718 ,4.546 ,1.258
4091 ,64 ,10 ,127 ,9 ,23 ,5.687 ,4.693 ,1.212
4091 ,64 ,9 ,127 ,8 ,23 ,5.659 ,4.522 ,1.251
4092 ,1 ,7 ,127 ,6 ,0 ,5.904 ,4.489 ,1.315
4092 ,1 ,7 ,127 ,6 ,23 ,5.734 ,4.492 ,1.277
4092 ,1 ,8 ,127 ,7 ,0 ,5.468 ,4.407 ,1.241
4092 ,1 ,8 ,127 ,7 ,23 ,5.687 ,4.693 ,1.212
4092 ,16 ,7 ,127 ,6 ,23 ,5.659 ,4.644 ,1.219
4092 ,16 ,8 ,127 ,7 ,23 ,5.659 ,4.898 ,1.155
4092 ,256 ,7 ,127 ,6 ,23 ,5.688 ,4.382 ,1.298
4092 ,256 ,8 ,127 ,7 ,23 ,5.631 ,4.608 ,1.222
4092 ,4 ,7 ,127 ,6 ,23 ,5.688 ,4.403 ,1.292
4092 ,4 ,8 ,127 ,7 ,23 ,5.688 ,4.544 ,1.252
4092 ,64 ,7 ,127 ,6 ,23 ,5.688 ,4.597 ,1.237
4092 ,64 ,8 ,127 ,7 ,23 ,5.687 ,4.646 ,1.224
4093 ,1 ,5 ,127 ,4 ,0 ,5.339 ,4.35 ,1.227
4093 ,1 ,5 ,127 ,4 ,23 ,5.716 ,4.497 ,1.271
4093 ,1 ,6 ,127 ,5 ,0 ,5.473 ,4.369 ,1.253
4093 ,1 ,6 ,127 ,5 ,23 ,5.718 ,4.568 ,1.252
4093 ,16 ,5 ,127 ,4 ,23 ,5.717 ,4.358 ,1.312
4093 ,16 ,6 ,127 ,5 ,23 ,5.688 ,4.499 ,1.264
4093 ,256 ,5 ,127 ,4 ,23 ,5.748 ,4.337 ,1.325
4093 ,256 ,6 ,127 ,5 ,23 ,5.67 ,4.454 ,1.273
4093 ,4 ,5 ,127 ,4 ,23 ,5.717 ,4.789 ,1.194
4093 ,4 ,6 ,127 ,5 ,23 ,5.688 ,4.875 ,1.167
4093 ,64 ,5 ,127 ,4 ,23 ,5.674 ,4.414 ,1.286
4093 ,64 ,6 ,127 ,5 ,23 ,5.907 ,4.397 ,1.343
4094 ,1 ,3 ,127 ,2 ,0 ,5.445 ,4.133 ,1.317
4094 ,1 ,3 ,127 ,2 ,23 ,5.718 ,4.499 ,1.271
4094 ,1 ,4 ,127 ,3 ,0 ,5.735 ,4.4 ,1.303
4094 ,1 ,4 ,127 ,3 ,23 ,5.689 ,4.477 ,1.271
4094 ,16 ,3 ,127 ,2 ,23 ,5.747 ,4.57 ,1.258
4094 ,16 ,4 ,127 ,3 ,23 ,5.805 ,4.622 ,1.256
4094 ,256 ,3 ,127 ,2 ,23 ,5.66 ,4.48 ,1.263
4094 ,256 ,4 ,127 ,3 ,23 ,5.748 ,4.378 ,1.313
4094 ,4 ,3 ,127 ,2 ,23 ,5.659 ,4.518 ,1.253
4094 ,4 ,4 ,127 ,3 ,23 ,5.688 ,4.512 ,1.261
4094 ,64 ,3 ,127 ,2 ,23 ,5.718 ,4.36 ,1.311
4094 ,64 ,4 ,127 ,3 ,23 ,5.687 ,4.381 ,1.298
4095 ,1 ,1 ,127 ,0 ,0 ,4.077 ,4.055 ,1.005
4095 ,1 ,1 ,127 ,0 ,23 ,5.573 ,4.622 ,1.206
4095 ,1 ,2 ,127 ,1 ,0 ,5.532 ,4.115 ,1.344
4095 ,1 ,2 ,127 ,1 ,23 ,5.72 ,4.5 ,1.271
4095 ,16 ,1 ,127 ,0 ,23 ,5.353 ,4.404 ,1.216
4095 ,16 ,2 ,127 ,1 ,23 ,5.707 ,4.599 ,1.241
4095 ,256 ,1 ,127 ,0 ,23 ,5.393 ,4.577 ,1.178
4095 ,256 ,2 ,127 ,1 ,23 ,5.72 ,4.525 ,1.264
4095 ,4 ,1 ,127 ,0 ,23 ,5.509 ,4.383 ,1.257
4095 ,4 ,2 ,127 ,1 ,23 ,5.69 ,4.546 ,1.252
4095 ,64 ,1 ,127 ,0 ,23 ,5.31 ,4.339 ,1.224
4095 ,64 ,2 ,127 ,1 ,23 ,5.719 ,4.548 ,1.258
45 ,1 ,256 ,127 ,64 ,0 ,5.411 ,3.993 ,1.355
45 ,1 ,256 ,127 ,64 ,23 ,8.029 ,11.493 ,0.699
45 ,16 ,256 ,127 ,64 ,23 ,8.142 ,11.596 ,0.702
45 ,256 ,256 ,127 ,64 ,23 ,9.462 ,11.824 ,0.8
45 ,4 ,256 ,127 ,64 ,23 ,8.106 ,11.413 ,0.71
45 ,64 ,256 ,127 ,64 ,23 ,9.655 ,11.369 ,0.849
5 ,1 ,2048 ,127 ,512 ,0 ,9.959 ,14.513 ,0.686
5 ,1 ,2048 ,127 ,512 ,23 ,33.09 ,36.424 ,0.908
5 ,1 ,256 ,127 ,64 ,0 ,4.693 ,3.885 ,1.208
5 ,1 ,256 ,127 ,64 ,23 ,8.114 ,12.26 ,0.662
5 ,16 ,2048 ,127 ,512 ,23 ,33.891 ,39.937 ,0.849
5 ,16 ,256 ,127 ,64 ,23 ,8.081 ,11.652 ,0.693
5 ,256 ,2048 ,127 ,512 ,23 ,34.159 ,39.246 ,0.87
5 ,256 ,256 ,127 ,64 ,23 ,9.46 ,12.217 ,0.774
5 ,4 ,2048 ,127 ,512 ,23 ,34.314 ,39.586 ,0.867
5 ,4 ,256 ,127 ,64 ,23 ,8.104 ,11.498 ,0.705
5 ,64 ,2048 ,127 ,512 ,23 ,33.874 ,39.485 ,0.858
5 ,64 ,256 ,127 ,64 ,23 ,9.593 ,11.388 ,0.842
6 ,1 ,2048 ,127 ,1024 ,0 ,17.103 ,19.603 ,0.872
6 ,1 ,2048 ,127 ,1024 ,23 ,33.706 ,37.99 ,0.887
6 ,1 ,256 ,127 ,64 ,0 ,4.831 ,4.211 ,1.147
6 ,1 ,256 ,127 ,64 ,23 ,8.156 ,11.409 ,0.715
6 ,16 ,2048 ,127 ,1024 ,23 ,36.265 ,44.042 ,0.823
6 ,16 ,256 ,127 ,64 ,23 ,8.123 ,11.167 ,0.727
6 ,256 ,2048 ,127 ,1024 ,23 ,37.489 ,44.428 ,0.844
6 ,256 ,256 ,127 ,64 ,23 ,9.529 ,11.198 ,0.851
6 ,4 ,2048 ,127 ,1024 ,23 ,34.235 ,42.948 ,0.797
6 ,4 ,256 ,127 ,64 ,23 ,8.042 ,11.644 ,0.691
6 ,64 ,2048 ,127 ,1024 ,23 ,36.438 ,43.778 ,0.832
6 ,64 ,256 ,127 ,64 ,23 ,8.144 ,11.219 ,0.726
60 ,1 ,256 ,127 ,64 ,0 ,4.613 ,3.868 ,1.193
60 ,1 ,256 ,127 ,64 ,23 ,8.055 ,11.715 ,0.688
60 ,16 ,256 ,127 ,64 ,23 ,8.138 ,11.888 ,0.685
60 ,256 ,256 ,127 ,64 ,23 ,9.701 ,11.935 ,0.813
60 ,4 ,256 ,127 ,64 ,23 ,8.132 ,11.762 ,0.691
60 ,64 ,256 ,127 ,64 ,23 ,9.608 ,11.642 ,0.825
7 ,1 ,2048 ,127 ,2048 ,0 ,28.209 ,33.848 ,0.833
7 ,1 ,2048 ,127 ,2048 ,23 ,33.134 ,35.77 ,0.926
7 ,1 ,256 ,127 ,64 ,0 ,4.7 ,4.373 ,1.075
7 ,1 ,256 ,127 ,64 ,23 ,8.105 ,11.577 ,0.7
7 ,16 ,2048 ,127 ,2048 ,23 ,44.67 ,85.315 ,0.524
7 ,16 ,256 ,127 ,64 ,23 ,8.104 ,11.19 ,0.724
7 ,256 ,2048 ,127 ,2048 ,23 ,52.731 ,58.99 ,0.894
7 ,256 ,256 ,127 ,64 ,23 ,9.461 ,11.938 ,0.793
7 ,4 ,2048 ,127 ,2048 ,23 ,34.073 ,39.541 ,0.862
7 ,4 ,256 ,127 ,64 ,23 ,8.09 ,11.641 ,0.695
7 ,64 ,2048 ,127 ,2048 ,23 ,61.246 ,65.594 ,0.934
7 ,64 ,256 ,127 ,64 ,23 ,8.134 ,11.558 ,0.704
75 ,1 ,256 ,127 ,64 ,0 ,5.008 ,4.024 ,1.244
75 ,1 ,256 ,127 ,64 ,23 ,8.146 ,11.817 ,0.689
75 ,16 ,256 ,127 ,64 ,23 ,8.145 ,11.39 ,0.715
75 ,256 ,256 ,127 ,64 ,23 ,10.768 ,11.612 ,0.927
75 ,4 ,256 ,127 ,64 ,23 ,8.105 ,11.661 ,0.695
75 ,64 ,256 ,127 ,64 ,23 ,8.137 ,11.039 ,0.737
8 ,1 ,2048 ,127 ,4096 ,0 ,31.237 ,38.429 ,0.813
8 ,1 ,2048 ,127 ,4096 ,23 ,32.959 ,34.762 ,0.948
8 ,16 ,2048 ,127 ,4096 ,23 ,36.619 ,45.644 ,0.802
8 ,256 ,2048 ,127 ,4096 ,23 ,45.167 ,55.267 ,0.817
8 ,4 ,2048 ,127 ,4096 ,23 ,32.942 ,35.871 ,0.918
8 ,64 ,2048 ,127 ,4096 ,23 ,39.52 ,54.964 ,0.719
90 ,1 ,256 ,127 ,64 ,0 ,4.762 ,3.896 ,1.222
90 ,1 ,256 ,127 ,64 ,23 ,8.123 ,10.953 ,0.742
90 ,16 ,256 ,127 ,64 ,23 ,8.231 ,11.242 ,0.732
90 ,256 ,256 ,127 ,64 ,23 ,10.765 ,11.764 ,0.915
90 ,4 ,256 ,127 ,64 ,23 ,8.104 ,11.525 ,0.703
90 ,64 ,256 ,127 ,64 ,23 ,8.175 ,11.522 ,0.71
[-- Attachment #3: strrchr-evex-data-tgl.txt --]
[-- Type: text/plain, Size: 165417 bytes --]
Results For: strrchr
align,freq ,len ,max_char ,pos ,seek ,strrchr-dev ,strrchr-glibc ,strrchr-dev/strrchr-glibc
0 ,1 ,1 ,127 ,0 ,0 ,2.966 ,2.983 ,0.994
0 ,1 ,1 ,127 ,0 ,23 ,3.178 ,3.188 ,0.997
0 ,1 ,10 ,127 ,9 ,0 ,3.081 ,3.007 ,1.025
0 ,1 ,10 ,127 ,9 ,23 ,3.145 ,3.148 ,0.999
0 ,1 ,1024 ,127 ,0 ,0 ,3.727 ,3.046 ,1.224
0 ,1 ,1024 ,127 ,0 ,23 ,20.697 ,31.221 ,0.663
0 ,1 ,1024 ,127 ,1024 ,0 ,18.007 ,31.044 ,0.58
0 ,1 ,1024 ,127 ,1024 ,23 ,20.643 ,30.514 ,0.677
0 ,1 ,1024 ,127 ,144 ,0 ,6.371 ,9.031 ,0.705
0 ,1 ,1024 ,127 ,144 ,23 ,18.349 ,30.847 ,0.595
0 ,1 ,1024 ,127 ,192 ,0 ,7.457 ,10.31 ,0.723
0 ,1 ,1024 ,127 ,192 ,23 ,18.031 ,30.368 ,0.594
0 ,1 ,1024 ,127 ,240 ,0 ,6.63 ,9.71 ,0.683
0 ,1 ,1024 ,127 ,240 ,23 ,18.012 ,31.189 ,0.578
0 ,1 ,1024 ,127 ,288 ,0 ,9.467 ,12.061 ,0.785
0 ,1 ,1024 ,127 ,288 ,23 ,19.968 ,30.068 ,0.664
0 ,1 ,1024 ,127 ,48 ,0 ,4.437 ,4.235 ,1.048
0 ,1 ,1024 ,127 ,48 ,23 ,20.137 ,30.478 ,0.661
0 ,1 ,1024 ,127 ,736 ,0 ,13.541 ,22.361 ,0.606
0 ,1 ,1024 ,127 ,736 ,23 ,19.175 ,29.777 ,0.644
0 ,1 ,1024 ,127 ,784 ,0 ,15.315 ,23.778 ,0.644
0 ,1 ,1024 ,127 ,784 ,23 ,20.807 ,32.904 ,0.632
0 ,1 ,1024 ,127 ,832 ,0 ,15.846 ,25.454 ,0.623
0 ,1 ,1024 ,127 ,832 ,23 ,19.736 ,32.652 ,0.604
0 ,1 ,1024 ,127 ,880 ,0 ,14.95 ,25.394 ,0.589
0 ,1 ,1024 ,127 ,880 ,23 ,20.867 ,32.337 ,0.645
0 ,1 ,1024 ,127 ,928 ,0 ,15.721 ,27.709 ,0.567
0 ,1 ,1024 ,127 ,928 ,23 ,20.862 ,32.035 ,0.651
0 ,1 ,1024 ,127 ,96 ,0 ,5.724 ,5.77 ,0.992
0 ,1 ,1024 ,127 ,96 ,23 ,19.75 ,31.262 ,0.632
0 ,1 ,1024 ,127 ,976 ,0 ,17.488 ,28.876 ,0.606
0 ,1 ,1024 ,127 ,976 ,23 ,20.566 ,32.876 ,0.626
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0 ,1 ,1072 ,127 ,1024 ,23 ,19.859 ,32.556 ,0.61
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0 ,1 ,1120 ,127 ,1024 ,23 ,20.414 ,34.412 ,0.593
0 ,1 ,1168 ,127 ,1024 ,0 ,16.961 ,30.616 ,0.554
0 ,1 ,1168 ,127 ,1024 ,23 ,24.161 ,37.76 ,0.64
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0 ,1 ,1216 ,127 ,1024 ,23 ,21.954 ,37.513 ,0.585
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0 ,1 ,128 ,127 ,192 ,23 ,6.996 ,8.218 ,0.851
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0 ,1 ,128 ,127 ,240 ,23 ,6.993 ,8.208 ,0.852
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0 ,1 ,128 ,127 ,288 ,23 ,6.581 ,8.194 ,0.803
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0 ,1 ,128 ,127 ,80 ,23 ,5.257 ,8.161 ,0.644
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0 ,1 ,128 ,127 ,96 ,23 ,5.255 ,7.117 ,0.738
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0 ,1 ,1312 ,127 ,1024 ,0 ,18.457 ,30.698 ,0.601
0 ,1 ,1312 ,127 ,1024 ,23 ,24.591 ,40.376 ,0.609
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0 ,1 ,144 ,127 ,128 ,23 ,5.156 ,8.561 ,0.602
0 ,1 ,15 ,127 ,14 ,0 ,3.062 ,2.946 ,1.039
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0 ,1 ,16 ,127 ,0 ,0 ,3.115 ,3.059 ,1.018
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0 ,1 ,16 ,127 ,240 ,23 ,3.765 ,3.827 ,0.984
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0 ,1 ,16 ,127 ,256 ,23 ,3.792 ,3.699 ,1.025
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0 ,1 ,16 ,127 ,288 ,23 ,4.518 ,3.9 ,1.158
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0 ,1 ,16 ,127 ,48 ,23 ,3.804 ,4.083 ,0.932
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0 ,1 ,16 ,127 ,96 ,0 ,3.13 ,3.038 ,1.03
0 ,1 ,16 ,127 ,96 ,23 ,3.792 ,4.001 ,0.948
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0 ,1 ,160 ,127 ,16 ,23 ,5.906 ,10.008 ,0.59
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0 ,1 ,160 ,127 ,256 ,23 ,6.288 ,8.097 ,0.777
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0 ,1 ,160 ,127 ,64 ,23 ,5.503 ,8.187 ,0.672
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0 ,1 ,160 ,127 ,96 ,23 ,5.765 ,7.035 ,0.819
0 ,1 ,17 ,127 ,16 ,0 ,3.054 ,3.074 ,0.994
0 ,1 ,17 ,127 ,16 ,23 ,3.153 ,3.125 ,1.009
0 ,1 ,176 ,127 ,128 ,0 ,5.183 ,8.065 ,0.643
0 ,1 ,176 ,127 ,128 ,23 ,5.168 ,8.353 ,0.619
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0 ,1 ,176 ,127 ,160 ,23 ,5.183 ,9.184 ,0.564
0 ,1 ,176 ,127 ,32 ,0 ,3.098 ,4.342 ,0.713
0 ,1 ,176 ,127 ,32 ,23 ,5.854 ,8.052 ,0.727
0 ,1 ,1760 ,127 ,2048 ,0 ,28.253 ,68.431 ,0.413
0 ,1 ,1760 ,127 ,2048 ,23 ,29.553 ,67.922 ,0.435
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0 ,1 ,1760 ,127 ,288 ,23 ,28.852 ,49.864 ,0.579
0 ,1 ,18 ,127 ,17 ,0 ,3.385 ,2.987 ,1.133
0 ,1 ,18 ,127 ,17 ,23 ,3.166 ,3.145 ,1.007
0 ,1 ,1808 ,127 ,2048 ,0 ,28.994 ,70.121 ,0.413
0 ,1 ,1808 ,127 ,2048 ,23 ,31.177 ,71.111 ,0.438
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0 ,1 ,1808 ,127 ,240 ,23 ,29.899 ,48.525 ,0.616
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0 ,1 ,1856 ,127 ,2048 ,0 ,29.728 ,69.492 ,0.428
0 ,1 ,1856 ,127 ,2048 ,23 ,31.795 ,70.51 ,0.451
0 ,1 ,19 ,127 ,18 ,0 ,3.069 ,3.079 ,0.997
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0 ,1 ,1904 ,127 ,144 ,23 ,30.397 ,50.784 ,0.599
0 ,1 ,1904 ,127 ,2048 ,0 ,29.915 ,70.101 ,0.427
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0 ,1 ,192 ,127 ,176 ,0 ,5.21 ,8.08 ,0.645
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0 ,1 ,1952 ,127 ,2048 ,0 ,30.047 ,74.454 ,0.404
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0 ,1 ,1952 ,127 ,96 ,23 ,32.679 ,75.722 ,0.432
0 ,1 ,2 ,127 ,1 ,0 ,2.919 ,2.967 ,0.984
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0 ,1 ,20 ,127 ,19 ,23 ,3.137 ,3.113 ,1.008
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0 ,1 ,2000 ,127 ,2048 ,23 ,32.174 ,73.461 ,0.438
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0 ,1 ,2048 ,127 ,0 ,0 ,4.751 ,3.133 ,1.517
0 ,1 ,2048 ,127 ,0 ,23 ,35.011 ,76.157 ,0.46
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0 ,1 ,2048 ,127 ,1024 ,23 ,34.924 ,59.377 ,0.588
0 ,1 ,2048 ,127 ,128 ,0 ,5.029 ,7.956 ,0.632
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0 ,1 ,2048 ,127 ,144 ,23 ,33.341 ,55.555 ,0.6
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0 ,1 ,2048 ,127 ,1760 ,23 ,37.008 ,61.149 ,0.605
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0 ,1 ,2048 ,127 ,1808 ,23 ,38.015 ,60.564 ,0.628
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0 ,1 ,2048 ,127 ,1952 ,23 ,36.818 ,61.726 ,0.596
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0 ,1 ,2048 ,127 ,2000 ,23 ,40.474 ,63.49 ,0.637
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0 ,1 ,2048 ,127 ,32 ,23 ,34.46 ,67.577 ,0.51
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0 ,4 ,2096 ,127 ,2048 ,23 ,38.448 ,65.044 ,0.591
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0 ,64 ,2336 ,127 ,2048 ,23 ,57.209 ,107.056 ,0.534
0 ,64 ,24 ,127 ,23 ,23 ,3.145 ,3.145 ,1.0
0 ,64 ,240 ,127 ,224 ,23 ,5.583 ,10.346 ,0.54
0 ,64 ,25 ,127 ,24 ,23 ,3.161 ,3.138 ,1.007
0 ,64 ,256 ,127 ,0 ,23 ,9.268 ,11.776 ,0.787
0 ,64 ,256 ,127 ,112 ,23 ,8.775 ,10.688 ,0.821
0 ,64 ,256 ,127 ,144 ,23 ,7.436 ,12.002 ,0.62
0 ,64 ,256 ,127 ,16 ,23 ,10.026 ,12.544 ,0.799
0 ,64 ,256 ,127 ,160 ,23 ,8.227 ,12.147 ,0.677
0 ,64 ,256 ,127 ,192 ,23 ,7.011 ,13.215 ,0.531
0 ,64 ,256 ,127 ,208 ,23 ,7.584 ,13.176 ,0.576
0 ,64 ,256 ,127 ,240 ,23 ,6.927 ,12.464 ,0.556
0 ,64 ,256 ,127 ,256 ,23 ,7.429 ,12.486 ,0.595
0 ,64 ,256 ,127 ,288 ,23 ,7.09 ,12.374 ,0.573
0 ,64 ,256 ,127 ,48 ,23 ,8.714 ,11.553 ,0.754
0 ,64 ,256 ,127 ,64 ,23 ,8.751 ,11.52 ,0.76
0 ,64 ,256 ,127 ,96 ,23 ,8.36 ,10.373 ,0.806
0 ,64 ,26 ,127 ,25 ,23 ,3.153 ,3.107 ,1.015
0 ,64 ,27 ,127 ,26 ,23 ,3.161 ,3.114 ,1.015
0 ,64 ,272 ,127 ,128 ,23 ,7.544 ,12.147 ,0.621
0 ,64 ,272 ,127 ,240 ,23 ,8.597 ,11.843 ,0.726
0 ,64 ,272 ,127 ,256 ,23 ,8.732 ,13.529 ,0.645
0 ,64 ,272 ,127 ,32 ,23 ,8.731 ,11.674 ,0.748
0 ,64 ,272 ,127 ,512 ,23 ,7.924 ,12.98 ,0.61
0 ,64 ,28 ,127 ,27 ,23 ,3.161 ,3.137 ,1.008
0 ,64 ,288 ,127 ,272 ,23 ,8.21 ,13.143 ,0.625
0 ,64 ,29 ,127 ,28 ,23 ,3.161 ,3.169 ,0.998
0 ,64 ,3 ,127 ,2 ,23 ,3.188 ,3.114 ,1.024
0 ,64 ,30 ,127 ,29 ,23 ,3.177 ,3.161 ,1.005
0 ,64 ,304 ,127 ,16 ,23 ,8.715 ,11.891 ,0.733
0 ,64 ,304 ,127 ,256 ,23 ,8.62 ,13.102 ,0.658
0 ,64 ,304 ,127 ,64 ,23 ,8.05 ,11.606 ,0.694
0 ,64 ,31 ,127 ,30 ,23 ,3.17 ,3.145 ,1.008
0 ,64 ,32 ,127 ,0 ,23 ,3.29 ,4.007 ,0.821
0 ,64 ,32 ,127 ,128 ,23 ,3.145 ,4.38 ,0.718
0 ,64 ,32 ,127 ,144 ,23 ,3.18 ,4.194 ,0.758
0 ,64 ,32 ,127 ,16 ,23 ,3.145 ,4.309 ,0.73
0 ,64 ,32 ,127 ,192 ,23 ,3.161 ,4.125 ,0.766
0 ,64 ,32 ,127 ,240 ,23 ,3.144 ,4.215 ,0.746
0 ,64 ,32 ,127 ,288 ,23 ,3.16 ,4.174 ,0.757
0 ,64 ,32 ,127 ,31 ,23 ,3.16 ,4.106 ,0.77
0 ,64 ,32 ,127 ,32 ,23 ,3.172 ,4.202 ,0.755
0 ,64 ,32 ,127 ,48 ,23 ,3.145 ,3.91 ,0.804
0 ,64 ,32 ,127 ,96 ,23 ,3.153 ,4.194 ,0.752
0 ,64 ,320 ,127 ,128 ,23 ,7.421 ,13.733 ,0.54
0 ,64 ,320 ,127 ,192 ,23 ,7.242 ,15.821 ,0.458
0 ,64 ,320 ,127 ,32 ,23 ,8.713 ,13.22 ,0.659
0 ,64 ,320 ,127 ,512 ,23 ,9.425 ,14.435 ,0.653
0 ,64 ,352 ,127 ,256 ,23 ,8.98 ,15.717 ,0.571
0 ,64 ,352 ,127 ,64 ,23 ,8.089 ,13.371 ,0.605
0 ,64 ,368 ,127 ,128 ,23 ,7.761 ,13.513 ,0.574
0 ,64 ,368 ,127 ,144 ,23 ,9.364 ,14.781 ,0.634
0 ,64 ,368 ,127 ,512 ,23 ,8.312 ,16.533 ,0.503
0 ,64 ,4 ,127 ,3 ,23 ,3.169 ,3.121 ,1.015
0 ,64 ,400 ,127 ,256 ,23 ,12.427 ,16.853 ,0.737
0 ,64 ,416 ,127 ,128 ,23 ,9.934 ,14.931 ,0.665
0 ,64 ,416 ,127 ,512 ,23 ,11.042 ,17.611 ,0.627
0 ,64 ,416 ,127 ,96 ,23 ,10.902 ,13.841 ,0.788
0 ,64 ,448 ,127 ,256 ,23 ,13.192 ,19.293 ,0.684
0 ,64 ,464 ,127 ,48 ,23 ,10.887 ,16.063 ,0.678
0 ,64 ,464 ,127 ,512 ,23 ,10.452 ,20.032 ,0.522
0 ,64 ,48 ,127 ,32 ,23 ,3.145 ,4.431 ,0.71
0 ,64 ,496 ,127 ,256 ,23 ,10.85 ,18.059 ,0.601
0 ,64 ,5 ,127 ,4 ,23 ,3.161 ,3.121 ,1.013
0 ,64 ,512 ,127 ,0 ,23 ,13.905 ,18.108 ,0.768
0 ,64 ,512 ,127 ,144 ,23 ,11.345 ,18.043 ,0.629
0 ,64 ,512 ,127 ,192 ,23 ,10.846 ,21.107 ,0.514
0 ,64 ,512 ,127 ,224 ,23 ,11.853 ,18.175 ,0.652
0 ,64 ,512 ,127 ,240 ,23 ,11.11 ,17.979 ,0.618
0 ,64 ,512 ,127 ,272 ,23 ,12.445 ,19.733 ,0.631
0 ,64 ,512 ,127 ,288 ,23 ,12.124 ,18.273 ,0.663
0 ,64 ,512 ,127 ,320 ,23 ,12.038 ,20.144 ,0.598
0 ,64 ,512 ,127 ,368 ,23 ,12.373 ,21.351 ,0.58
0 ,64 ,512 ,127 ,416 ,23 ,13.084 ,20.901 ,0.626
0 ,64 ,512 ,127 ,464 ,23 ,15.886 ,22.274 ,0.713
0 ,64 ,512 ,127 ,48 ,23 ,13.235 ,17.512 ,0.756
0 ,64 ,512 ,127 ,512 ,23 ,14.935 ,21.371 ,0.699
0 ,64 ,512 ,127 ,96 ,23 ,13.316 ,17.011 ,0.783
0 ,64 ,544 ,127 ,256 ,23 ,12.968 ,19.863 ,0.653
0 ,64 ,560 ,127 ,512 ,23 ,13.813 ,22.373 ,0.617
0 ,64 ,6 ,127 ,5 ,23 ,3.162 ,3.121 ,1.013
0 ,64 ,608 ,127 ,512 ,23 ,12.486 ,24.564 ,0.508
0 ,64 ,64 ,127 ,0 ,23 ,5.164 ,5.539 ,0.932
0 ,64 ,64 ,127 ,144 ,23 ,4.426 ,4.706 ,0.94
0 ,64 ,64 ,127 ,16 ,23 ,4.415 ,5.514 ,0.801
0 ,64 ,64 ,127 ,192 ,23 ,4.441 ,4.702 ,0.944
0 ,64 ,64 ,127 ,240 ,23 ,4.425 ,4.682 ,0.945
0 ,64 ,64 ,127 ,256 ,23 ,4.49 ,4.898 ,0.917
0 ,64 ,64 ,127 ,288 ,23 ,4.424 ,4.682 ,0.945
0 ,64 ,64 ,127 ,48 ,23 ,4.403 ,4.708 ,0.935
0 ,64 ,64 ,127 ,64 ,23 ,4.487 ,4.856 ,0.924
0 ,64 ,64 ,127 ,96 ,23 ,4.551 ,4.67 ,0.975
0 ,64 ,656 ,127 ,512 ,23 ,16.55 ,26.161 ,0.633
0 ,64 ,7 ,127 ,6 ,23 ,3.161 ,3.146 ,1.005
0 ,64 ,704 ,127 ,512 ,23 ,16.307 ,30.314 ,0.538
0 ,64 ,736 ,127 ,1024 ,23 ,16.321 ,29.145 ,0.56
0 ,64 ,736 ,127 ,288 ,23 ,13.73 ,23.139 ,0.593
0 ,64 ,752 ,127 ,512 ,23 ,15.28 ,26.936 ,0.567
0 ,64 ,784 ,127 ,1024 ,23 ,17.05 ,31.876 ,0.535
0 ,64 ,784 ,127 ,240 ,23 ,14.325 ,24.491 ,0.585
0 ,64 ,8 ,127 ,7 ,23 ,3.161 ,3.133 ,1.009
0 ,64 ,80 ,127 ,128 ,23 ,5.032 ,4.221 ,1.192
0 ,64 ,80 ,127 ,32 ,23 ,4.523 ,4.742 ,0.954
0 ,64 ,80 ,127 ,48 ,23 ,4.644 ,4.948 ,0.939
0 ,64 ,80 ,127 ,64 ,23 ,5.035 ,4.42 ,1.139
0 ,64 ,800 ,127 ,512 ,23 ,18.791 ,28.887 ,0.651
0 ,64 ,832 ,127 ,1024 ,23 ,18.448 ,33.59 ,0.549
0 ,64 ,832 ,127 ,192 ,23 ,14.425 ,27.058 ,0.533
0 ,64 ,880 ,127 ,1024 ,23 ,17.871 ,33.927 ,0.527
0 ,64 ,880 ,127 ,144 ,23 ,14.666 ,24.774 ,0.592
0 ,64 ,9 ,127 ,8 ,23 ,3.161 ,3.154 ,1.002
0 ,64 ,928 ,127 ,1024 ,23 ,19.164 ,36.795 ,0.521
0 ,64 ,928 ,127 ,96 ,23 ,18.11 ,26.37 ,0.687
0 ,64 ,96 ,127 ,80 ,23 ,5.064 ,5.669 ,0.893
0 ,64 ,976 ,127 ,1024 ,23 ,20.975 ,38.908 ,0.539
0 ,64 ,976 ,127 ,48 ,23 ,19.089 ,28.833 ,0.662
1 ,1 ,2048 ,127 ,32 ,0 ,3.097 ,4.435 ,0.698
1 ,1 ,2048 ,127 ,32 ,23 ,34.182 ,68.524 ,0.499
1 ,1 ,256 ,127 ,64 ,0 ,5.693 ,3.8 ,1.498
1 ,1 ,256 ,127 ,64 ,23 ,8.011 ,11.012 ,0.727
1 ,16 ,2048 ,127 ,32 ,23 ,35.054 ,71.311 ,0.492
1 ,16 ,256 ,127 ,64 ,23 ,9.662 ,12.811 ,0.754
1 ,256 ,2048 ,127 ,32 ,23 ,34.659 ,69.267 ,0.5
1 ,256 ,256 ,127 ,64 ,23 ,9.45 ,12.737 ,0.742
1 ,4 ,2048 ,127 ,32 ,23 ,35.208 ,70.182 ,0.502
1 ,4 ,256 ,127 ,64 ,23 ,7.962 ,11.32 ,0.703
1 ,64 ,2048 ,127 ,32 ,23 ,35.422 ,73.54 ,0.482
1 ,64 ,256 ,127 ,64 ,23 ,9.679 ,12.445 ,0.778
105 ,1 ,256 ,127 ,64 ,0 ,5.779 ,3.956 ,1.461
105 ,1 ,256 ,127 ,64 ,23 ,8.356 ,11.535 ,0.724
105 ,16 ,256 ,127 ,64 ,23 ,8.202 ,11.597 ,0.707
105 ,256 ,256 ,127 ,64 ,23 ,10.862 ,13.195 ,0.823
105 ,4 ,256 ,127 ,64 ,23 ,8.336 ,11.596 ,0.719
105 ,64 ,256 ,127 ,64 ,23 ,8.326 ,11.598 ,0.718
15 ,1 ,256 ,127 ,64 ,0 ,5.07 ,3.778 ,1.342
15 ,1 ,256 ,127 ,64 ,23 ,7.984 ,11.459 ,0.697
15 ,16 ,256 ,127 ,64 ,23 ,8.104 ,11.323 ,0.716
15 ,256 ,256 ,127 ,64 ,23 ,9.27 ,12.671 ,0.732
15 ,4 ,256 ,127 ,64 ,23 ,8.292 ,11.245 ,0.737
15 ,64 ,256 ,127 ,64 ,23 ,9.8 ,11.088 ,0.884
2 ,1 ,2048 ,127 ,64 ,0 ,4.808 ,4.698 ,1.023
2 ,1 ,2048 ,127 ,64 ,23 ,33.909 ,69.607 ,0.487
2 ,1 ,256 ,127 ,64 ,0 ,4.691 ,3.783 ,1.24
2 ,1 ,256 ,127 ,64 ,23 ,7.925 ,11.316 ,0.7
2 ,16 ,2048 ,127 ,64 ,23 ,34.004 ,71.486 ,0.476
2 ,16 ,256 ,127 ,64 ,23 ,8.061 ,11.364 ,0.709
2 ,256 ,2048 ,127 ,64 ,23 ,33.833 ,69.847 ,0.484
2 ,256 ,256 ,127 ,64 ,23 ,9.405 ,12.79 ,0.735
2 ,4 ,2048 ,127 ,64 ,23 ,34.94 ,69.048 ,0.506
2 ,4 ,256 ,127 ,64 ,23 ,7.96 ,11.273 ,0.706
2 ,64 ,2048 ,127 ,64 ,23 ,34.158 ,71.32 ,0.479
2 ,64 ,256 ,127 ,64 ,23 ,9.707 ,11.195 ,0.867
3 ,1 ,2048 ,127 ,128 ,0 ,4.917 ,8.438 ,0.583
3 ,1 ,2048 ,127 ,128 ,23 ,33.387 ,55.942 ,0.597
3 ,1 ,256 ,127 ,64 ,0 ,4.756 ,3.865 ,1.231
3 ,1 ,256 ,127 ,64 ,23 ,8.17 ,11.748 ,0.695
3 ,16 ,2048 ,127 ,128 ,23 ,34.344 ,55.245 ,0.622
3 ,16 ,256 ,127 ,64 ,23 ,8.108 ,11.524 ,0.704
3 ,256 ,2048 ,127 ,128 ,23 ,33.726 ,55.718 ,0.605
3 ,256 ,256 ,127 ,64 ,23 ,9.697 ,12.942 ,0.749
3 ,4 ,2048 ,127 ,128 ,23 ,33.379 ,55.738 ,0.599
3 ,4 ,256 ,127 ,64 ,23 ,8.083 ,11.516 ,0.702
3 ,64 ,2048 ,127 ,128 ,23 ,33.404 ,55.606 ,0.601
3 ,64 ,256 ,127 ,64 ,23 ,9.321 ,11.571 ,0.806
30 ,1 ,256 ,127 ,64 ,0 ,4.853 ,4.037 ,1.202
30 ,1 ,256 ,127 ,64 ,23 ,7.981 ,11.422 ,0.699
30 ,16 ,256 ,127 ,64 ,23 ,8.07 ,11.502 ,0.702
30 ,256 ,256 ,127 ,64 ,23 ,9.259 ,12.764 ,0.725
30 ,4 ,256 ,127 ,64 ,23 ,8.002 ,11.336 ,0.706
30 ,64 ,256 ,127 ,64 ,23 ,9.314 ,11.452 ,0.813
4 ,1 ,2048 ,127 ,256 ,0 ,9.384 ,11.959 ,0.785
4 ,1 ,2048 ,127 ,256 ,23 ,34.209 ,77.702 ,0.44
4 ,1 ,256 ,127 ,64 ,0 ,4.613 ,3.861 ,1.195
4 ,1 ,256 ,127 ,64 ,23 ,8.366 ,11.437 ,0.731
4 ,16 ,2048 ,127 ,256 ,23 ,33.529 ,73.372 ,0.457
4 ,16 ,256 ,127 ,64 ,23 ,8.519 ,11.612 ,0.734
4 ,256 ,2048 ,127 ,256 ,23 ,34.09 ,72.41 ,0.471
4 ,256 ,256 ,127 ,64 ,23 ,9.358 ,13.062 ,0.716
4 ,4 ,2048 ,127 ,256 ,23 ,34.377 ,57.552 ,0.597
4 ,4 ,256 ,127 ,64 ,23 ,8.413 ,11.557 ,0.728
4 ,64 ,2048 ,127 ,256 ,23 ,33.699 ,68.19 ,0.494
4 ,64 ,256 ,127 ,64 ,23 ,9.573 ,11.41 ,0.839
4080 ,1 ,31 ,127 ,30 ,0 ,5.576 ,4.86 ,1.147
4080 ,1 ,31 ,127 ,30 ,23 ,5.658 ,5.113 ,1.107
4080 ,1 ,32 ,127 ,31 ,0 ,5.661 ,4.837 ,1.17
4080 ,1 ,32 ,127 ,31 ,23 ,5.677 ,6.393 ,0.888
4080 ,16 ,31 ,127 ,30 ,23 ,5.688 ,5.031 ,1.131
4080 ,16 ,32 ,127 ,31 ,23 ,6.125 ,6.26 ,0.979
4080 ,256 ,31 ,127 ,30 ,23 ,5.659 ,4.982 ,1.136
4080 ,256 ,32 ,127 ,31 ,23 ,5.688 ,6.245 ,0.911
4080 ,4 ,31 ,127 ,30 ,23 ,5.66 ,5.005 ,1.131
4080 ,4 ,32 ,127 ,31 ,23 ,5.659 ,6.198 ,0.913
4080 ,64 ,31 ,127 ,30 ,23 ,5.66 ,5.006 ,1.131
4080 ,64 ,32 ,127 ,31 ,23 ,5.688 ,6.293 ,0.904
4081 ,1 ,29 ,127 ,28 ,0 ,5.52 ,4.86 ,1.136
4081 ,1 ,29 ,127 ,28 ,23 ,5.857 ,5.316 ,1.102
4081 ,1 ,30 ,127 ,29 ,0 ,5.494 ,4.884 ,1.125
4081 ,1 ,30 ,127 ,29 ,23 ,5.675 ,5.175 ,1.097
4081 ,16 ,29 ,127 ,28 ,23 ,5.659 ,5.056 ,1.119
4081 ,16 ,30 ,127 ,29 ,23 ,6.333 ,5.149 ,1.23
4081 ,256 ,29 ,127 ,28 ,23 ,5.659 ,4.981 ,1.136
4081 ,256 ,30 ,127 ,29 ,23 ,5.659 ,4.98 ,1.136
4081 ,4 ,29 ,127 ,28 ,23 ,5.688 ,5.177 ,1.099
4081 ,4 ,30 ,127 ,29 ,23 ,5.688 ,5.164 ,1.101
4081 ,64 ,29 ,127 ,28 ,23 ,5.687 ,5.056 ,1.125
4081 ,64 ,30 ,127 ,29 ,23 ,5.717 ,5.056 ,1.131
4082 ,1 ,27 ,127 ,26 ,0 ,5.488 ,4.837 ,1.135
4082 ,1 ,27 ,127 ,26 ,23 ,5.659 ,5.133 ,1.102
4082 ,1 ,28 ,127 ,27 ,0 ,5.494 ,4.882 ,1.125
4082 ,1 ,28 ,127 ,27 ,23 ,5.732 ,5.233 ,1.095
4082 ,16 ,27 ,127 ,26 ,23 ,5.751 ,4.956 ,1.16
4082 ,16 ,28 ,127 ,27 ,23 ,5.659 ,4.98 ,1.136
4082 ,256 ,27 ,127 ,26 ,23 ,5.66 ,5.047 ,1.122
4082 ,256 ,28 ,127 ,27 ,23 ,5.659 ,5.031 ,1.125
4082 ,4 ,27 ,127 ,26 ,23 ,5.687 ,5.005 ,1.136
4082 ,4 ,28 ,127 ,27 ,23 ,5.658 ,5.005 ,1.13
4082 ,64 ,27 ,127 ,26 ,23 ,5.68 ,5.006 ,1.135
4082 ,64 ,28 ,127 ,27 ,23 ,5.659 ,5.056 ,1.119
4083 ,1 ,25 ,127 ,24 ,0 ,5.467 ,4.916 ,1.112
4083 ,1 ,25 ,127 ,24 ,23 ,5.63 ,5.096 ,1.105
4083 ,1 ,26 ,127 ,25 ,0 ,5.441 ,4.86 ,1.12
4083 ,1 ,26 ,127 ,25 ,23 ,5.659 ,5.023 ,1.127
4083 ,16 ,25 ,127 ,24 ,23 ,5.746 ,5.03 ,1.142
4083 ,16 ,26 ,127 ,25 ,23 ,5.631 ,5.031 ,1.119
4083 ,256 ,25 ,127 ,24 ,23 ,5.688 ,4.956 ,1.148
4083 ,256 ,26 ,127 ,25 ,23 ,5.659 ,5.031 ,1.125
4083 ,4 ,25 ,127 ,24 ,23 ,5.704 ,5.084 ,1.122
4083 ,4 ,26 ,127 ,25 ,23 ,5.688 ,5.006 ,1.136
4083 ,64 ,25 ,127 ,24 ,23 ,5.688 ,4.981 ,1.142
4083 ,64 ,26 ,127 ,25 ,23 ,5.693 ,4.956 ,1.149
4084 ,1 ,23 ,127 ,22 ,0 ,5.441 ,4.815 ,1.13
4084 ,1 ,23 ,127 ,22 ,23 ,5.66 ,5.15 ,1.099
4084 ,1 ,24 ,127 ,23 ,0 ,5.585 ,4.814 ,1.16
4084 ,1 ,24 ,127 ,23 ,23 ,5.729 ,4.98 ,1.15
4084 ,16 ,23 ,127 ,22 ,23 ,5.659 ,5.057 ,1.119
4084 ,16 ,24 ,127 ,23 ,23 ,5.688 ,5.056 ,1.125
4084 ,256 ,23 ,127 ,22 ,23 ,5.675 ,5.062 ,1.121
4084 ,256 ,24 ,127 ,23 ,23 ,5.718 ,4.981 ,1.148
4084 ,4 ,23 ,127 ,22 ,23 ,5.659 ,5.026 ,1.126
4084 ,4 ,24 ,127 ,23 ,23 ,5.659 ,5.038 ,1.123
4084 ,64 ,23 ,127 ,22 ,23 ,5.659 ,5.005 ,1.131
4084 ,64 ,24 ,127 ,23 ,23 ,5.688 ,5.037 ,1.129
4085 ,1 ,21 ,127 ,20 ,0 ,5.561 ,4.813 ,1.155
4085 ,1 ,21 ,127 ,20 ,23 ,5.711 ,5.006 ,1.141
4085 ,1 ,22 ,127 ,21 ,0 ,5.605 ,4.837 ,1.159
4085 ,1 ,22 ,127 ,21 ,23 ,5.66 ,5.06 ,1.119
4085 ,16 ,21 ,127 ,20 ,23 ,5.659 ,5.081 ,1.114
4085 ,16 ,22 ,127 ,21 ,23 ,5.659 ,5.056 ,1.119
4085 ,256 ,21 ,127 ,20 ,23 ,5.687 ,5.056 ,1.125
4085 ,256 ,22 ,127 ,21 ,23 ,5.701 ,5.031 ,1.133
4085 ,4 ,21 ,127 ,20 ,23 ,5.688 ,5.005 ,1.136
4085 ,4 ,22 ,127 ,21 ,23 ,5.689 ,5.005 ,1.136
4085 ,64 ,21 ,127 ,20 ,23 ,5.706 ,5.031 ,1.134
4085 ,64 ,22 ,127 ,21 ,23 ,5.688 ,5.03 ,1.131
4086 ,1 ,19 ,127 ,18 ,0 ,5.441 ,4.963 ,1.096
4086 ,1 ,19 ,127 ,18 ,23 ,5.683 ,4.98 ,1.141
4086 ,1 ,20 ,127 ,19 ,0 ,5.467 ,4.864 ,1.124
4086 ,1 ,20 ,127 ,19 ,23 ,5.631 ,4.996 ,1.127
4086 ,16 ,19 ,127 ,18 ,23 ,5.688 ,5.005 ,1.136
4086 ,16 ,20 ,127 ,19 ,23 ,5.716 ,5.031 ,1.136
4086 ,256 ,19 ,127 ,18 ,23 ,5.631 ,5.056 ,1.114
4086 ,256 ,20 ,127 ,19 ,23 ,5.631 ,5.078 ,1.109
4086 ,4 ,19 ,127 ,18 ,23 ,5.716 ,5.005 ,1.142
4086 ,4 ,20 ,127 ,19 ,23 ,5.717 ,5.028 ,1.137
4086 ,64 ,19 ,127 ,18 ,23 ,5.659 ,4.98 ,1.136
4086 ,64 ,20 ,127 ,19 ,23 ,5.718 ,5.005 ,1.142
4087 ,1 ,17 ,127 ,16 ,0 ,5.512 ,4.79 ,1.151
4087 ,1 ,17 ,127 ,16 ,23 ,5.66 ,5.005 ,1.131
4087 ,1 ,18 ,127 ,17 ,0 ,5.607 ,4.767 ,1.176
4087 ,1 ,18 ,127 ,17 ,23 ,5.689 ,5.031 ,1.131
4087 ,16 ,17 ,127 ,16 ,23 ,5.827 ,5.006 ,1.164
4087 ,16 ,18 ,127 ,17 ,23 ,5.717 ,5.031 ,1.136
4087 ,256 ,17 ,127 ,16 ,23 ,5.688 ,5.056 ,1.125
4087 ,256 ,18 ,127 ,17 ,23 ,5.748 ,5.031 ,1.143
4087 ,4 ,17 ,127 ,16 ,23 ,5.717 ,4.956 ,1.154
4087 ,4 ,18 ,127 ,17 ,23 ,5.659 ,4.981 ,1.136
4087 ,64 ,17 ,127 ,16 ,23 ,5.658 ,5.031 ,1.125
4087 ,64 ,18 ,127 ,17 ,23 ,5.687 ,5.116 ,1.112
4088 ,1 ,15 ,127 ,14 ,0 ,5.551 ,4.82 ,1.152
4088 ,1 ,15 ,127 ,14 ,23 ,5.78 ,5.031 ,1.149
4088 ,1 ,16 ,127 ,15 ,0 ,5.47 ,4.904 ,1.115
4088 ,1 ,16 ,127 ,15 ,23 ,5.688 ,4.956 ,1.148
4088 ,16 ,15 ,127 ,14 ,23 ,5.659 ,5.031 ,1.125
4088 ,16 ,16 ,127 ,15 ,23 ,5.66 ,5.0 ,1.132
4088 ,256 ,15 ,127 ,14 ,23 ,5.659 ,4.956 ,1.142
4088 ,256 ,16 ,127 ,15 ,23 ,5.688 ,4.981 ,1.142
4088 ,4 ,15 ,127 ,14 ,23 ,5.747 ,5.006 ,1.148
4088 ,4 ,16 ,127 ,15 ,23 ,5.689 ,4.982 ,1.142
4088 ,64 ,15 ,127 ,14 ,23 ,5.688 ,5.005 ,1.136
4088 ,64 ,16 ,127 ,15 ,23 ,5.66 ,5.006 ,1.131
4089 ,1 ,13 ,127 ,12 ,0 ,5.608 ,6.821 ,0.822
4089 ,1 ,13 ,127 ,12 ,23 ,5.688 ,5.048 ,1.127
4089 ,1 ,14 ,127 ,13 ,0 ,5.549 ,4.725 ,1.174
4089 ,1 ,14 ,127 ,13 ,23 ,5.659 ,5.031 ,1.125
4089 ,16 ,13 ,127 ,12 ,23 ,5.739 ,5.006 ,1.146
4089 ,16 ,14 ,127 ,13 ,23 ,5.688 ,4.98 ,1.142
4089 ,256 ,13 ,127 ,12 ,23 ,5.688 ,5.012 ,1.135
4089 ,256 ,14 ,127 ,13 ,23 ,5.688 ,4.98 ,1.142
4089 ,4 ,13 ,127 ,12 ,23 ,5.688 ,5.082 ,1.119
4089 ,4 ,14 ,127 ,13 ,23 ,5.687 ,5.137 ,1.107
4089 ,64 ,13 ,127 ,12 ,23 ,5.688 ,5.056 ,1.125
4089 ,64 ,14 ,127 ,13 ,23 ,5.717 ,5.006 ,1.142
4090 ,1 ,11 ,127 ,10 ,0 ,5.581 ,5.162 ,1.081
4090 ,1 ,11 ,127 ,10 ,23 ,5.688 ,5.03 ,1.131
4090 ,1 ,12 ,127 ,11 ,0 ,5.415 ,5.184 ,1.045
4090 ,1 ,12 ,127 ,11 ,23 ,5.718 ,5.031 ,1.137
4090 ,16 ,11 ,127 ,10 ,23 ,5.668 ,4.956 ,1.144
4090 ,16 ,12 ,127 ,11 ,23 ,5.746 ,5.032 ,1.142
4090 ,256 ,11 ,127 ,10 ,23 ,5.659 ,4.98 ,1.136
4090 ,256 ,12 ,127 ,11 ,23 ,5.741 ,4.977 ,1.154
4090 ,4 ,11 ,127 ,10 ,23 ,5.658 ,5.032 ,1.125
4090 ,4 ,12 ,127 ,11 ,23 ,5.66 ,5.006 ,1.131
4090 ,64 ,11 ,127 ,10 ,23 ,5.659 ,5.006 ,1.13
4090 ,64 ,12 ,127 ,11 ,23 ,5.733 ,5.006 ,1.145
4091 ,1 ,10 ,127 ,9 ,0 ,5.415 ,4.843 ,1.118
4091 ,1 ,10 ,127 ,9 ,23 ,5.659 ,5.032 ,1.125
4091 ,1 ,9 ,127 ,8 ,0 ,5.452 ,4.767 ,1.144
4091 ,1 ,9 ,127 ,8 ,23 ,5.659 ,5.005 ,1.131
4091 ,16 ,10 ,127 ,9 ,23 ,5.718 ,5.056 ,1.131
4091 ,16 ,9 ,127 ,8 ,23 ,5.688 ,5.032 ,1.13
4091 ,256 ,10 ,127 ,9 ,23 ,5.659 ,5.083 ,1.113
4091 ,256 ,9 ,127 ,8 ,23 ,5.632 ,5.032 ,1.119
4091 ,4 ,10 ,127 ,9 ,23 ,5.718 ,5.006 ,1.142
4091 ,4 ,9 ,127 ,8 ,23 ,5.717 ,5.057 ,1.13
4091 ,64 ,10 ,127 ,9 ,23 ,5.704 ,5.084 ,1.122
4091 ,64 ,9 ,127 ,8 ,23 ,5.659 ,5.03 ,1.125
4092 ,1 ,7 ,127 ,6 ,0 ,5.795 ,4.863 ,1.192
4092 ,1 ,7 ,127 ,6 ,23 ,5.713 ,4.981 ,1.147
4092 ,1 ,8 ,127 ,7 ,0 ,5.469 ,4.886 ,1.119
4092 ,1 ,8 ,127 ,7 ,23 ,5.688 ,5.084 ,1.119
4092 ,16 ,7 ,127 ,6 ,23 ,5.659 ,5.061 ,1.118
4092 ,16 ,8 ,127 ,7 ,23 ,5.658 ,5.03 ,1.125
4092 ,256 ,7 ,127 ,6 ,23 ,5.688 ,5.007 ,1.136
4092 ,256 ,8 ,127 ,7 ,23 ,5.695 ,5.007 ,1.137
4092 ,4 ,7 ,127 ,6 ,23 ,5.688 ,5.068 ,1.122
4092 ,4 ,8 ,127 ,7 ,23 ,5.687 ,5.056 ,1.125
4092 ,64 ,7 ,127 ,6 ,23 ,5.704 ,4.98 ,1.145
4092 ,64 ,8 ,127 ,7 ,23 ,5.688 ,5.032 ,1.13
4093 ,1 ,5 ,127 ,4 ,0 ,5.313 ,4.837 ,1.098
4093 ,1 ,5 ,127 ,4 ,23 ,5.704 ,5.138 ,1.11
4093 ,1 ,6 ,127 ,5 ,0 ,5.49 ,4.861 ,1.129
4093 ,1 ,6 ,127 ,5 ,23 ,5.717 ,5.082 ,1.125
4093 ,16 ,5 ,127 ,4 ,23 ,5.718 ,5.021 ,1.139
4093 ,16 ,6 ,127 ,5 ,23 ,5.688 ,5.005 ,1.136
4093 ,256 ,5 ,127 ,4 ,23 ,5.872 ,4.956 ,1.185
4093 ,256 ,6 ,127 ,5 ,23 ,5.631 ,4.956 ,1.136
4093 ,4 ,5 ,127 ,4 ,23 ,5.716 ,5.031 ,1.136
4093 ,4 ,6 ,127 ,5 ,23 ,5.687 ,5.03 ,1.131
4093 ,64 ,5 ,127 ,4 ,23 ,5.659 ,4.972 ,1.138
4093 ,64 ,6 ,127 ,5 ,23 ,5.688 ,5.006 ,1.136
4094 ,1 ,3 ,127 ,2 ,0 ,5.345 ,4.723 ,1.132
4094 ,1 ,3 ,127 ,2 ,23 ,5.719 ,5.005 ,1.143
4094 ,1 ,4 ,127 ,3 ,0 ,5.753 ,4.767 ,1.207
4094 ,1 ,4 ,127 ,3 ,23 ,5.689 ,4.98 ,1.142
4094 ,16 ,3 ,127 ,2 ,23 ,5.749 ,5.062 ,1.136
4094 ,16 ,4 ,127 ,3 ,23 ,5.717 ,5.006 ,1.142
4094 ,256 ,3 ,127 ,2 ,23 ,5.661 ,4.932 ,1.148
4094 ,256 ,4 ,127 ,3 ,23 ,5.748 ,4.981 ,1.154
4094 ,4 ,3 ,127 ,2 ,23 ,5.66 ,5.005 ,1.131
4094 ,4 ,4 ,127 ,3 ,23 ,5.698 ,5.005 ,1.138
4094 ,64 ,3 ,127 ,2 ,23 ,5.718 ,5.0 ,1.144
4094 ,64 ,4 ,127 ,3 ,23 ,5.689 ,5.005 ,1.137
4095 ,1 ,1 ,127 ,0 ,0 ,4.077 ,3.561 ,1.145
4095 ,1 ,1 ,127 ,0 ,23 ,5.475 ,5.007 ,1.093
4095 ,1 ,2 ,127 ,1 ,0 ,5.464 ,4.946 ,1.105
4095 ,1 ,2 ,127 ,1 ,23 ,5.72 ,5.005 ,1.143
4095 ,16 ,1 ,127 ,0 ,23 ,5.421 ,5.033 ,1.077
4095 ,16 ,2 ,127 ,1 ,23 ,5.661 ,4.981 ,1.137
4095 ,256 ,1 ,127 ,0 ,23 ,5.413 ,4.974 ,1.088
4095 ,256 ,2 ,127 ,1 ,23 ,5.72 ,5.034 ,1.136
4095 ,4 ,1 ,127 ,0 ,23 ,5.418 ,5.008 ,1.082
4095 ,4 ,2 ,127 ,1 ,23 ,5.689 ,5.057 ,1.125
4095 ,64 ,1 ,127 ,0 ,23 ,5.325 ,4.957 ,1.074
4095 ,64 ,2 ,127 ,1 ,23 ,5.733 ,5.059 ,1.133
45 ,1 ,256 ,127 ,64 ,0 ,4.861 ,3.978 ,1.222
45 ,1 ,256 ,127 ,64 ,23 ,8.041 ,11.454 ,0.702
45 ,16 ,256 ,127 ,64 ,23 ,8.175 ,11.625 ,0.703
45 ,256 ,256 ,127 ,64 ,23 ,9.37 ,12.999 ,0.721
45 ,4 ,256 ,127 ,64 ,23 ,8.129 ,11.549 ,0.704
45 ,64 ,256 ,127 ,64 ,23 ,10.391 ,11.431 ,0.909
5 ,1 ,2048 ,127 ,512 ,0 ,13.039 ,18.823 ,0.693
5 ,1 ,2048 ,127 ,512 ,23 ,34.602 ,79.639 ,0.434
5 ,1 ,256 ,127 ,64 ,0 ,4.676 ,4.007 ,1.167
5 ,1 ,256 ,127 ,64 ,23 ,8.091 ,11.639 ,0.695
5 ,16 ,2048 ,127 ,512 ,23 ,35.788 ,60.545 ,0.591
5 ,16 ,256 ,127 ,64 ,23 ,8.083 ,11.504 ,0.703
5 ,256 ,2048 ,127 ,512 ,23 ,35.448 ,60.085 ,0.59
5 ,256 ,256 ,127 ,64 ,23 ,9.772 ,11.601 ,0.842
5 ,4 ,2048 ,127 ,512 ,23 ,36.09 ,58.237 ,0.62
5 ,4 ,256 ,127 ,64 ,23 ,8.101 ,11.504 ,0.704
5 ,64 ,2048 ,127 ,512 ,23 ,35.453 ,60.442 ,0.587
5 ,64 ,256 ,127 ,64 ,23 ,9.632 ,11.439 ,0.842
6 ,1 ,2048 ,127 ,1024 ,0 ,18.531 ,29.79 ,0.622
6 ,1 ,2048 ,127 ,1024 ,23 ,35.371 ,57.648 ,0.614
6 ,1 ,256 ,127 ,64 ,0 ,4.875 ,4.037 ,1.208
6 ,1 ,256 ,127 ,64 ,23 ,8.062 ,11.617 ,0.694
6 ,16 ,2048 ,127 ,1024 ,23 ,37.311 ,66.298 ,0.563
6 ,16 ,256 ,127 ,64 ,23 ,8.117 ,11.491 ,0.706
6 ,256 ,2048 ,127 ,1024 ,23 ,40.04 ,65.602 ,0.61
6 ,256 ,256 ,127 ,64 ,23 ,9.415 ,11.533 ,0.816
6 ,4 ,2048 ,127 ,1024 ,23 ,35.439 ,60.21 ,0.589
6 ,4 ,256 ,127 ,64 ,23 ,8.203 ,11.582 ,0.708
6 ,64 ,2048 ,127 ,1024 ,23 ,38.201 ,66.0 ,0.579
6 ,64 ,256 ,127 ,64 ,23 ,8.092 ,11.425 ,0.708
60 ,1 ,256 ,127 ,64 ,0 ,4.59 ,3.875 ,1.184
60 ,1 ,256 ,127 ,64 ,23 ,8.382 ,11.496 ,0.729
60 ,16 ,256 ,127 ,64 ,23 ,8.134 ,11.624 ,0.7
60 ,256 ,256 ,127 ,64 ,23 ,9.944 ,11.474 ,0.867
60 ,4 ,256 ,127 ,64 ,23 ,8.321 ,11.537 ,0.721
60 ,64 ,256 ,127 ,64 ,23 ,9.687 ,11.535 ,0.84
7 ,1 ,2048 ,127 ,2048 ,0 ,29.34 ,74.074 ,0.396
7 ,1 ,2048 ,127 ,2048 ,23 ,34.479 ,79.704 ,0.433
7 ,1 ,256 ,127 ,64 ,0 ,4.767 ,4.047 ,1.178
7 ,1 ,256 ,127 ,64 ,23 ,8.158 ,11.55 ,0.706
7 ,16 ,2048 ,127 ,2048 ,23 ,48.164 ,77.397 ,0.622
7 ,16 ,256 ,127 ,64 ,23 ,8.103 ,11.594 ,0.699
7 ,256 ,2048 ,127 ,2048 ,23 ,46.693 ,99.52 ,0.469
7 ,256 ,256 ,127 ,64 ,23 ,9.556 ,11.495 ,0.831
7 ,4 ,2048 ,127 ,2048 ,23 ,35.553 ,58.184 ,0.611
7 ,4 ,256 ,127 ,64 ,23 ,8.294 ,11.619 ,0.714
7 ,64 ,2048 ,127 ,2048 ,23 ,41.073 ,101.721 ,0.404
7 ,64 ,256 ,127 ,64 ,23 ,8.404 ,11.592 ,0.725
75 ,1 ,256 ,127 ,64 ,0 ,5.009 ,4.035 ,1.241
75 ,1 ,256 ,127 ,64 ,23 ,8.211 ,11.62 ,0.707
75 ,16 ,256 ,127 ,64 ,23 ,8.476 ,11.6 ,0.731
75 ,256 ,256 ,127 ,64 ,23 ,11.548 ,13.3 ,0.868
75 ,4 ,256 ,127 ,64 ,23 ,8.103 ,11.563 ,0.701
75 ,64 ,256 ,127 ,64 ,23 ,8.354 ,11.619 ,0.719
8 ,1 ,2048 ,127 ,4096 ,0 ,33.862 ,70.934 ,0.477
8 ,1 ,2048 ,127 ,4096 ,23 ,34.545 ,77.425 ,0.446
8 ,16 ,2048 ,127 ,4096 ,23 ,38.225 ,60.633 ,0.63
8 ,256 ,2048 ,127 ,4096 ,23 ,41.67 ,102.809 ,0.405
8 ,4 ,2048 ,127 ,4096 ,23 ,34.59 ,56.665 ,0.61
8 ,64 ,2048 ,127 ,4096 ,23 ,41.385 ,99.125 ,0.418
90 ,1 ,256 ,127 ,64 ,0 ,4.784 ,3.861 ,1.239
90 ,1 ,256 ,127 ,64 ,23 ,8.655 ,11.568 ,0.748
90 ,16 ,256 ,127 ,64 ,23 ,8.955 ,11.543 ,0.776
90 ,256 ,256 ,127 ,64 ,23 ,11.125 ,13.154 ,0.846
90 ,4 ,256 ,127 ,64 ,23 ,8.104 ,11.518 ,0.704
90 ,64 ,256 ,127 ,64 ,23 ,8.446 ,11.554 ,0.731
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-09-21 14:39 ` Noah Goldstein
@ 2023-09-21 15:16 ` H.J. Lu
2023-09-21 19:19 ` Noah Goldstein
0 siblings, 1 reply; 12+ messages in thread
From: H.J. Lu @ 2023-09-21 15:16 UTC (permalink / raw)
To: Noah Goldstein; +Cc: libc-alpha, carlos
On Thu, Sep 21, 2023 at 7:39 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Thu, Sep 21, 2023 at 9:38 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> > common implementation: `strrchr-evex-base.S`.
> >
> > The motivation is `strrchr-evex` needed to be refactored to not use
> > 64-bit masked registers in preperation for AVX10.
> >
> > Once vec-width masked register combining was removed, the EVEX and
> > EVEX512 implementations can easily be implemented in the same file
> > without any major overhead.
> >
> > The net result is performance improvements (measured on TGL) for both
> > `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> > regressions in the test suite and it may be many of the cases that
> > make the total-geomean of improvement/regression across bench-strrchr
> > are cold. The point of the performance measurement is to show there
> > are no major regressions, but the primary motivation is preperation
> > for AVX10.
> >
> > Benchmarks where taken on TGL:
> > https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
> >
> > EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> > EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
> Full summary of attached here.
The results look good to me. I believe that this is the only 256-bit
EVEX function
with 64-bit mask instructions.
> >
> > Full check passes on x86.
> > ---
> > sysdeps/x86_64/multiarch/strrchr-evex-base.S | 466 ++++++++++++-------
> > sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
> > sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
> > 3 files changed, 294 insertions(+), 565 deletions(-)
> >
> > diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > index 58b2853ab6..2c98f07fca 100644
> > --- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > +++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > @@ -25,240 +25,354 @@
> > # include <sysdep.h>
> >
> > # ifdef USE_AS_WCSRCHR
> > +# if VEC_SIZE == 64
> > +# define RCX_M cx
> > +# define kortestM kortestw
> > +# else
> > +# define RCX_M cl
> > +# define kortestM kortestb
> > +# endif
> > +
> > +# define SHIFT_REG VRCX
> > +# define VPCOMPRESS vpcompressd
> > # define CHAR_SIZE 4
> > -# define VPBROADCAST vpbroadcastd
> > -# define VPCMPEQ vpcmpeqd
> > -# define VPMINU vpminud
> > +# define VPMIN vpminud
> > # define VPTESTN vptestnmd
> > +# define VPTEST vptestmd
> > +# define VPBROADCAST vpbroadcastd
> > +# define VPCMPEQ vpcmpeqd
> > +# define VPCMP vpcmpd
> > # else
> > +# define SHIFT_REG VRDI
> > +# define VPCOMPRESS vpcompressb
> > # define CHAR_SIZE 1
> > -# define VPBROADCAST vpbroadcastb
> > -# define VPCMPEQ vpcmpeqb
> > -# define VPMINU vpminub
> > +# define VPMIN vpminub
> > # define VPTESTN vptestnmb
> > +# define VPTEST vptestmb
> > +# define VPBROADCAST vpbroadcastb
> > +# define VPCMPEQ vpcmpeqb
> > +# define VPCMP vpcmpb
> > +
> > +# define RCX_M VRCX
> > +# define kortestM KORTEST
> > # endif
> >
> > -# define PAGE_SIZE 4096
> > +# define VMATCH VMM(0)
> > # define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> > +# define PAGE_SIZE 4096
> >
> > .section SECTION(.text), "ax", @progbits
> > -/* Aligning entry point to 64 byte, provides better performance for
> > - one vector length string. */
> > -ENTRY_P2ALIGN (STRRCHR, 6)
> > -
> > - /* Broadcast CHAR to VMM(0). */
> > - VPBROADCAST %esi, %VMM(0)
> > + /* Aligning entry point to 64 byte, provides better performance for
> > + one vector length string. */
> > +ENTRY_P2ALIGN(STRRCHR, 6)
> > movl %edi, %eax
> > - sall $20, %eax
> > - cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
> > - ja L(page_cross)
> > + /* Broadcast CHAR to VMATCH. */
> > + VPBROADCAST %esi, %VMATCH
> >
> > -L(page_cross_continue):
> > - /* Compare [w]char for null, mask bit will be set for match. */
> > - VMOVU (%rdi), %VMM(1)
> > + andl $(PAGE_SIZE - 1), %eax
> > + cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> > + jg L(cross_page_boundary)
> >
> > - VPTESTN %VMM(1), %VMM(1), %k1
> > - KMOV %k1, %VRCX
> > - test %VRCX, %VRCX
> > - jz L(align_more)
> > -
> > - VPCMPEQ %VMM(1), %VMM(0), %k0
> > - KMOV %k0, %VRAX
> > - BLSMSK %VRCX, %VRCX
> > - and %VRCX, %VRAX
> > - jz L(ret)
> > -
> > - BSR %VRAX, %VRAX
> > + VMOVU (%rdi), %VMM(1)
> > + /* k0 has a 1 for each zero CHAR in YMM1. */
> > + VPTESTN %VMM(1), %VMM(1), %k0
> > + KMOV %k0, %VGPR(rsi)
> > + test %VGPR(rsi), %VGPR(rsi)
> > + jz L(aligned_more)
> > + /* fallthrough: zero CHAR in first VEC. */
> > +L(page_cross_return):
> > + /* K1 has a 1 for each search CHAR match in VEC(1). */
> > + VPCMPEQ %VMATCH, %VMM(1), %k1
> > + KMOV %k1, %VGPR(rax)
> > + /* Build mask up until first zero CHAR (used to mask of
> > + potential search CHAR matches past the end of the string). */
> > + blsmsk %VGPR(rsi), %VGPR(rsi)
> > + and %VGPR(rsi), %VGPR(rax)
> > + jz L(ret0)
> > + /* Get last match (the `and` removed any out of bounds matches). */
> > + bsr %VGPR(rax), %VGPR(rax)
> > # ifdef USE_AS_WCSRCHR
> > leaq (%rdi, %rax, CHAR_SIZE), %rax
> > # else
> > - add %rdi, %rax
> > + addq %rdi, %rax
> > # endif
> > -L(ret):
> > +L(ret0):
> > ret
> >
> > -L(vector_x2_end):
> > - VPCMPEQ %VMM(2), %VMM(0), %k2
> > - KMOV %k2, %VRAX
> > - BLSMSK %VRCX, %VRCX
> > - and %VRCX, %VRAX
> > - jz L(vector_x1_ret)
> > -
> > - BSR %VRAX, %VRAX
> > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > - /* Check the first vector at very last to look for match. */
> > -L(vector_x1_ret):
> > - VPCMPEQ %VMM(1), %VMM(0), %k2
> > - KMOV %k2, %VRAX
> > - test %VRAX, %VRAX
> > - jz L(ret)
> > -
> > - BSR %VRAX, %VRAX
> > + /* Returns for first vec x1/x2/x3 have hard coded backward
> > + search path for earlier matches. */
> > + .p2align 4,, 6
> > +L(first_vec_x1):
> > + VPCMPEQ %VMATCH, %VMM(2), %k1
> > + KMOV %k1, %VGPR(rax)
> > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > + /* eax non-zero if search CHAR in range. */
> > + and %VGPR(rcx), %VGPR(rax)
> > + jnz L(first_vec_x1_return)
> > +
> > + /* fallthrough: no match in YMM2 then need to check for earlier
> > + matches (in YMM1). */
> > + .p2align 4,, 4
> > +L(first_vec_x0_test):
> > + VPCMPEQ %VMATCH, %VMM(1), %k1
> > + KMOV %k1, %VGPR(rax)
> > + test %VGPR(rax), %VGPR(rax)
> > + jz L(ret1)
> > + bsr %VGPR(rax), %VGPR(rax)
> > # ifdef USE_AS_WCSRCHR
> > leaq (%rsi, %rax, CHAR_SIZE), %rax
> > # else
> > - add %rsi, %rax
> > +
> > + addq %rsi, %rax
> > # endif
> > +L(ret1):
> > + ret
> > +
> > + .p2align 4,, 10
> > +L(first_vec_x3):
> > + VPCMPEQ %VMATCH, %VMM(4), %k1
> > + KMOV %k1, %VGPR(rax)
> > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > + /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
> > + and %VGPR(rcx), %VGPR(rax)
> > + jz L(first_vec_x1_or_x2)
> > + bsr %VGPR(rax), %VGPR(rax)
> > + leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> > + ret
> > + .p2align 4,, 4
> > +
> > +L(first_vec_x2):
> > + VPCMPEQ %VMATCH, %VMM(3), %k1
> > + KMOV %k1, %VGPR(rax)
> > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > + /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
> > + and %VGPR(rcx), %VGPR(rax)
> > + jz L(first_vec_x0_x1_test)
> > + bsr %VGPR(rax), %VGPR(rax)
> > + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> > ret
> >
> > -L(align_more):
> > - /* Zero r8 to store match result. */
> > - xorl %r8d, %r8d
> > - /* Save pointer of first vector, in case if no match found. */
> > + .p2align 4,, 6
> > +L(first_vec_x0_x1_test):
> > + VPCMPEQ %VMATCH, %VMM(2), %k1
> > + KMOV %k1, %VGPR(rax)
> > + /* Check YMM2 for last match first. If no match try YMM1. */
> > + test %VGPR(rax), %VGPR(rax)
> > + jz L(first_vec_x0_test)
> > + .p2align 4,, 4
> > +L(first_vec_x1_return):
> > + bsr %VGPR(rax), %VGPR(rax)
> > + leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
> > + ret
> > +
> > + .p2align 4,, 12
> > +L(aligned_more):
> > +L(page_cross_continue):
> > + /* Need to keep original pointer incase VEC(1) has last match. */
> > movq %rdi, %rsi
> > - /* Align pointer to vector size. */
> > andq $-VEC_SIZE, %rdi
> > - /* Loop unroll for 2 vector loop. */
> > - VMOVA (VEC_SIZE)(%rdi), %VMM(2)
> > +
> > + VMOVU VEC_SIZE(%rdi), %VMM(2)
> > VPTESTN %VMM(2), %VMM(2), %k0
> > KMOV %k0, %VRCX
> > + movq %rdi, %r8
> > test %VRCX, %VRCX
> > - jnz L(vector_x2_end)
> > + jnz L(first_vec_x1)
> > +
> > + VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> > + VPTESTN %VMM(3), %VMM(3), %k0
> > + KMOV %k0, %VRCX
> > +
> > + test %VRCX, %VRCX
> > + jnz L(first_vec_x2)
> > +
> > + VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> > + VPTESTN %VMM(4), %VMM(4), %k0
> > + KMOV %k0, %VRCX
> > +
> > + /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
> > + padding for efficient nop before loop alignment. */
> > + test %rcx, %rcx
> > + jnz L(first_vec_x3)
> >
> > - /* Save pointer of second vector, in case if no match
> > - found. */
> > - movq %rdi, %r9
> > - /* Align address to VEC_SIZE * 2 for loop. */
> > andq $-(VEC_SIZE * 2), %rdi
> > + .p2align 4
> > +L(first_aligned_loop):
> > + /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> > + gurantee they don't store a match. */
> > + VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> > + VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> >
> > - .p2align 4,,11
> > -L(loop):
> > - /* 2 vector loop, as it provide better performance as compared
> > - to 4 vector loop. */
> > - VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
> > - VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
> > - VPCMPEQ %VMM(3), %VMM(0), %k1
> > - VPCMPEQ %VMM(4), %VMM(0), %k2
> > - VPMINU %VMM(3), %VMM(4), %VMM(5)
> > - VPTESTN %VMM(5), %VMM(5), %k0
> > - KOR %k1, %k2, %k3
> > - subq $-(VEC_SIZE * 2), %rdi
> > - /* If k0 and k3 zero, match and end of string not found. */
> > - KORTEST %k0, %k3
> > - jz L(loop)
> > -
> > - /* If k0 is non zero, end of string found. */
> > - KORTEST %k0, %k0
> > - jnz L(endloop)
> > -
> > - lea VEC_SIZE(%rdi), %r8
> > - /* A match found, it need to be stored in r8 before loop
> > - continue. */
> > - /* Check second vector first. */
> > - KMOV %k2, %VRDX
> > - test %VRDX, %VRDX
> > - jnz L(loop_vec_x2_match)
> > + VPCMP $4, %VMM(5), %VMATCH, %k2
> > + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> > +
> > + VPMIN %VMM(5), %VMM(6), %VMM(7)
> > +
> > + VPTEST %VMM(7), %VMM(7), %k1{%k3}
> > + subq $(VEC_SIZE * -2), %rdi
> > + kortestM %k1, %k1
> > + jc L(first_aligned_loop)
> >
> > + VPTESTN %VMM(7), %VMM(7), %k1
> > KMOV %k1, %VRDX
> > - /* Match is in first vector, rdi offset need to be subtracted
> > - by VEC_SIZE. */
> > - sub $VEC_SIZE, %r8
> > -
> > - /* If second vector doesn't have match, first vector must
> > - have match. */
> > -L(loop_vec_x2_match):
> > - BSR %VRDX, %VRDX
> > -# ifdef USE_AS_WCSRCHR
> > - sal $2, %rdx
> > -# endif
> > - add %rdx, %r8
> > - jmp L(loop)
> > + test %VRDX, %VRDX
> > + jz L(second_aligned_loop_prep)
> >
> > -L(endloop):
> > - /* Check if string end in first loop vector. */
> > - VPTESTN %VMM(3), %VMM(3), %k0
> > - KMOV %k0, %VRCX
> > - test %VRCX, %VRCX
> > - jnz L(loop_vector_x1_end)
> > + kortestM %k3, %k3
> > + jnc L(return_first_aligned_loop)
> >
> > - /* Check if it has match in first loop vector. */
> > - KMOV %k1, %VRAX
> > + .p2align 4,, 6
> > +L(first_vec_x1_or_x2_or_x3):
> > + VPCMPEQ %VMM(4), %VMATCH, %k4
> > + KMOV %k4, %VRAX
> > test %VRAX, %VRAX
> > - jz L(loop_vector_x2_end)
> > + jz L(first_vec_x1_or_x2)
> > + bsr %VRAX, %VRAX
> > + leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> > + ret
> >
> > - BSR %VRAX, %VRAX
> > - leaq (%rdi, %rax, CHAR_SIZE), %r8
> >
> > - /* String must end in second loop vector. */
> > -L(loop_vector_x2_end):
> > - VPTESTN %VMM(4), %VMM(4), %k0
> > + .p2align 4,, 8
> > +L(return_first_aligned_loop):
> > + VPTESTN %VMM(5), %VMM(5), %k0
> > KMOV %k0, %VRCX
> > + blsmsk %VRCX, %VRCX
> > + jnc L(return_first_new_match_first)
> > + blsmsk %VRDX, %VRDX
> > + VPCMPEQ %VMM(6), %VMATCH, %k0
> > + KMOV %k0, %VRAX
> > + addq $VEC_SIZE, %rdi
> > + and %VRDX, %VRAX
> > + jnz L(return_first_new_match_ret)
> > + subq $VEC_SIZE, %rdi
> > +L(return_first_new_match_first):
> > KMOV %k2, %VRAX
> > - BLSMSK %VRCX, %VRCX
> > - /* Check if it has match in second loop vector. */
> > +# ifdef USE_AS_WCSRCHR
> > + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> > and %VRCX, %VRAX
> > - jz L(check_last_match)
> > +# else
> > + andn %VRCX, %VRAX, %VRAX
> > +# endif
> > + jz L(first_vec_x1_or_x2_or_x3)
> > +L(return_first_new_match_ret):
> > + bsr %VRAX, %VRAX
> > + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > + ret
> >
> > - BSR %VRAX, %VRAX
> > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > + .p2align 4,, 10
> > +L(first_vec_x1_or_x2):
> > + VPCMPEQ %VMM(3), %VMATCH, %k3
> > + KMOV %k3, %VRAX
> > + test %VRAX, %VRAX
> > + jz L(first_vec_x0_x1_test)
> > + bsr %VRAX, %VRAX
> > + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> > ret
> >
> > - /* String end in first loop vector. */
> > -L(loop_vector_x1_end):
> > - KMOV %k1, %VRAX
> > - BLSMSK %VRCX, %VRCX
> > - /* Check if it has match in second loop vector. */
> > - and %VRCX, %VRAX
> > - jz L(check_last_match)
> >
> > - BSR %VRAX, %VRAX
> > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > + .p2align 4
> > + /* We can throw away the work done for the first 4x checks here
> > + as we have a later match. This is the 'fast' path persay. */
> > +L(second_aligned_loop_prep):
> > +L(second_aligned_loop_set_furthest_match):
> > + movq %rdi, %rsi
> > + VMOVA %VMM(5), %VMM(7)
> > + VMOVA %VMM(6), %VMM(8)
> > + .p2align 4
> > +L(second_aligned_loop):
> > + VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> > + VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> > + VPCMP $4, %VMM(5), %VMATCH, %k2
> > + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> > +
> > + VPMIN %VMM(5), %VMM(6), %VMM(4)
> > +
> > + VPTEST %VMM(4), %VMM(4), %k1{%k3}
> > + subq $(VEC_SIZE * -2), %rdi
> > + KMOV %k1, %VRCX
> > + inc %RCX_M
> > + jz L(second_aligned_loop)
> > + VPTESTN %VMM(4), %VMM(4), %k1
> > + KMOV %k1, %VRDX
> > + test %VRDX, %VRDX
> > + jz L(second_aligned_loop_set_furthest_match)
> >
> > - /* No match in first and second loop vector. */
> > -L(check_last_match):
> > - /* Check if any match recorded in r8. */
> > - test %r8, %r8
> > - jz L(vector_x2_ret)
> > - movq %r8, %rax
> > + kortestM %k3, %k3
> > + jnc L(return_new_match)
> > + /* branch here because there is a significant advantage interms
> > + of output dependency chance in using edx. */
> > +
> > +
> > +L(return_old_match):
> > + VPCMPEQ %VMM(8), %VMATCH, %k0
> > + KMOV %k0, %VRCX
> > + bsr %VRCX, %VRCX
> > + jnz L(return_old_match_ret)
> > +
> > + VPCMPEQ %VMM(7), %VMATCH, %k0
> > + KMOV %k0, %VRCX
> > + bsr %VRCX, %VRCX
> > + subq $VEC_SIZE, %rsi
> > +L(return_old_match_ret):
> > + leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> > ret
> >
> > - /* No match recorded in r8. Check the second saved vector
> > - in beginning. */
> > -L(vector_x2_ret):
> > - VPCMPEQ %VMM(2), %VMM(0), %k2
> > - KMOV %k2, %VRAX
> > - test %VRAX, %VRAX
> > - jz L(vector_x1_ret)
> >
> > - /* Match found in the second saved vector. */
> > - BSR %VRAX, %VRAX
> > - leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
> > +L(return_new_match):
> > + VPTESTN %VMM(5), %VMM(5), %k0
> > + KMOV %k0, %VRCX
> > + blsmsk %VRCX, %VRCX
> > + jnc L(return_new_match_first)
> > + dec %VRDX
> > + VPCMPEQ %VMM(6), %VMATCH, %k0
> > + KMOV %k0, %VRAX
> > + addq $VEC_SIZE, %rdi
> > + and %VRDX, %VRAX
> > + jnz L(return_new_match_ret)
> > + subq $VEC_SIZE, %rdi
> > +L(return_new_match_first):
> > + KMOV %k2, %VRAX
> > +# ifdef USE_AS_WCSRCHR
> > + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> > + and %VRCX, %VRAX
> > +# else
> > + andn %VRCX, %VRAX, %VRAX
> > +# endif
> > + jz L(return_old_match)
> > +L(return_new_match_ret):
> > + bsr %VRAX, %VRAX
> > + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > ret
> >
> > -L(page_cross):
> > - mov %rdi, %rax
> > - movl %edi, %ecx
> > + .p2align 4,, 4
> > +L(cross_page_boundary):
> > + xorq %rdi, %rax
> > + mov $-1, %VRDX
> > + VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
> > + VPTESTN %VMM(6), %VMM(6), %k0
> > + KMOV %k0, %VRSI
> >
> > # ifdef USE_AS_WCSRCHR
> > - /* Calculate number of compare result bits to be skipped for
> > - wide string alignment adjustment. */
> > - andl $(VEC_SIZE - 1), %ecx
> > - sarl $2, %ecx
> > + movl %edi, %ecx
> > + and $(VEC_SIZE - 1), %ecx
> > + shrl $2, %ecx
> > # endif
> > - /* ecx contains number of w[char] to be skipped as a result
> > - of address alignment. */
> > - andq $-VEC_SIZE, %rax
> > - VMOVA (%rax), %VMM(1)
> > - VPTESTN %VMM(1), %VMM(1), %k1
> > - KMOV %k1, %VRAX
> > - SHR %cl, %VRAX
> > - jz L(page_cross_continue)
> > - VPCMPEQ %VMM(1), %VMM(0), %k0
> > - KMOV %k0, %VRDX
> > - SHR %cl, %VRDX
> > - BLSMSK %VRAX, %VRAX
> > - and %VRDX, %VRAX
> > - jz L(ret)
> > - BSR %VRAX, %VRAX
> > + shlx %SHIFT_REG, %VRDX, %VRDX
> > +
> > # ifdef USE_AS_WCSRCHR
> > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > + kmovw %edx, %k1
> > # else
> > - add %rdi, %rax
> > + KMOV %VRDX, %k1
> > # endif
> >
> > - ret
> > -END (STRRCHR)
> > + VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
> > + /* We could technically just jmp back after the vpcompress but
> > + it doesn't save any 16-byte blocks. */
> > +
> > + shrx %SHIFT_REG, %VRSI, %VRSI
> > + test %VRSI, %VRSI
> > + jnz L(page_cross_return)
> > + jmp L(page_cross_continue)
> > + /* 1-byte from cache line. */
> > +END(STRRCHR)
> > #endif
> > diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S b/sysdeps/x86_64/multiarch/strrchr-evex.S
> > index 85e3b0119f..b606e6f69c 100644
> > --- a/sysdeps/x86_64/multiarch/strrchr-evex.S
> > +++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
> > @@ -1,394 +1,8 @@
> > -/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
> > - Copyright (C) 2021-2023 Free Software Foundation, Inc.
> > - This file is part of the GNU C Library.
> > -
> > - The GNU C Library is free software; you can redistribute it and/or
> > - modify it under the terms of the GNU Lesser General Public
> > - License as published by the Free Software Foundation; either
> > - version 2.1 of the License, or (at your option) any later version.
> > -
> > - The GNU C Library is distributed in the hope that it will be useful,
> > - but WITHOUT ANY WARRANTY; without even the implied warranty of
> > - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > - Lesser General Public License for more details.
> > -
> > - You should have received a copy of the GNU Lesser General Public
> > - License along with the GNU C Library; if not, see
> > - <https://www.gnu.org/licenses/>. */
> > -
> > -#include <isa-level.h>
> > -
> > -#if ISA_SHOULD_BUILD (4)
> > -
> > -# include <sysdep.h>
> > -
> > # ifndef STRRCHR
> > # define STRRCHR __strrchr_evex
> > # endif
> >
> > -# include "x86-evex256-vecs.h"
> > -
> > -# ifdef USE_AS_WCSRCHR
> > -# define SHIFT_REG rsi
> > -# define kunpck_2x kunpckbw
> > -# define kmov_2x kmovd
> > -# define maskz_2x ecx
> > -# define maskm_2x eax
> > -# define CHAR_SIZE 4
> > -# define VPMIN vpminud
> > -# define VPTESTN vptestnmd
> > -# define VPTEST vptestmd
> > -# define VPBROADCAST vpbroadcastd
> > -# define VPCMPEQ vpcmpeqd
> > -# define VPCMP vpcmpd
> > -
> > -# define USE_WIDE_CHAR
> > -# else
> > -# define SHIFT_REG rdi
> > -# define kunpck_2x kunpckdq
> > -# define kmov_2x kmovq
> > -# define maskz_2x rcx
> > -# define maskm_2x rax
> > -
> > -# define CHAR_SIZE 1
> > -# define VPMIN vpminub
> > -# define VPTESTN vptestnmb
> > -# define VPTEST vptestmb
> > -# define VPBROADCAST vpbroadcastb
> > -# define VPCMPEQ vpcmpeqb
> > -# define VPCMP vpcmpb
> > -# endif
> > -
> > -# include "reg-macros.h"
> > -
> > -# define VMATCH VMM(0)
> > -# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> > -# define PAGE_SIZE 4096
> > -
> > - .section SECTION(.text), "ax", @progbits
> > -ENTRY_P2ALIGN(STRRCHR, 6)
> > - movl %edi, %eax
> > - /* Broadcast CHAR to VMATCH. */
> > - VPBROADCAST %esi, %VMATCH
> > -
> > - andl $(PAGE_SIZE - 1), %eax
> > - cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> > - jg L(cross_page_boundary)
> > -L(page_cross_continue):
> > - VMOVU (%rdi), %VMM(1)
> > - /* k0 has a 1 for each zero CHAR in VEC(1). */
> > - VPTESTN %VMM(1), %VMM(1), %k0
> > - KMOV %k0, %VRSI
> > - test %VRSI, %VRSI
> > - jz L(aligned_more)
> > - /* fallthrough: zero CHAR in first VEC. */
> > - /* K1 has a 1 for each search CHAR match in VEC(1). */
> > - VPCMPEQ %VMATCH, %VMM(1), %k1
> > - KMOV %k1, %VRAX
> > - /* Build mask up until first zero CHAR (used to mask of
> > - potential search CHAR matches past the end of the string).
> > - */
> > - blsmsk %VRSI, %VRSI
> > - and %VRSI, %VRAX
> > - jz L(ret0)
> > - /* Get last match (the `and` removed any out of bounds matches).
> > - */
> > - bsr %VRAX, %VRAX
> > -# ifdef USE_AS_WCSRCHR
> > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > -# else
> > - addq %rdi, %rax
> > -# endif
> > -L(ret0):
> > - ret
> > -
> > - /* Returns for first vec x1/x2/x3 have hard coded backward
> > - search path for earlier matches. */
> > - .p2align 4,, 6
> > -L(first_vec_x1):
> > - VPCMPEQ %VMATCH, %VMM(2), %k1
> > - KMOV %k1, %VRAX
> > - blsmsk %VRCX, %VRCX
> > - /* eax non-zero if search CHAR in range. */
> > - and %VRCX, %VRAX
> > - jnz L(first_vec_x1_return)
> > -
> > - /* fallthrough: no match in VEC(2) then need to check for
> > - earlier matches (in VEC(1)). */
> > - .p2align 4,, 4
> > -L(first_vec_x0_test):
> > - VPCMPEQ %VMATCH, %VMM(1), %k1
> > - KMOV %k1, %VRAX
> > - test %VRAX, %VRAX
> > - jz L(ret1)
> > - bsr %VRAX, %VRAX
> > -# ifdef USE_AS_WCSRCHR
> > - leaq (%rsi, %rax, CHAR_SIZE), %rax
> > -# else
> > - addq %rsi, %rax
> > -# endif
> > -L(ret1):
> > - ret
> > -
> > - .p2align 4,, 10
> > -L(first_vec_x1_or_x2):
> > - VPCMPEQ %VMM(3), %VMATCH, %k3
> > - VPCMPEQ %VMM(2), %VMATCH, %k2
> > - /* K2 and K3 have 1 for any search CHAR match. Test if any
> > - matches between either of them. Otherwise check VEC(1). */
> > - KORTEST %k2, %k3
> > - jz L(first_vec_x0_test)
> > -
> > - /* Guaranteed that VEC(2) and VEC(3) are within range so merge
> > - the two bitmasks then get last result. */
> > - kunpck_2x %k2, %k3, %k3
> > - kmov_2x %k3, %maskm_2x
> > - bsr %maskm_2x, %maskm_2x
> > - leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > - .p2align 4,, 7
> > -L(first_vec_x3):
> > - VPCMPEQ %VMATCH, %VMM(4), %k1
> > - KMOV %k1, %VRAX
> > - blsmsk %VRCX, %VRCX
> > - /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
> > - */
> > - and %VRCX, %VRAX
> > - jz L(first_vec_x1_or_x2)
> > - bsr %VRAX, %VRAX
> > - leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > -
> > - .p2align 4,, 6
> > -L(first_vec_x0_x1_test):
> > - VPCMPEQ %VMATCH, %VMM(2), %k1
> > - KMOV %k1, %VRAX
> > - /* Check VEC(2) for last match first. If no match try VEC(1).
> > - */
> > - test %VRAX, %VRAX
> > - jz L(first_vec_x0_test)
> > - .p2align 4,, 4
> > -L(first_vec_x1_return):
> > - bsr %VRAX, %VRAX
> > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > -
> > - .p2align 4,, 10
> > -L(first_vec_x2):
> > - VPCMPEQ %VMATCH, %VMM(3), %k1
> > - KMOV %k1, %VRAX
> > - blsmsk %VRCX, %VRCX
> > - /* Check VEC(3) for last match first. If no match try
> > - VEC(2)/VEC(1). */
> > - and %VRCX, %VRAX
> > - jz L(first_vec_x0_x1_test)
> > - bsr %VRAX, %VRAX
> > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > -
> > - .p2align 4,, 12
> > -L(aligned_more):
> > - /* Need to keep original pointer in case VEC(1) has last match.
> > - */
> > - movq %rdi, %rsi
> > - andq $-VEC_SIZE, %rdi
> > -
> > - VMOVU VEC_SIZE(%rdi), %VMM(2)
> > - VPTESTN %VMM(2), %VMM(2), %k0
> > - KMOV %k0, %VRCX
> > -
> > - test %VRCX, %VRCX
> > - jnz L(first_vec_x1)
> > -
> > - VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> > - VPTESTN %VMM(3), %VMM(3), %k0
> > - KMOV %k0, %VRCX
> > -
> > - test %VRCX, %VRCX
> > - jnz L(first_vec_x2)
> > -
> > - VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> > - VPTESTN %VMM(4), %VMM(4), %k0
> > - KMOV %k0, %VRCX
> > - movq %rdi, %r8
> > - test %VRCX, %VRCX
> > - jnz L(first_vec_x3)
> > -
> > - andq $-(VEC_SIZE * 2), %rdi
> > - .p2align 4,, 10
> > -L(first_aligned_loop):
> > - /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> > - guarantee they don't store a match. */
> > - VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> > - VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> > -
> > - VPCMPEQ %VMM(5), %VMATCH, %k2
> > - vpxord %VMM(6), %VMATCH, %VMM(7)
> > -
> > - VPMIN %VMM(5), %VMM(6), %VMM(8)
> > - VPMIN %VMM(8), %VMM(7), %VMM(7)
> > -
> > - VPTESTN %VMM(7), %VMM(7), %k1
> > - subq $(VEC_SIZE * -2), %rdi
> > - KORTEST %k1, %k2
> > - jz L(first_aligned_loop)
> > -
> > - VPCMPEQ %VMM(6), %VMATCH, %k3
> > - VPTESTN %VMM(8), %VMM(8), %k1
> > -
> > - /* If k1 is zero, then we found a CHAR match but no null-term.
> > - We can now safely throw out VEC1-4. */
> > - KTEST %k1, %k1
> > - jz L(second_aligned_loop_prep)
> > -
> > - KORTEST %k2, %k3
> > - jnz L(return_first_aligned_loop)
> > -
> > -
> > - .p2align 4,, 6
> > -L(first_vec_x1_or_x2_or_x3):
> > - VPCMPEQ %VMM(4), %VMATCH, %k4
> > - KMOV %k4, %VRAX
> > - bsr %VRAX, %VRAX
> > - jz L(first_vec_x1_or_x2)
> > - leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > -
> > - .p2align 4,, 8
> > -L(return_first_aligned_loop):
> > - VPTESTN %VMM(5), %VMM(5), %k0
> > -
> > - /* Combined results from VEC5/6. */
> > - kunpck_2x %k0, %k1, %k0
> > - kmov_2x %k0, %maskz_2x
> > -
> > - blsmsk %maskz_2x, %maskz_2x
> > - kunpck_2x %k2, %k3, %k3
> > - kmov_2x %k3, %maskm_2x
> > - and %maskz_2x, %maskm_2x
> > - jz L(first_vec_x1_or_x2_or_x3)
> > -
> > - bsr %maskm_2x, %maskm_2x
> > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > - .p2align 4
> > - /* We can throw away the work done for the first 4x checks here
> > - as we have a later match. This is the 'fast' path persay.
> > - */
> > -L(second_aligned_loop_prep):
> > -L(second_aligned_loop_set_furthest_match):
> > - movq %rdi, %rsi
> > - /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
> > - port0 and have noticeable overhead in the loop. */
> > - VMOVA %VMM(5), %VMM(7)
> > - VMOVA %VMM(6), %VMM(8)
> > - .p2align 4
> > -L(second_aligned_loop):
> > - VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> > - VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> > - VPCMPEQ %VMM(5), %VMATCH, %k2
> > - vpxord %VMM(6), %VMATCH, %VMM(3)
> > -
> > - VPMIN %VMM(5), %VMM(6), %VMM(4)
> > - VPMIN %VMM(3), %VMM(4), %VMM(3)
> > -
> > - VPTESTN %VMM(3), %VMM(3), %k1
> > - subq $(VEC_SIZE * -2), %rdi
> > - KORTEST %k1, %k2
> > - jz L(second_aligned_loop)
> > - VPCMPEQ %VMM(6), %VMATCH, %k3
> > - VPTESTN %VMM(4), %VMM(4), %k1
> > - KTEST %k1, %k1
> > - jz L(second_aligned_loop_set_furthest_match)
> > -
> > - /* branch here because we know we have a match in VEC7/8 but
> > - might not in VEC5/6 so the latter is expected to be less
> > - likely. */
> > - KORTEST %k2, %k3
> > - jnz L(return_new_match)
> > -
> > -L(return_old_match):
> > - VPCMPEQ %VMM(8), %VMATCH, %k0
> > - KMOV %k0, %VRCX
> > - bsr %VRCX, %VRCX
> > - jnz L(return_old_match_ret)
> > -
> > - VPCMPEQ %VMM(7), %VMATCH, %k0
> > - KMOV %k0, %VRCX
> > - bsr %VRCX, %VRCX
> > - subq $VEC_SIZE, %rsi
> > -L(return_old_match_ret):
> > - leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> > - ret
> > -
> > - .p2align 4,, 10
> > -L(return_new_match):
> > - VPTESTN %VMM(5), %VMM(5), %k0
> > -
> > - /* Combined results from VEC5/6. */
> > - kunpck_2x %k0, %k1, %k0
> > - kmov_2x %k0, %maskz_2x
> > -
> > - blsmsk %maskz_2x, %maskz_2x
> > - kunpck_2x %k2, %k3, %k3
> > - kmov_2x %k3, %maskm_2x
> > -
> > - /* Match at end was out-of-bounds so use last known match. */
> > - and %maskz_2x, %maskm_2x
> > - jz L(return_old_match)
> > -
> > - bsr %maskm_2x, %maskm_2x
> > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > - ret
> > -
> > -L(cross_page_boundary):
> > - /* eax contains all the page offset bits of src (rdi). `xor rdi,
> > - rax` sets pointer will all page offset bits cleared so
> > - offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
> > - before page cross (guaranteed to be safe to read). Doing this
> > - as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
> > - a bit of code size. */
> > - xorq %rdi, %rax
> > - VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
> > - VPTESTN %VMM(1), %VMM(1), %k0
> > - KMOV %k0, %VRCX
> > -
> > - /* Shift out zero CHAR matches that are before the beginning of
> > - src (rdi). */
> > -# ifdef USE_AS_WCSRCHR
> > - movl %edi, %esi
> > - andl $(VEC_SIZE - 1), %esi
> > - shrl $2, %esi
> > -# endif
> > - shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
> > -
> > - test %VRCX, %VRCX
> > - jz L(page_cross_continue)
> > +#include "x86-evex512-vecs.h"
> > +#include "reg-macros.h"
> >
> > - /* Found zero CHAR so need to test for search CHAR. */
> > - VPCMP $0, %VMATCH, %VMM(1), %k1
> > - KMOV %k1, %VRAX
> > - /* Shift out search CHAR matches that are before the beginning of
> > - src (rdi). */
> > - shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
> > -
> > - /* Check if any search CHAR match in range. */
> > - blsmsk %VRCX, %VRCX
> > - and %VRCX, %VRAX
> > - jz L(ret3)
> > - bsr %VRAX, %VRAX
> > -# ifdef USE_AS_WCSRCHR
> > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > -# else
> > - addq %rdi, %rax
> > -# endif
> > -L(ret3):
> > - ret
> > -END(STRRCHR)
> > -#endif
> > +#include "strrchr-evex-base.S"
> > diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > index e5c5fe3bf2..a584cd3f43 100644
> > --- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > +++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > @@ -4,4 +4,5 @@
> >
> > #define STRRCHR WCSRCHR
> > #define USE_AS_WCSRCHR 1
> > +#define USE_WIDE_CHAR 1
> > #include "strrchr-evex.S"
> > --
> > 2.34.1
> >
--
H.J.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-09-21 15:16 ` H.J. Lu
@ 2023-09-21 19:19 ` Noah Goldstein
0 siblings, 0 replies; 12+ messages in thread
From: Noah Goldstein @ 2023-09-21 19:19 UTC (permalink / raw)
To: H.J. Lu; +Cc: libc-alpha, carlos
On Thu, Sep 21, 2023 at 10:17 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>
> On Thu, Sep 21, 2023 at 7:39 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > On Thu, Sep 21, 2023 at 9:38 AM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> > >
> > > This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> > > common implementation: `strrchr-evex-base.S`.
> > >
> > > The motivation is `strrchr-evex` needed to be refactored to not use
> > > 64-bit masked registers in preperation for AVX10.
> > >
> > > Once vec-width masked register combining was removed, the EVEX and
> > > EVEX512 implementations can easily be implemented in the same file
> > > without any major overhead.
> > >
> > > The net result is performance improvements (measured on TGL) for both
> > > `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> > > regressions in the test suite and it may be many of the cases that
> > > make the total-geomean of improvement/regression across bench-strrchr
> > > are cold. The point of the performance measurement is to show there
> > > are no major regressions, but the primary motivation is preperation
> > > for AVX10.
> > >
> > > Benchmarks where taken on TGL:
> > > https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
> > >
> > > EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> > > EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
> > Full summary of attached here.
>
> The results look good to me. I believe that this is the only 256-bit
> EVEX function
> with 64-bit mask instructions.
Yeah, but the reason for have seperate ymm/zmm implementations was
the ymm version would combine mask registers. Once we no longer
want to do that, we can just merge the two.
>
> > >
> > > Full check passes on x86.
> > > ---
> > > sysdeps/x86_64/multiarch/strrchr-evex-base.S | 466 ++++++++++++-------
> > > sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
> > > sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
> > > 3 files changed, 294 insertions(+), 565 deletions(-)
> > >
> > > diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > > index 58b2853ab6..2c98f07fca 100644
> > > --- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > > +++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> > > @@ -25,240 +25,354 @@
> > > # include <sysdep.h>
> > >
> > > # ifdef USE_AS_WCSRCHR
> > > +# if VEC_SIZE == 64
> > > +# define RCX_M cx
> > > +# define kortestM kortestw
> > > +# else
> > > +# define RCX_M cl
> > > +# define kortestM kortestb
> > > +# endif
> > > +
> > > +# define SHIFT_REG VRCX
> > > +# define VPCOMPRESS vpcompressd
> > > # define CHAR_SIZE 4
> > > -# define VPBROADCAST vpbroadcastd
> > > -# define VPCMPEQ vpcmpeqd
> > > -# define VPMINU vpminud
> > > +# define VPMIN vpminud
> > > # define VPTESTN vptestnmd
> > > +# define VPTEST vptestmd
> > > +# define VPBROADCAST vpbroadcastd
> > > +# define VPCMPEQ vpcmpeqd
> > > +# define VPCMP vpcmpd
> > > # else
> > > +# define SHIFT_REG VRDI
> > > +# define VPCOMPRESS vpcompressb
> > > # define CHAR_SIZE 1
> > > -# define VPBROADCAST vpbroadcastb
> > > -# define VPCMPEQ vpcmpeqb
> > > -# define VPMINU vpminub
> > > +# define VPMIN vpminub
> > > # define VPTESTN vptestnmb
> > > +# define VPTEST vptestmb
> > > +# define VPBROADCAST vpbroadcastb
> > > +# define VPCMPEQ vpcmpeqb
> > > +# define VPCMP vpcmpb
> > > +
> > > +# define RCX_M VRCX
> > > +# define kortestM KORTEST
> > > # endif
> > >
> > > -# define PAGE_SIZE 4096
> > > +# define VMATCH VMM(0)
> > > # define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> > > +# define PAGE_SIZE 4096
> > >
> > > .section SECTION(.text), "ax", @progbits
> > > -/* Aligning entry point to 64 byte, provides better performance for
> > > - one vector length string. */
> > > -ENTRY_P2ALIGN (STRRCHR, 6)
> > > -
> > > - /* Broadcast CHAR to VMM(0). */
> > > - VPBROADCAST %esi, %VMM(0)
> > > + /* Aligning entry point to 64 byte, provides better performance for
> > > + one vector length string. */
> > > +ENTRY_P2ALIGN(STRRCHR, 6)
> > > movl %edi, %eax
> > > - sall $20, %eax
> > > - cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
> > > - ja L(page_cross)
> > > + /* Broadcast CHAR to VMATCH. */
> > > + VPBROADCAST %esi, %VMATCH
> > >
> > > -L(page_cross_continue):
> > > - /* Compare [w]char for null, mask bit will be set for match. */
> > > - VMOVU (%rdi), %VMM(1)
> > > + andl $(PAGE_SIZE - 1), %eax
> > > + cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> > > + jg L(cross_page_boundary)
> > >
> > > - VPTESTN %VMM(1), %VMM(1), %k1
> > > - KMOV %k1, %VRCX
> > > - test %VRCX, %VRCX
> > > - jz L(align_more)
> > > -
> > > - VPCMPEQ %VMM(1), %VMM(0), %k0
> > > - KMOV %k0, %VRAX
> > > - BLSMSK %VRCX, %VRCX
> > > - and %VRCX, %VRAX
> > > - jz L(ret)
> > > -
> > > - BSR %VRAX, %VRAX
> > > + VMOVU (%rdi), %VMM(1)
> > > + /* k0 has a 1 for each zero CHAR in YMM1. */
> > > + VPTESTN %VMM(1), %VMM(1), %k0
> > > + KMOV %k0, %VGPR(rsi)
> > > + test %VGPR(rsi), %VGPR(rsi)
> > > + jz L(aligned_more)
> > > + /* fallthrough: zero CHAR in first VEC. */
> > > +L(page_cross_return):
> > > + /* K1 has a 1 for each search CHAR match in VEC(1). */
> > > + VPCMPEQ %VMATCH, %VMM(1), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + /* Build mask up until first zero CHAR (used to mask of
> > > + potential search CHAR matches past the end of the string). */
> > > + blsmsk %VGPR(rsi), %VGPR(rsi)
> > > + and %VGPR(rsi), %VGPR(rax)
> > > + jz L(ret0)
> > > + /* Get last match (the `and` removed any out of bounds matches). */
> > > + bsr %VGPR(rax), %VGPR(rax)
> > > # ifdef USE_AS_WCSRCHR
> > > leaq (%rdi, %rax, CHAR_SIZE), %rax
> > > # else
> > > - add %rdi, %rax
> > > + addq %rdi, %rax
> > > # endif
> > > -L(ret):
> > > +L(ret0):
> > > ret
> > >
> > > -L(vector_x2_end):
> > > - VPCMPEQ %VMM(2), %VMM(0), %k2
> > > - KMOV %k2, %VRAX
> > > - BLSMSK %VRCX, %VRCX
> > > - and %VRCX, %VRAX
> > > - jz L(vector_x1_ret)
> > > -
> > > - BSR %VRAX, %VRAX
> > > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > - /* Check the first vector at very last to look for match. */
> > > -L(vector_x1_ret):
> > > - VPCMPEQ %VMM(1), %VMM(0), %k2
> > > - KMOV %k2, %VRAX
> > > - test %VRAX, %VRAX
> > > - jz L(ret)
> > > -
> > > - BSR %VRAX, %VRAX
> > > + /* Returns for first vec x1/x2/x3 have hard coded backward
> > > + search path for earlier matches. */
> > > + .p2align 4,, 6
> > > +L(first_vec_x1):
> > > + VPCMPEQ %VMATCH, %VMM(2), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > > + /* eax non-zero if search CHAR in range. */
> > > + and %VGPR(rcx), %VGPR(rax)
> > > + jnz L(first_vec_x1_return)
> > > +
> > > + /* fallthrough: no match in YMM2 then need to check for earlier
> > > + matches (in YMM1). */
> > > + .p2align 4,, 4
> > > +L(first_vec_x0_test):
> > > + VPCMPEQ %VMATCH, %VMM(1), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + test %VGPR(rax), %VGPR(rax)
> > > + jz L(ret1)
> > > + bsr %VGPR(rax), %VGPR(rax)
> > > # ifdef USE_AS_WCSRCHR
> > > leaq (%rsi, %rax, CHAR_SIZE), %rax
> > > # else
> > > - add %rsi, %rax
> > > +
> > > + addq %rsi, %rax
> > > # endif
> > > +L(ret1):
> > > + ret
> > > +
> > > + .p2align 4,, 10
> > > +L(first_vec_x3):
> > > + VPCMPEQ %VMATCH, %VMM(4), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > > + /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
> > > + and %VGPR(rcx), %VGPR(rax)
> > > + jz L(first_vec_x1_or_x2)
> > > + bsr %VGPR(rax), %VGPR(rax)
> > > + leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> > > + ret
> > > + .p2align 4,, 4
> > > +
> > > +L(first_vec_x2):
> > > + VPCMPEQ %VMATCH, %VMM(3), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + blsmsk %VGPR(rcx), %VGPR(rcx)
> > > + /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
> > > + and %VGPR(rcx), %VGPR(rax)
> > > + jz L(first_vec_x0_x1_test)
> > > + bsr %VGPR(rax), %VGPR(rax)
> > > + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> > > ret
> > >
> > > -L(align_more):
> > > - /* Zero r8 to store match result. */
> > > - xorl %r8d, %r8d
> > > - /* Save pointer of first vector, in case if no match found. */
> > > + .p2align 4,, 6
> > > +L(first_vec_x0_x1_test):
> > > + VPCMPEQ %VMATCH, %VMM(2), %k1
> > > + KMOV %k1, %VGPR(rax)
> > > + /* Check YMM2 for last match first. If no match try YMM1. */
> > > + test %VGPR(rax), %VGPR(rax)
> > > + jz L(first_vec_x0_test)
> > > + .p2align 4,, 4
> > > +L(first_vec_x1_return):
> > > + bsr %VGPR(rax), %VGPR(rax)
> > > + leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
> > > + ret
> > > +
> > > + .p2align 4,, 12
> > > +L(aligned_more):
> > > +L(page_cross_continue):
> > > + /* Need to keep original pointer incase VEC(1) has last match. */
> > > movq %rdi, %rsi
> > > - /* Align pointer to vector size. */
> > > andq $-VEC_SIZE, %rdi
> > > - /* Loop unroll for 2 vector loop. */
> > > - VMOVA (VEC_SIZE)(%rdi), %VMM(2)
> > > +
> > > + VMOVU VEC_SIZE(%rdi), %VMM(2)
> > > VPTESTN %VMM(2), %VMM(2), %k0
> > > KMOV %k0, %VRCX
> > > + movq %rdi, %r8
> > > test %VRCX, %VRCX
> > > - jnz L(vector_x2_end)
> > > + jnz L(first_vec_x1)
> > > +
> > > + VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> > > + VPTESTN %VMM(3), %VMM(3), %k0
> > > + KMOV %k0, %VRCX
> > > +
> > > + test %VRCX, %VRCX
> > > + jnz L(first_vec_x2)
> > > +
> > > + VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> > > + VPTESTN %VMM(4), %VMM(4), %k0
> > > + KMOV %k0, %VRCX
> > > +
> > > + /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
> > > + padding for efficient nop before loop alignment. */
> > > + test %rcx, %rcx
> > > + jnz L(first_vec_x3)
> > >
> > > - /* Save pointer of second vector, in case if no match
> > > - found. */
> > > - movq %rdi, %r9
> > > - /* Align address to VEC_SIZE * 2 for loop. */
> > > andq $-(VEC_SIZE * 2), %rdi
> > > + .p2align 4
> > > +L(first_aligned_loop):
> > > + /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> > > + gurantee they don't store a match. */
> > > + VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> > > + VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> > >
> > > - .p2align 4,,11
> > > -L(loop):
> > > - /* 2 vector loop, as it provide better performance as compared
> > > - to 4 vector loop. */
> > > - VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
> > > - VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
> > > - VPCMPEQ %VMM(3), %VMM(0), %k1
> > > - VPCMPEQ %VMM(4), %VMM(0), %k2
> > > - VPMINU %VMM(3), %VMM(4), %VMM(5)
> > > - VPTESTN %VMM(5), %VMM(5), %k0
> > > - KOR %k1, %k2, %k3
> > > - subq $-(VEC_SIZE * 2), %rdi
> > > - /* If k0 and k3 zero, match and end of string not found. */
> > > - KORTEST %k0, %k3
> > > - jz L(loop)
> > > -
> > > - /* If k0 is non zero, end of string found. */
> > > - KORTEST %k0, %k0
> > > - jnz L(endloop)
> > > -
> > > - lea VEC_SIZE(%rdi), %r8
> > > - /* A match found, it need to be stored in r8 before loop
> > > - continue. */
> > > - /* Check second vector first. */
> > > - KMOV %k2, %VRDX
> > > - test %VRDX, %VRDX
> > > - jnz L(loop_vec_x2_match)
> > > + VPCMP $4, %VMM(5), %VMATCH, %k2
> > > + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> > > +
> > > + VPMIN %VMM(5), %VMM(6), %VMM(7)
> > > +
> > > + VPTEST %VMM(7), %VMM(7), %k1{%k3}
> > > + subq $(VEC_SIZE * -2), %rdi
> > > + kortestM %k1, %k1
> > > + jc L(first_aligned_loop)
> > >
> > > + VPTESTN %VMM(7), %VMM(7), %k1
> > > KMOV %k1, %VRDX
> > > - /* Match is in first vector, rdi offset need to be subtracted
> > > - by VEC_SIZE. */
> > > - sub $VEC_SIZE, %r8
> > > -
> > > - /* If second vector doesn't have match, first vector must
> > > - have match. */
> > > -L(loop_vec_x2_match):
> > > - BSR %VRDX, %VRDX
> > > -# ifdef USE_AS_WCSRCHR
> > > - sal $2, %rdx
> > > -# endif
> > > - add %rdx, %r8
> > > - jmp L(loop)
> > > + test %VRDX, %VRDX
> > > + jz L(second_aligned_loop_prep)
> > >
> > > -L(endloop):
> > > - /* Check if string end in first loop vector. */
> > > - VPTESTN %VMM(3), %VMM(3), %k0
> > > - KMOV %k0, %VRCX
> > > - test %VRCX, %VRCX
> > > - jnz L(loop_vector_x1_end)
> > > + kortestM %k3, %k3
> > > + jnc L(return_first_aligned_loop)
> > >
> > > - /* Check if it has match in first loop vector. */
> > > - KMOV %k1, %VRAX
> > > + .p2align 4,, 6
> > > +L(first_vec_x1_or_x2_or_x3):
> > > + VPCMPEQ %VMM(4), %VMATCH, %k4
> > > + KMOV %k4, %VRAX
> > > test %VRAX, %VRAX
> > > - jz L(loop_vector_x2_end)
> > > + jz L(first_vec_x1_or_x2)
> > > + bsr %VRAX, %VRAX
> > > + leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> > > + ret
> > >
> > > - BSR %VRAX, %VRAX
> > > - leaq (%rdi, %rax, CHAR_SIZE), %r8
> > >
> > > - /* String must end in second loop vector. */
> > > -L(loop_vector_x2_end):
> > > - VPTESTN %VMM(4), %VMM(4), %k0
> > > + .p2align 4,, 8
> > > +L(return_first_aligned_loop):
> > > + VPTESTN %VMM(5), %VMM(5), %k0
> > > KMOV %k0, %VRCX
> > > + blsmsk %VRCX, %VRCX
> > > + jnc L(return_first_new_match_first)
> > > + blsmsk %VRDX, %VRDX
> > > + VPCMPEQ %VMM(6), %VMATCH, %k0
> > > + KMOV %k0, %VRAX
> > > + addq $VEC_SIZE, %rdi
> > > + and %VRDX, %VRAX
> > > + jnz L(return_first_new_match_ret)
> > > + subq $VEC_SIZE, %rdi
> > > +L(return_first_new_match_first):
> > > KMOV %k2, %VRAX
> > > - BLSMSK %VRCX, %VRCX
> > > - /* Check if it has match in second loop vector. */
> > > +# ifdef USE_AS_WCSRCHR
> > > + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> > > and %VRCX, %VRAX
> > > - jz L(check_last_match)
> > > +# else
> > > + andn %VRCX, %VRAX, %VRAX
> > > +# endif
> > > + jz L(first_vec_x1_or_x2_or_x3)
> > > +L(return_first_new_match_ret):
> > > + bsr %VRAX, %VRAX
> > > + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > > + ret
> > >
> > > - BSR %VRAX, %VRAX
> > > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > > + .p2align 4,, 10
> > > +L(first_vec_x1_or_x2):
> > > + VPCMPEQ %VMM(3), %VMATCH, %k3
> > > + KMOV %k3, %VRAX
> > > + test %VRAX, %VRAX
> > > + jz L(first_vec_x0_x1_test)
> > > + bsr %VRAX, %VRAX
> > > + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> > > ret
> > >
> > > - /* String end in first loop vector. */
> > > -L(loop_vector_x1_end):
> > > - KMOV %k1, %VRAX
> > > - BLSMSK %VRCX, %VRCX
> > > - /* Check if it has match in second loop vector. */
> > > - and %VRCX, %VRAX
> > > - jz L(check_last_match)
> > >
> > > - BSR %VRAX, %VRAX
> > > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > + .p2align 4
> > > + /* We can throw away the work done for the first 4x checks here
> > > + as we have a later match. This is the 'fast' path persay. */
> > > +L(second_aligned_loop_prep):
> > > +L(second_aligned_loop_set_furthest_match):
> > > + movq %rdi, %rsi
> > > + VMOVA %VMM(5), %VMM(7)
> > > + VMOVA %VMM(6), %VMM(8)
> > > + .p2align 4
> > > +L(second_aligned_loop):
> > > + VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> > > + VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> > > + VPCMP $4, %VMM(5), %VMATCH, %k2
> > > + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> > > +
> > > + VPMIN %VMM(5), %VMM(6), %VMM(4)
> > > +
> > > + VPTEST %VMM(4), %VMM(4), %k1{%k3}
> > > + subq $(VEC_SIZE * -2), %rdi
> > > + KMOV %k1, %VRCX
> > > + inc %RCX_M
> > > + jz L(second_aligned_loop)
> > > + VPTESTN %VMM(4), %VMM(4), %k1
> > > + KMOV %k1, %VRDX
> > > + test %VRDX, %VRDX
> > > + jz L(second_aligned_loop_set_furthest_match)
> > >
> > > - /* No match in first and second loop vector. */
> > > -L(check_last_match):
> > > - /* Check if any match recorded in r8. */
> > > - test %r8, %r8
> > > - jz L(vector_x2_ret)
> > > - movq %r8, %rax
> > > + kortestM %k3, %k3
> > > + jnc L(return_new_match)
> > > + /* branch here because there is a significant advantage interms
> > > + of output dependency chance in using edx. */
> > > +
> > > +
> > > +L(return_old_match):
> > > + VPCMPEQ %VMM(8), %VMATCH, %k0
> > > + KMOV %k0, %VRCX
> > > + bsr %VRCX, %VRCX
> > > + jnz L(return_old_match_ret)
> > > +
> > > + VPCMPEQ %VMM(7), %VMATCH, %k0
> > > + KMOV %k0, %VRCX
> > > + bsr %VRCX, %VRCX
> > > + subq $VEC_SIZE, %rsi
> > > +L(return_old_match_ret):
> > > + leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> > > ret
> > >
> > > - /* No match recorded in r8. Check the second saved vector
> > > - in beginning. */
> > > -L(vector_x2_ret):
> > > - VPCMPEQ %VMM(2), %VMM(0), %k2
> > > - KMOV %k2, %VRAX
> > > - test %VRAX, %VRAX
> > > - jz L(vector_x1_ret)
> > >
> > > - /* Match found in the second saved vector. */
> > > - BSR %VRAX, %VRAX
> > > - leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
> > > +L(return_new_match):
> > > + VPTESTN %VMM(5), %VMM(5), %k0
> > > + KMOV %k0, %VRCX
> > > + blsmsk %VRCX, %VRCX
> > > + jnc L(return_new_match_first)
> > > + dec %VRDX
> > > + VPCMPEQ %VMM(6), %VMATCH, %k0
> > > + KMOV %k0, %VRAX
> > > + addq $VEC_SIZE, %rdi
> > > + and %VRDX, %VRAX
> > > + jnz L(return_new_match_ret)
> > > + subq $VEC_SIZE, %rdi
> > > +L(return_new_match_first):
> > > + KMOV %k2, %VRAX
> > > +# ifdef USE_AS_WCSRCHR
> > > + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> > > + and %VRCX, %VRAX
> > > +# else
> > > + andn %VRCX, %VRAX, %VRAX
> > > +# endif
> > > + jz L(return_old_match)
> > > +L(return_new_match_ret):
> > > + bsr %VRAX, %VRAX
> > > + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > > ret
> > >
> > > -L(page_cross):
> > > - mov %rdi, %rax
> > > - movl %edi, %ecx
> > > + .p2align 4,, 4
> > > +L(cross_page_boundary):
> > > + xorq %rdi, %rax
> > > + mov $-1, %VRDX
> > > + VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
> > > + VPTESTN %VMM(6), %VMM(6), %k0
> > > + KMOV %k0, %VRSI
> > >
> > > # ifdef USE_AS_WCSRCHR
> > > - /* Calculate number of compare result bits to be skipped for
> > > - wide string alignment adjustment. */
> > > - andl $(VEC_SIZE - 1), %ecx
> > > - sarl $2, %ecx
> > > + movl %edi, %ecx
> > > + and $(VEC_SIZE - 1), %ecx
> > > + shrl $2, %ecx
> > > # endif
> > > - /* ecx contains number of w[char] to be skipped as a result
> > > - of address alignment. */
> > > - andq $-VEC_SIZE, %rax
> > > - VMOVA (%rax), %VMM(1)
> > > - VPTESTN %VMM(1), %VMM(1), %k1
> > > - KMOV %k1, %VRAX
> > > - SHR %cl, %VRAX
> > > - jz L(page_cross_continue)
> > > - VPCMPEQ %VMM(1), %VMM(0), %k0
> > > - KMOV %k0, %VRDX
> > > - SHR %cl, %VRDX
> > > - BLSMSK %VRAX, %VRAX
> > > - and %VRDX, %VRAX
> > > - jz L(ret)
> > > - BSR %VRAX, %VRAX
> > > + shlx %SHIFT_REG, %VRDX, %VRDX
> > > +
> > > # ifdef USE_AS_WCSRCHR
> > > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > > + kmovw %edx, %k1
> > > # else
> > > - add %rdi, %rax
> > > + KMOV %VRDX, %k1
> > > # endif
> > >
> > > - ret
> > > -END (STRRCHR)
> > > + VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
> > > + /* We could technically just jmp back after the vpcompress but
> > > + it doesn't save any 16-byte blocks. */
> > > +
> > > + shrx %SHIFT_REG, %VRSI, %VRSI
> > > + test %VRSI, %VRSI
> > > + jnz L(page_cross_return)
> > > + jmp L(page_cross_continue)
> > > + /* 1-byte from cache line. */
> > > +END(STRRCHR)
> > > #endif
> > > diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S b/sysdeps/x86_64/multiarch/strrchr-evex.S
> > > index 85e3b0119f..b606e6f69c 100644
> > > --- a/sysdeps/x86_64/multiarch/strrchr-evex.S
> > > +++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
> > > @@ -1,394 +1,8 @@
> > > -/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
> > > - Copyright (C) 2021-2023 Free Software Foundation, Inc.
> > > - This file is part of the GNU C Library.
> > > -
> > > - The GNU C Library is free software; you can redistribute it and/or
> > > - modify it under the terms of the GNU Lesser General Public
> > > - License as published by the Free Software Foundation; either
> > > - version 2.1 of the License, or (at your option) any later version.
> > > -
> > > - The GNU C Library is distributed in the hope that it will be useful,
> > > - but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > > - Lesser General Public License for more details.
> > > -
> > > - You should have received a copy of the GNU Lesser General Public
> > > - License along with the GNU C Library; if not, see
> > > - <https://www.gnu.org/licenses/>. */
> > > -
> > > -#include <isa-level.h>
> > > -
> > > -#if ISA_SHOULD_BUILD (4)
> > > -
> > > -# include <sysdep.h>
> > > -
> > > # ifndef STRRCHR
> > > # define STRRCHR __strrchr_evex
> > > # endif
> > >
> > > -# include "x86-evex256-vecs.h"
> > > -
> > > -# ifdef USE_AS_WCSRCHR
> > > -# define SHIFT_REG rsi
> > > -# define kunpck_2x kunpckbw
> > > -# define kmov_2x kmovd
> > > -# define maskz_2x ecx
> > > -# define maskm_2x eax
> > > -# define CHAR_SIZE 4
> > > -# define VPMIN vpminud
> > > -# define VPTESTN vptestnmd
> > > -# define VPTEST vptestmd
> > > -# define VPBROADCAST vpbroadcastd
> > > -# define VPCMPEQ vpcmpeqd
> > > -# define VPCMP vpcmpd
> > > -
> > > -# define USE_WIDE_CHAR
> > > -# else
> > > -# define SHIFT_REG rdi
> > > -# define kunpck_2x kunpckdq
> > > -# define kmov_2x kmovq
> > > -# define maskz_2x rcx
> > > -# define maskm_2x rax
> > > -
> > > -# define CHAR_SIZE 1
> > > -# define VPMIN vpminub
> > > -# define VPTESTN vptestnmb
> > > -# define VPTEST vptestmb
> > > -# define VPBROADCAST vpbroadcastb
> > > -# define VPCMPEQ vpcmpeqb
> > > -# define VPCMP vpcmpb
> > > -# endif
> > > -
> > > -# include "reg-macros.h"
> > > -
> > > -# define VMATCH VMM(0)
> > > -# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> > > -# define PAGE_SIZE 4096
> > > -
> > > - .section SECTION(.text), "ax", @progbits
> > > -ENTRY_P2ALIGN(STRRCHR, 6)
> > > - movl %edi, %eax
> > > - /* Broadcast CHAR to VMATCH. */
> > > - VPBROADCAST %esi, %VMATCH
> > > -
> > > - andl $(PAGE_SIZE - 1), %eax
> > > - cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> > > - jg L(cross_page_boundary)
> > > -L(page_cross_continue):
> > > - VMOVU (%rdi), %VMM(1)
> > > - /* k0 has a 1 for each zero CHAR in VEC(1). */
> > > - VPTESTN %VMM(1), %VMM(1), %k0
> > > - KMOV %k0, %VRSI
> > > - test %VRSI, %VRSI
> > > - jz L(aligned_more)
> > > - /* fallthrough: zero CHAR in first VEC. */
> > > - /* K1 has a 1 for each search CHAR match in VEC(1). */
> > > - VPCMPEQ %VMATCH, %VMM(1), %k1
> > > - KMOV %k1, %VRAX
> > > - /* Build mask up until first zero CHAR (used to mask of
> > > - potential search CHAR matches past the end of the string).
> > > - */
> > > - blsmsk %VRSI, %VRSI
> > > - and %VRSI, %VRAX
> > > - jz L(ret0)
> > > - /* Get last match (the `and` removed any out of bounds matches).
> > > - */
> > > - bsr %VRAX, %VRAX
> > > -# ifdef USE_AS_WCSRCHR
> > > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > > -# else
> > > - addq %rdi, %rax
> > > -# endif
> > > -L(ret0):
> > > - ret
> > > -
> > > - /* Returns for first vec x1/x2/x3 have hard coded backward
> > > - search path for earlier matches. */
> > > - .p2align 4,, 6
> > > -L(first_vec_x1):
> > > - VPCMPEQ %VMATCH, %VMM(2), %k1
> > > - KMOV %k1, %VRAX
> > > - blsmsk %VRCX, %VRCX
> > > - /* eax non-zero if search CHAR in range. */
> > > - and %VRCX, %VRAX
> > > - jnz L(first_vec_x1_return)
> > > -
> > > - /* fallthrough: no match in VEC(2) then need to check for
> > > - earlier matches (in VEC(1)). */
> > > - .p2align 4,, 4
> > > -L(first_vec_x0_test):
> > > - VPCMPEQ %VMATCH, %VMM(1), %k1
> > > - KMOV %k1, %VRAX
> > > - test %VRAX, %VRAX
> > > - jz L(ret1)
> > > - bsr %VRAX, %VRAX
> > > -# ifdef USE_AS_WCSRCHR
> > > - leaq (%rsi, %rax, CHAR_SIZE), %rax
> > > -# else
> > > - addq %rsi, %rax
> > > -# endif
> > > -L(ret1):
> > > - ret
> > > -
> > > - .p2align 4,, 10
> > > -L(first_vec_x1_or_x2):
> > > - VPCMPEQ %VMM(3), %VMATCH, %k3
> > > - VPCMPEQ %VMM(2), %VMATCH, %k2
> > > - /* K2 and K3 have 1 for any search CHAR match. Test if any
> > > - matches between either of them. Otherwise check VEC(1). */
> > > - KORTEST %k2, %k3
> > > - jz L(first_vec_x0_test)
> > > -
> > > - /* Guaranteed that VEC(2) and VEC(3) are within range so merge
> > > - the two bitmasks then get last result. */
> > > - kunpck_2x %k2, %k3, %k3
> > > - kmov_2x %k3, %maskm_2x
> > > - bsr %maskm_2x, %maskm_2x
> > > - leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > - .p2align 4,, 7
> > > -L(first_vec_x3):
> > > - VPCMPEQ %VMATCH, %VMM(4), %k1
> > > - KMOV %k1, %VRAX
> > > - blsmsk %VRCX, %VRCX
> > > - /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
> > > - */
> > > - and %VRCX, %VRAX
> > > - jz L(first_vec_x1_or_x2)
> > > - bsr %VRAX, %VRAX
> > > - leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > -
> > > - .p2align 4,, 6
> > > -L(first_vec_x0_x1_test):
> > > - VPCMPEQ %VMATCH, %VMM(2), %k1
> > > - KMOV %k1, %VRAX
> > > - /* Check VEC(2) for last match first. If no match try VEC(1).
> > > - */
> > > - test %VRAX, %VRAX
> > > - jz L(first_vec_x0_test)
> > > - .p2align 4,, 4
> > > -L(first_vec_x1_return):
> > > - bsr %VRAX, %VRAX
> > > - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > -
> > > - .p2align 4,, 10
> > > -L(first_vec_x2):
> > > - VPCMPEQ %VMATCH, %VMM(3), %k1
> > > - KMOV %k1, %VRAX
> > > - blsmsk %VRCX, %VRCX
> > > - /* Check VEC(3) for last match first. If no match try
> > > - VEC(2)/VEC(1). */
> > > - and %VRCX, %VRAX
> > > - jz L(first_vec_x0_x1_test)
> > > - bsr %VRAX, %VRAX
> > > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > -
> > > - .p2align 4,, 12
> > > -L(aligned_more):
> > > - /* Need to keep original pointer in case VEC(1) has last match.
> > > - */
> > > - movq %rdi, %rsi
> > > - andq $-VEC_SIZE, %rdi
> > > -
> > > - VMOVU VEC_SIZE(%rdi), %VMM(2)
> > > - VPTESTN %VMM(2), %VMM(2), %k0
> > > - KMOV %k0, %VRCX
> > > -
> > > - test %VRCX, %VRCX
> > > - jnz L(first_vec_x1)
> > > -
> > > - VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> > > - VPTESTN %VMM(3), %VMM(3), %k0
> > > - KMOV %k0, %VRCX
> > > -
> > > - test %VRCX, %VRCX
> > > - jnz L(first_vec_x2)
> > > -
> > > - VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> > > - VPTESTN %VMM(4), %VMM(4), %k0
> > > - KMOV %k0, %VRCX
> > > - movq %rdi, %r8
> > > - test %VRCX, %VRCX
> > > - jnz L(first_vec_x3)
> > > -
> > > - andq $-(VEC_SIZE * 2), %rdi
> > > - .p2align 4,, 10
> > > -L(first_aligned_loop):
> > > - /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> > > - guarantee they don't store a match. */
> > > - VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> > > - VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> > > -
> > > - VPCMPEQ %VMM(5), %VMATCH, %k2
> > > - vpxord %VMM(6), %VMATCH, %VMM(7)
> > > -
> > > - VPMIN %VMM(5), %VMM(6), %VMM(8)
> > > - VPMIN %VMM(8), %VMM(7), %VMM(7)
> > > -
> > > - VPTESTN %VMM(7), %VMM(7), %k1
> > > - subq $(VEC_SIZE * -2), %rdi
> > > - KORTEST %k1, %k2
> > > - jz L(first_aligned_loop)
> > > -
> > > - VPCMPEQ %VMM(6), %VMATCH, %k3
> > > - VPTESTN %VMM(8), %VMM(8), %k1
> > > -
> > > - /* If k1 is zero, then we found a CHAR match but no null-term.
> > > - We can now safely throw out VEC1-4. */
> > > - KTEST %k1, %k1
> > > - jz L(second_aligned_loop_prep)
> > > -
> > > - KORTEST %k2, %k3
> > > - jnz L(return_first_aligned_loop)
> > > -
> > > -
> > > - .p2align 4,, 6
> > > -L(first_vec_x1_or_x2_or_x3):
> > > - VPCMPEQ %VMM(4), %VMATCH, %k4
> > > - KMOV %k4, %VRAX
> > > - bsr %VRAX, %VRAX
> > > - jz L(first_vec_x1_or_x2)
> > > - leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > -
> > > - .p2align 4,, 8
> > > -L(return_first_aligned_loop):
> > > - VPTESTN %VMM(5), %VMM(5), %k0
> > > -
> > > - /* Combined results from VEC5/6. */
> > > - kunpck_2x %k0, %k1, %k0
> > > - kmov_2x %k0, %maskz_2x
> > > -
> > > - blsmsk %maskz_2x, %maskz_2x
> > > - kunpck_2x %k2, %k3, %k3
> > > - kmov_2x %k3, %maskm_2x
> > > - and %maskz_2x, %maskm_2x
> > > - jz L(first_vec_x1_or_x2_or_x3)
> > > -
> > > - bsr %maskm_2x, %maskm_2x
> > > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > - .p2align 4
> > > - /* We can throw away the work done for the first 4x checks here
> > > - as we have a later match. This is the 'fast' path persay.
> > > - */
> > > -L(second_aligned_loop_prep):
> > > -L(second_aligned_loop_set_furthest_match):
> > > - movq %rdi, %rsi
> > > - /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
> > > - port0 and have noticeable overhead in the loop. */
> > > - VMOVA %VMM(5), %VMM(7)
> > > - VMOVA %VMM(6), %VMM(8)
> > > - .p2align 4
> > > -L(second_aligned_loop):
> > > - VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> > > - VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> > > - VPCMPEQ %VMM(5), %VMATCH, %k2
> > > - vpxord %VMM(6), %VMATCH, %VMM(3)
> > > -
> > > - VPMIN %VMM(5), %VMM(6), %VMM(4)
> > > - VPMIN %VMM(3), %VMM(4), %VMM(3)
> > > -
> > > - VPTESTN %VMM(3), %VMM(3), %k1
> > > - subq $(VEC_SIZE * -2), %rdi
> > > - KORTEST %k1, %k2
> > > - jz L(second_aligned_loop)
> > > - VPCMPEQ %VMM(6), %VMATCH, %k3
> > > - VPTESTN %VMM(4), %VMM(4), %k1
> > > - KTEST %k1, %k1
> > > - jz L(second_aligned_loop_set_furthest_match)
> > > -
> > > - /* branch here because we know we have a match in VEC7/8 but
> > > - might not in VEC5/6 so the latter is expected to be less
> > > - likely. */
> > > - KORTEST %k2, %k3
> > > - jnz L(return_new_match)
> > > -
> > > -L(return_old_match):
> > > - VPCMPEQ %VMM(8), %VMATCH, %k0
> > > - KMOV %k0, %VRCX
> > > - bsr %VRCX, %VRCX
> > > - jnz L(return_old_match_ret)
> > > -
> > > - VPCMPEQ %VMM(7), %VMATCH, %k0
> > > - KMOV %k0, %VRCX
> > > - bsr %VRCX, %VRCX
> > > - subq $VEC_SIZE, %rsi
> > > -L(return_old_match_ret):
> > > - leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > - .p2align 4,, 10
> > > -L(return_new_match):
> > > - VPTESTN %VMM(5), %VMM(5), %k0
> > > -
> > > - /* Combined results from VEC5/6. */
> > > - kunpck_2x %k0, %k1, %k0
> > > - kmov_2x %k0, %maskz_2x
> > > -
> > > - blsmsk %maskz_2x, %maskz_2x
> > > - kunpck_2x %k2, %k3, %k3
> > > - kmov_2x %k3, %maskm_2x
> > > -
> > > - /* Match at end was out-of-bounds so use last known match. */
> > > - and %maskz_2x, %maskm_2x
> > > - jz L(return_old_match)
> > > -
> > > - bsr %maskm_2x, %maskm_2x
> > > - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> > > - ret
> > > -
> > > -L(cross_page_boundary):
> > > - /* eax contains all the page offset bits of src (rdi). `xor rdi,
> > > - rax` sets pointer will all page offset bits cleared so
> > > - offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
> > > - before page cross (guaranteed to be safe to read). Doing this
> > > - as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
> > > - a bit of code size. */
> > > - xorq %rdi, %rax
> > > - VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
> > > - VPTESTN %VMM(1), %VMM(1), %k0
> > > - KMOV %k0, %VRCX
> > > -
> > > - /* Shift out zero CHAR matches that are before the beginning of
> > > - src (rdi). */
> > > -# ifdef USE_AS_WCSRCHR
> > > - movl %edi, %esi
> > > - andl $(VEC_SIZE - 1), %esi
> > > - shrl $2, %esi
> > > -# endif
> > > - shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
> > > -
> > > - test %VRCX, %VRCX
> > > - jz L(page_cross_continue)
> > > +#include "x86-evex512-vecs.h"
> > > +#include "reg-macros.h"
> > >
> > > - /* Found zero CHAR so need to test for search CHAR. */
> > > - VPCMP $0, %VMATCH, %VMM(1), %k1
> > > - KMOV %k1, %VRAX
> > > - /* Shift out search CHAR matches that are before the beginning of
> > > - src (rdi). */
> > > - shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
> > > -
> > > - /* Check if any search CHAR match in range. */
> > > - blsmsk %VRCX, %VRCX
> > > - and %VRCX, %VRAX
> > > - jz L(ret3)
> > > - bsr %VRAX, %VRAX
> > > -# ifdef USE_AS_WCSRCHR
> > > - leaq (%rdi, %rax, CHAR_SIZE), %rax
> > > -# else
> > > - addq %rdi, %rax
> > > -# endif
> > > -L(ret3):
> > > - ret
> > > -END(STRRCHR)
> > > -#endif
> > > +#include "strrchr-evex-base.S"
> > > diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > > index e5c5fe3bf2..a584cd3f43 100644
> > > --- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > > +++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> > > @@ -4,4 +4,5 @@
> > >
> > > #define STRRCHR WCSRCHR
> > > #define USE_AS_WCSRCHR 1
> > > +#define USE_WIDE_CHAR 1
> > > #include "strrchr-evex.S"
> > > --
> > > 2.34.1
> > >
>
>
>
> --
> H.J.
^ permalink raw reply [flat|nested] 12+ messages in thread
* x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-09-21 14:38 x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10 Noah Goldstein
2023-09-21 14:39 ` Noah Goldstein
@ 2023-10-04 18:48 ` Noah Goldstein
2023-10-04 19:00 ` Sunil Pandey
2023-10-18 9:18 ` Florian Weimer
1 sibling, 2 replies; 12+ messages in thread
From: Noah Goldstein @ 2023-10-04 18:48 UTC (permalink / raw)
To: libc-alpha; +Cc: goldstein.w.n, hjl.tools, carlos
This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
common implementation: `strrchr-evex-base.S`.
The motivation is `strrchr-evex` needed to be refactored to not use
64-bit masked registers in preperation for AVX10.
Once vec-width masked register combining was removed, the EVEX and
EVEX512 implementations can easily be implemented in the same file
without any major overhead.
The net result is performance improvements (measured on TGL) for both
`strrchr-evex` and `strrchr-evex512`. Although, note there are some
regressions in the test suite and it may be many of the cases that
make the total-geomean of improvement/regression across bench-strrchr
are cold. The point of the performance measurement is to show there
are no major regressions, but the primary motivation is preperation
for AVX10.
Benchmarks where taken on TGL:
https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
Full check passes on x86.
---
sysdeps/x86_64/multiarch/strrchr-evex-base.S | 469 ++++++++++++-------
sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
3 files changed, 293 insertions(+), 569 deletions(-)
diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
index 58b2853ab6..cd6a0a870a 100644
--- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
+++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
@@ -1,4 +1,4 @@
-/* Placeholder function, not used by any processor at the moment.
+/* Implementation for strrchr using evex256 and evex512.
Copyright (C) 2022-2023 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -16,8 +16,6 @@
License along with the GNU C Library; if not, see
<https://www.gnu.org/licenses/>. */
-/* UNUSED. Exists purely as reference implementation. */
-
#include <isa-level.h>
#if ISA_SHOULD_BUILD (4)
@@ -25,240 +23,351 @@
# include <sysdep.h>
# ifdef USE_AS_WCSRCHR
+# if VEC_SIZE == 64
+# define RCX_M cx
+# define KORTEST_M kortestw
+# else
+# define RCX_M cl
+# define KORTEST_M kortestb
+# endif
+
+# define SHIFT_REG VRCX
# define CHAR_SIZE 4
-# define VPBROADCAST vpbroadcastd
-# define VPCMPEQ vpcmpeqd
-# define VPMINU vpminud
+# define VPCMP vpcmpd
+# define VPMIN vpminud
+# define VPCOMPRESS vpcompressd
# define VPTESTN vptestnmd
+# define VPTEST vptestmd
+# define VPBROADCAST vpbroadcastd
+# define VPCMPEQ vpcmpeqd
+
# else
+# define SHIFT_REG VRDI
# define CHAR_SIZE 1
-# define VPBROADCAST vpbroadcastb
-# define VPCMPEQ vpcmpeqb
-# define VPMINU vpminub
+# define VPCMP vpcmpb
+# define VPMIN vpminub
+# define VPCOMPRESS vpcompressb
# define VPTESTN vptestnmb
+# define VPTEST vptestmb
+# define VPBROADCAST vpbroadcastb
+# define VPCMPEQ vpcmpeqb
+
+# define RCX_M VRCX
+# define KORTEST_M KORTEST
# endif
-# define PAGE_SIZE 4096
+# define VMATCH VMM(0)
# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
+# define PAGE_SIZE 4096
.section SECTION(.text), "ax", @progbits
-/* Aligning entry point to 64 byte, provides better performance for
- one vector length string. */
-ENTRY_P2ALIGN (STRRCHR, 6)
-
- /* Broadcast CHAR to VMM(0). */
- VPBROADCAST %esi, %VMM(0)
+ /* Aligning entry point to 64 byte, provides better performance for
+ one vector length string. */
+ENTRY_P2ALIGN(STRRCHR, 6)
movl %edi, %eax
- sall $20, %eax
- cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
- ja L(page_cross)
+ /* Broadcast CHAR to VMATCH. */
+ VPBROADCAST %esi, %VMATCH
-L(page_cross_continue):
- /* Compare [w]char for null, mask bit will be set for match. */
- VMOVU (%rdi), %VMM(1)
+ andl $(PAGE_SIZE - 1), %eax
+ cmpl $(PAGE_SIZE - VEC_SIZE), %eax
+ jg L(cross_page_boundary)
- VPTESTN %VMM(1), %VMM(1), %k1
- KMOV %k1, %VRCX
- test %VRCX, %VRCX
- jz L(align_more)
-
- VPCMPEQ %VMM(1), %VMM(0), %k0
- KMOV %k0, %VRAX
- BLSMSK %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(ret)
-
- BSR %VRAX, %VRAX
+ VMOVU (%rdi), %VMM(1)
+ /* k0 has a 1 for each zero CHAR in YMM1. */
+ VPTESTN %VMM(1), %VMM(1), %k0
+ KMOV %k0, %VGPR(rsi)
+ test %VGPR(rsi), %VGPR(rsi)
+ jz L(aligned_more)
+ /* fallthrough: zero CHAR in first VEC. */
+L(page_cross_return):
+ /* K1 has a 1 for each search CHAR match in VEC(1). */
+ VPCMPEQ %VMATCH, %VMM(1), %k1
+ KMOV %k1, %VGPR(rax)
+ /* Build mask up until first zero CHAR (used to mask of
+ potential search CHAR matches past the end of the string). */
+ blsmsk %VGPR(rsi), %VGPR(rsi)
+ /* Use `and` here to remove any out of bounds matches so we can
+ do a reverse scan on `rax` to find the last match. */
+ and %VGPR(rsi), %VGPR(rax)
+ jz L(ret0)
+ /* Get last match. */
+ bsr %VGPR(rax), %VGPR(rax)
# ifdef USE_AS_WCSRCHR
leaq (%rdi, %rax, CHAR_SIZE), %rax
# else
- add %rdi, %rax
+ addq %rdi, %rax
# endif
-L(ret):
+L(ret0):
ret
-L(vector_x2_end):
- VPCMPEQ %VMM(2), %VMM(0), %k2
- KMOV %k2, %VRAX
- BLSMSK %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(vector_x1_ret)
-
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
- /* Check the first vector at very last to look for match. */
-L(vector_x1_ret):
- VPCMPEQ %VMM(1), %VMM(0), %k2
- KMOV %k2, %VRAX
- test %VRAX, %VRAX
- jz L(ret)
-
- BSR %VRAX, %VRAX
+ /* Returns for first vec x1/x2/x3 have hard coded backward
+ search path for earlier matches. */
+ .p2align 4,, 6
+L(first_vec_x1):
+ VPCMPEQ %VMATCH, %VMM(2), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* eax non-zero if search CHAR in range. */
+ and %VGPR(rcx), %VGPR(rax)
+ jnz L(first_vec_x1_return)
+
+ /* fallthrough: no match in YMM2 then need to check for earlier
+ matches (in YMM1). */
+ .p2align 4,, 4
+L(first_vec_x0_test):
+ VPCMPEQ %VMATCH, %VMM(1), %k1
+ KMOV %k1, %VGPR(rax)
+ test %VGPR(rax), %VGPR(rax)
+ jz L(ret1)
+ bsr %VGPR(rax), %VGPR(rax)
# ifdef USE_AS_WCSRCHR
leaq (%rsi, %rax, CHAR_SIZE), %rax
# else
- add %rsi, %rax
+ addq %rsi, %rax
# endif
+L(ret1):
ret
-L(align_more):
- /* Zero r8 to store match result. */
- xorl %r8d, %r8d
- /* Save pointer of first vector, in case if no match found. */
+ .p2align 4,, 10
+L(first_vec_x3):
+ VPCMPEQ %VMATCH, %VMM(4), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
+ and %VGPR(rcx), %VGPR(rax)
+ jz L(first_vec_x1_or_x2)
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
+ ret
+ .p2align 4,, 4
+
+L(first_vec_x2):
+ VPCMPEQ %VMATCH, %VMM(3), %k1
+ KMOV %k1, %VGPR(rax)
+ blsmsk %VGPR(rcx), %VGPR(rcx)
+ /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
+ and %VGPR(rcx), %VGPR(rax)
+ jz L(first_vec_x0_x1_test)
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
+ ret
+
+ .p2align 4,, 6
+L(first_vec_x0_x1_test):
+ VPCMPEQ %VMATCH, %VMM(2), %k1
+ KMOV %k1, %VGPR(rax)
+ /* Check YMM2 for last match first. If no match try YMM1. */
+ test %VGPR(rax), %VGPR(rax)
+ jz L(first_vec_x0_test)
+ .p2align 4,, 4
+L(first_vec_x1_return):
+ bsr %VGPR(rax), %VGPR(rax)
+ leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
+ ret
+
+ .p2align 4,, 12
+L(aligned_more):
+L(page_cross_continue):
+ /* Need to keep original pointer incase VEC(1) has last match. */
movq %rdi, %rsi
- /* Align pointer to vector size. */
andq $-VEC_SIZE, %rdi
- /* Loop unroll for 2 vector loop. */
- VMOVA (VEC_SIZE)(%rdi), %VMM(2)
+
+ VMOVU VEC_SIZE(%rdi), %VMM(2)
VPTESTN %VMM(2), %VMM(2), %k0
KMOV %k0, %VRCX
+ movq %rdi, %r8
test %VRCX, %VRCX
- jnz L(vector_x2_end)
+ jnz L(first_vec_x1)
+
+ VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
+ VPTESTN %VMM(3), %VMM(3), %k0
+ KMOV %k0, %VRCX
+
+ test %VRCX, %VRCX
+ jnz L(first_vec_x2)
+
+ VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
+ VPTESTN %VMM(4), %VMM(4), %k0
+ KMOV %k0, %VRCX
+
+ /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
+ padding for efficient nop before loop alignment. */
+ test %rcx, %rcx
+ jnz L(first_vec_x3)
- /* Save pointer of second vector, in case if no match
- found. */
- movq %rdi, %r9
- /* Align address to VEC_SIZE * 2 for loop. */
andq $-(VEC_SIZE * 2), %rdi
+ .p2align 4
+L(first_aligned_loop):
+ /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
+ gurantee they don't store a match. */
+ VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
+ VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
- .p2align 4,,11
-L(loop):
- /* 2 vector loop, as it provide better performance as compared
- to 4 vector loop. */
- VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
- VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
- VPCMPEQ %VMM(3), %VMM(0), %k1
- VPCMPEQ %VMM(4), %VMM(0), %k2
- VPMINU %VMM(3), %VMM(4), %VMM(5)
- VPTESTN %VMM(5), %VMM(5), %k0
- KOR %k1, %k2, %k3
- subq $-(VEC_SIZE * 2), %rdi
- /* If k0 and k3 zero, match and end of string not found. */
- KORTEST %k0, %k3
- jz L(loop)
-
- /* If k0 is non zero, end of string found. */
- KORTEST %k0, %k0
- jnz L(endloop)
-
- lea VEC_SIZE(%rdi), %r8
- /* A match found, it need to be stored in r8 before loop
- continue. */
- /* Check second vector first. */
- KMOV %k2, %VRDX
- test %VRDX, %VRDX
- jnz L(loop_vec_x2_match)
+ VPCMP $4, %VMM(5), %VMATCH, %k2
+ VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
+ VPMIN %VMM(5), %VMM(6), %VMM(7)
+
+ VPTEST %VMM(7), %VMM(7), %k1{%k3}
+ subq $(VEC_SIZE * -2), %rdi
+ KORTEST_M %k1, %k1
+ jc L(first_aligned_loop)
+
+ VPTESTN %VMM(7), %VMM(7), %k1
KMOV %k1, %VRDX
- /* Match is in first vector, rdi offset need to be subtracted
- by VEC_SIZE. */
- sub $VEC_SIZE, %r8
-
- /* If second vector doesn't have match, first vector must
- have match. */
-L(loop_vec_x2_match):
- BSR %VRDX, %VRDX
-# ifdef USE_AS_WCSRCHR
- sal $2, %rdx
-# endif
- add %rdx, %r8
- jmp L(loop)
+ test %VRDX, %VRDX
+ jz L(second_aligned_loop_prep)
-L(endloop):
- /* Check if string end in first loop vector. */
- VPTESTN %VMM(3), %VMM(3), %k0
- KMOV %k0, %VRCX
- test %VRCX, %VRCX
- jnz L(loop_vector_x1_end)
+ KORTEST_M %k3, %k3
+ jnc L(return_first_aligned_loop)
- /* Check if it has match in first loop vector. */
- KMOV %k1, %VRAX
+ .p2align 4,, 6
+L(first_vec_x1_or_x2_or_x3):
+ VPCMPEQ %VMM(4), %VMATCH, %k4
+ KMOV %k4, %VRAX
test %VRAX, %VRAX
- jz L(loop_vector_x2_end)
-
- BSR %VRAX, %VRAX
- leaq (%rdi, %rax, CHAR_SIZE), %r8
+ jz L(first_vec_x1_or_x2)
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
+ ret
- /* String must end in second loop vector. */
-L(loop_vector_x2_end):
- VPTESTN %VMM(4), %VMM(4), %k0
+ .p2align 4,, 8
+L(return_first_aligned_loop):
+ VPTESTN %VMM(5), %VMM(5), %k0
KMOV %k0, %VRCX
+ blsmsk %VRCX, %VRCX
+ jnc L(return_first_new_match_first)
+ blsmsk %VRDX, %VRDX
+ VPCMPEQ %VMM(6), %VMATCH, %k0
+ KMOV %k0, %VRAX
+ addq $VEC_SIZE, %rdi
+ and %VRDX, %VRAX
+ jnz L(return_first_new_match_ret)
+ subq $VEC_SIZE, %rdi
+L(return_first_new_match_first):
KMOV %k2, %VRAX
- BLSMSK %VRCX, %VRCX
- /* Check if it has match in second loop vector. */
+# ifdef USE_AS_WCSRCHR
+ xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
and %VRCX, %VRAX
- jz L(check_last_match)
+# else
+ andn %VRCX, %VRAX, %VRAX
+# endif
+ jz L(first_vec_x1_or_x2_or_x3)
+L(return_first_new_match_ret):
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
+ ret
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
+ .p2align 4,, 10
+L(first_vec_x1_or_x2):
+ VPCMPEQ %VMM(3), %VMATCH, %k3
+ KMOV %k3, %VRAX
+ test %VRAX, %VRAX
+ jz L(first_vec_x0_x1_test)
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
ret
- /* String end in first loop vector. */
-L(loop_vector_x1_end):
- KMOV %k1, %VRAX
- BLSMSK %VRCX, %VRCX
- /* Check if it has match in second loop vector. */
- and %VRCX, %VRAX
- jz L(check_last_match)
+ .p2align 4
+ /* We can throw away the work done for the first 4x checks here
+ as we have a later match. This is the 'fast' path persay. */
+L(second_aligned_loop_prep):
+L(second_aligned_loop_set_furthest_match):
+ movq %rdi, %rsi
+ VMOVA %VMM(5), %VMM(7)
+ VMOVA %VMM(6), %VMM(8)
+ .p2align 4
+L(second_aligned_loop):
+ VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
+ VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
+ VPCMP $4, %VMM(5), %VMATCH, %k2
+ VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
+
+ VPMIN %VMM(5), %VMM(6), %VMM(4)
+
+ VPTEST %VMM(4), %VMM(4), %k1{%k3}
+ subq $(VEC_SIZE * -2), %rdi
+ KMOV %k1, %VRCX
+ inc %RCX_M
+ jz L(second_aligned_loop)
+ VPTESTN %VMM(4), %VMM(4), %k1
+ KMOV %k1, %VRDX
+ test %VRDX, %VRDX
+ jz L(second_aligned_loop_set_furthest_match)
- BSR %VRAX, %VRAX
- leaq (%rdi, %rax, CHAR_SIZE), %rax
- ret
+ KORTEST_M %k3, %k3
+ jnc L(return_new_match)
+ /* branch here because there is a significant advantage interms
+ of output dependency chance in using edx. */
- /* No match in first and second loop vector. */
-L(check_last_match):
- /* Check if any match recorded in r8. */
- test %r8, %r8
- jz L(vector_x2_ret)
- movq %r8, %rax
+L(return_old_match):
+ VPCMPEQ %VMM(8), %VMATCH, %k0
+ KMOV %k0, %VRCX
+ bsr %VRCX, %VRCX
+ jnz L(return_old_match_ret)
+
+ VPCMPEQ %VMM(7), %VMATCH, %k0
+ KMOV %k0, %VRCX
+ bsr %VRCX, %VRCX
+ subq $VEC_SIZE, %rsi
+L(return_old_match_ret):
+ leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
ret
- /* No match recorded in r8. Check the second saved vector
- in beginning. */
-L(vector_x2_ret):
- VPCMPEQ %VMM(2), %VMM(0), %k2
+L(return_new_match):
+ VPTESTN %VMM(5), %VMM(5), %k0
+ KMOV %k0, %VRCX
+ blsmsk %VRCX, %VRCX
+ jnc L(return_new_match_first)
+ dec %VRDX
+ VPCMPEQ %VMM(6), %VMATCH, %k0
+ KMOV %k0, %VRAX
+ addq $VEC_SIZE, %rdi
+ and %VRDX, %VRAX
+ jnz L(return_new_match_ret)
+ subq $VEC_SIZE, %rdi
+L(return_new_match_first):
KMOV %k2, %VRAX
- test %VRAX, %VRAX
- jz L(vector_x1_ret)
-
- /* Match found in the second saved vector. */
- BSR %VRAX, %VRAX
- leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
+# ifdef USE_AS_WCSRCHR
+ xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
+ and %VRCX, %VRAX
+# else
+ andn %VRCX, %VRAX, %VRAX
+# endif
+ jz L(return_old_match)
+L(return_new_match_ret):
+ bsr %VRAX, %VRAX
+ leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
ret
-L(page_cross):
- mov %rdi, %rax
- movl %edi, %ecx
+ .p2align 4,, 4
+L(cross_page_boundary):
+ xorq %rdi, %rax
+ mov $-1, %VRDX
+ VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
+ VPTESTN %VMM(6), %VMM(6), %k0
+ KMOV %k0, %VRSI
# ifdef USE_AS_WCSRCHR
- /* Calculate number of compare result bits to be skipped for
- wide string alignment adjustment. */
- andl $(VEC_SIZE - 1), %ecx
- sarl $2, %ecx
+ movl %edi, %ecx
+ and $(VEC_SIZE - 1), %ecx
+ shrl $2, %ecx
# endif
- /* ecx contains number of w[char] to be skipped as a result
- of address alignment. */
- andq $-VEC_SIZE, %rax
- VMOVA (%rax), %VMM(1)
- VPTESTN %VMM(1), %VMM(1), %k1
- KMOV %k1, %VRAX
- SHR %cl, %VRAX
- jz L(page_cross_continue)
- VPCMPEQ %VMM(1), %VMM(0), %k0
- KMOV %k0, %VRDX
- SHR %cl, %VRDX
- BLSMSK %VRAX, %VRAX
- and %VRDX, %VRAX
- jz L(ret)
- BSR %VRAX, %VRAX
+ shlx %SHIFT_REG, %VRDX, %VRDX
+
# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
+ kmovw %edx, %k1
# else
- add %rdi, %rax
+ KMOV %VRDX, %k1
# endif
- ret
-END (STRRCHR)
+ VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
+ /* We could technically just jmp back after the vpcompress but
+ it doesn't save any 16-byte blocks. */
+ shrx %SHIFT_REG, %VRSI, %VRSI
+ test %VRSI, %VRSI
+ jnz L(page_cross_return)
+ jmp L(page_cross_continue)
+ /* 1-byte from cache line. */
+END(STRRCHR)
#endif
diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S b/sysdeps/x86_64/multiarch/strrchr-evex.S
index 85e3b0119f..3bf6a51014 100644
--- a/sysdeps/x86_64/multiarch/strrchr-evex.S
+++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
@@ -1,394 +1,8 @@
-/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
- Copyright (C) 2021-2023 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <https://www.gnu.org/licenses/>. */
-
-#include <isa-level.h>
-
-#if ISA_SHOULD_BUILD (4)
-
-# include <sysdep.h>
-
# ifndef STRRCHR
# define STRRCHR __strrchr_evex
# endif
-# include "x86-evex256-vecs.h"
-
-# ifdef USE_AS_WCSRCHR
-# define SHIFT_REG rsi
-# define kunpck_2x kunpckbw
-# define kmov_2x kmovd
-# define maskz_2x ecx
-# define maskm_2x eax
-# define CHAR_SIZE 4
-# define VPMIN vpminud
-# define VPTESTN vptestnmd
-# define VPTEST vptestmd
-# define VPBROADCAST vpbroadcastd
-# define VPCMPEQ vpcmpeqd
-# define VPCMP vpcmpd
-
-# define USE_WIDE_CHAR
-# else
-# define SHIFT_REG rdi
-# define kunpck_2x kunpckdq
-# define kmov_2x kmovq
-# define maskz_2x rcx
-# define maskm_2x rax
-
-# define CHAR_SIZE 1
-# define VPMIN vpminub
-# define VPTESTN vptestnmb
-# define VPTEST vptestmb
-# define VPBROADCAST vpbroadcastb
-# define VPCMPEQ vpcmpeqb
-# define VPCMP vpcmpb
-# endif
-
-# include "reg-macros.h"
-
-# define VMATCH VMM(0)
-# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
-# define PAGE_SIZE 4096
-
- .section SECTION(.text), "ax", @progbits
-ENTRY_P2ALIGN(STRRCHR, 6)
- movl %edi, %eax
- /* Broadcast CHAR to VMATCH. */
- VPBROADCAST %esi, %VMATCH
-
- andl $(PAGE_SIZE - 1), %eax
- cmpl $(PAGE_SIZE - VEC_SIZE), %eax
- jg L(cross_page_boundary)
-L(page_cross_continue):
- VMOVU (%rdi), %VMM(1)
- /* k0 has a 1 for each zero CHAR in VEC(1). */
- VPTESTN %VMM(1), %VMM(1), %k0
- KMOV %k0, %VRSI
- test %VRSI, %VRSI
- jz L(aligned_more)
- /* fallthrough: zero CHAR in first VEC. */
- /* K1 has a 1 for each search CHAR match in VEC(1). */
- VPCMPEQ %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- /* Build mask up until first zero CHAR (used to mask of
- potential search CHAR matches past the end of the string).
- */
- blsmsk %VRSI, %VRSI
- and %VRSI, %VRAX
- jz L(ret0)
- /* Get last match (the `and` removed any out of bounds matches).
- */
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
-# else
- addq %rdi, %rax
-# endif
-L(ret0):
- ret
-
- /* Returns for first vec x1/x2/x3 have hard coded backward
- search path for earlier matches. */
- .p2align 4,, 6
-L(first_vec_x1):
- VPCMPEQ %VMATCH, %VMM(2), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* eax non-zero if search CHAR in range. */
- and %VRCX, %VRAX
- jnz L(first_vec_x1_return)
-
- /* fallthrough: no match in VEC(2) then need to check for
- earlier matches (in VEC(1)). */
- .p2align 4,, 4
-L(first_vec_x0_test):
- VPCMPEQ %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- test %VRAX, %VRAX
- jz L(ret1)
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rsi, %rax, CHAR_SIZE), %rax
-# else
- addq %rsi, %rax
-# endif
-L(ret1):
- ret
-
- .p2align 4,, 10
-L(first_vec_x1_or_x2):
- VPCMPEQ %VMM(3), %VMATCH, %k3
- VPCMPEQ %VMM(2), %VMATCH, %k2
- /* K2 and K3 have 1 for any search CHAR match. Test if any
- matches between either of them. Otherwise check VEC(1). */
- KORTEST %k2, %k3
- jz L(first_vec_x0_test)
-
- /* Guaranteed that VEC(2) and VEC(3) are within range so merge
- the two bitmasks then get last result. */
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
- ret
-
- .p2align 4,, 7
-L(first_vec_x3):
- VPCMPEQ %VMATCH, %VMM(4), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
- */
- and %VRCX, %VRAX
- jz L(first_vec_x1_or_x2)
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 6
-L(first_vec_x0_x1_test):
- VPCMPEQ %VMATCH, %VMM(2), %k1
- KMOV %k1, %VRAX
- /* Check VEC(2) for last match first. If no match try VEC(1).
- */
- test %VRAX, %VRAX
- jz L(first_vec_x0_test)
- .p2align 4,, 4
-L(first_vec_x1_return):
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 10
-L(first_vec_x2):
- VPCMPEQ %VMATCH, %VMM(3), %k1
- KMOV %k1, %VRAX
- blsmsk %VRCX, %VRCX
- /* Check VEC(3) for last match first. If no match try
- VEC(2)/VEC(1). */
- and %VRCX, %VRAX
- jz L(first_vec_x0_x1_test)
- bsr %VRAX, %VRAX
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 12
-L(aligned_more):
- /* Need to keep original pointer in case VEC(1) has last match.
- */
- movq %rdi, %rsi
- andq $-VEC_SIZE, %rdi
-
- VMOVU VEC_SIZE(%rdi), %VMM(2)
- VPTESTN %VMM(2), %VMM(2), %k0
- KMOV %k0, %VRCX
-
- test %VRCX, %VRCX
- jnz L(first_vec_x1)
-
- VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
- VPTESTN %VMM(3), %VMM(3), %k0
- KMOV %k0, %VRCX
-
- test %VRCX, %VRCX
- jnz L(first_vec_x2)
-
- VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
- VPTESTN %VMM(4), %VMM(4), %k0
- KMOV %k0, %VRCX
- movq %rdi, %r8
- test %VRCX, %VRCX
- jnz L(first_vec_x3)
-
- andq $-(VEC_SIZE * 2), %rdi
- .p2align 4,, 10
-L(first_aligned_loop):
- /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
- guarantee they don't store a match. */
- VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
- VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
-
- VPCMPEQ %VMM(5), %VMATCH, %k2
- vpxord %VMM(6), %VMATCH, %VMM(7)
-
- VPMIN %VMM(5), %VMM(6), %VMM(8)
- VPMIN %VMM(8), %VMM(7), %VMM(7)
-
- VPTESTN %VMM(7), %VMM(7), %k1
- subq $(VEC_SIZE * -2), %rdi
- KORTEST %k1, %k2
- jz L(first_aligned_loop)
-
- VPCMPEQ %VMM(6), %VMATCH, %k3
- VPTESTN %VMM(8), %VMM(8), %k1
-
- /* If k1 is zero, then we found a CHAR match but no null-term.
- We can now safely throw out VEC1-4. */
- KTEST %k1, %k1
- jz L(second_aligned_loop_prep)
-
- KORTEST %k2, %k3
- jnz L(return_first_aligned_loop)
-
-
- .p2align 4,, 6
-L(first_vec_x1_or_x2_or_x3):
- VPCMPEQ %VMM(4), %VMATCH, %k4
- KMOV %k4, %VRAX
- bsr %VRAX, %VRAX
- jz L(first_vec_x1_or_x2)
- leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
- ret
-
-
- .p2align 4,, 8
-L(return_first_aligned_loop):
- VPTESTN %VMM(5), %VMM(5), %k0
-
- /* Combined results from VEC5/6. */
- kunpck_2x %k0, %k1, %k0
- kmov_2x %k0, %maskz_2x
-
- blsmsk %maskz_2x, %maskz_2x
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
- and %maskz_2x, %maskm_2x
- jz L(first_vec_x1_or_x2_or_x3)
-
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
- .p2align 4
- /* We can throw away the work done for the first 4x checks here
- as we have a later match. This is the 'fast' path persay.
- */
-L(second_aligned_loop_prep):
-L(second_aligned_loop_set_furthest_match):
- movq %rdi, %rsi
- /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
- port0 and have noticeable overhead in the loop. */
- VMOVA %VMM(5), %VMM(7)
- VMOVA %VMM(6), %VMM(8)
- .p2align 4
-L(second_aligned_loop):
- VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
- VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
- VPCMPEQ %VMM(5), %VMATCH, %k2
- vpxord %VMM(6), %VMATCH, %VMM(3)
-
- VPMIN %VMM(5), %VMM(6), %VMM(4)
- VPMIN %VMM(3), %VMM(4), %VMM(3)
-
- VPTESTN %VMM(3), %VMM(3), %k1
- subq $(VEC_SIZE * -2), %rdi
- KORTEST %k1, %k2
- jz L(second_aligned_loop)
- VPCMPEQ %VMM(6), %VMATCH, %k3
- VPTESTN %VMM(4), %VMM(4), %k1
- KTEST %k1, %k1
- jz L(second_aligned_loop_set_furthest_match)
-
- /* branch here because we know we have a match in VEC7/8 but
- might not in VEC5/6 so the latter is expected to be less
- likely. */
- KORTEST %k2, %k3
- jnz L(return_new_match)
-
-L(return_old_match):
- VPCMPEQ %VMM(8), %VMATCH, %k0
- KMOV %k0, %VRCX
- bsr %VRCX, %VRCX
- jnz L(return_old_match_ret)
-
- VPCMPEQ %VMM(7), %VMATCH, %k0
- KMOV %k0, %VRCX
- bsr %VRCX, %VRCX
- subq $VEC_SIZE, %rsi
-L(return_old_match_ret):
- leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
- ret
-
- .p2align 4,, 10
-L(return_new_match):
- VPTESTN %VMM(5), %VMM(5), %k0
-
- /* Combined results from VEC5/6. */
- kunpck_2x %k0, %k1, %k0
- kmov_2x %k0, %maskz_2x
-
- blsmsk %maskz_2x, %maskz_2x
- kunpck_2x %k2, %k3, %k3
- kmov_2x %k3, %maskm_2x
-
- /* Match at end was out-of-bounds so use last known match. */
- and %maskz_2x, %maskm_2x
- jz L(return_old_match)
-
- bsr %maskm_2x, %maskm_2x
- leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
- ret
-
-L(cross_page_boundary):
- /* eax contains all the page offset bits of src (rdi). `xor rdi,
- rax` sets pointer will all page offset bits cleared so
- offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
- before page cross (guaranteed to be safe to read). Doing this
- as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
- a bit of code size. */
- xorq %rdi, %rax
- VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
- VPTESTN %VMM(1), %VMM(1), %k0
- KMOV %k0, %VRCX
-
- /* Shift out zero CHAR matches that are before the beginning of
- src (rdi). */
-# ifdef USE_AS_WCSRCHR
- movl %edi, %esi
- andl $(VEC_SIZE - 1), %esi
- shrl $2, %esi
-# endif
- shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
-
- test %VRCX, %VRCX
- jz L(page_cross_continue)
+#include "x86-evex256-vecs.h"
+#include "reg-macros.h"
- /* Found zero CHAR so need to test for search CHAR. */
- VPCMP $0, %VMATCH, %VMM(1), %k1
- KMOV %k1, %VRAX
- /* Shift out search CHAR matches that are before the beginning of
- src (rdi). */
- shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
-
- /* Check if any search CHAR match in range. */
- blsmsk %VRCX, %VRCX
- and %VRCX, %VRAX
- jz L(ret3)
- bsr %VRAX, %VRAX
-# ifdef USE_AS_WCSRCHR
- leaq (%rdi, %rax, CHAR_SIZE), %rax
-# else
- addq %rdi, %rax
-# endif
-L(ret3):
- ret
-END(STRRCHR)
-#endif
+#include "strrchr-evex-base.S"
diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
index e5c5fe3bf2..a584cd3f43 100644
--- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
+++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
@@ -4,4 +4,5 @@
#define STRRCHR WCSRCHR
#define USE_AS_WCSRCHR 1
+#define USE_WIDE_CHAR 1
#include "strrchr-evex.S"
--
2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-10-04 18:48 ` Noah Goldstein
@ 2023-10-04 19:00 ` Sunil Pandey
2023-10-18 9:18 ` Florian Weimer
1 sibling, 0 replies; 12+ messages in thread
From: Sunil Pandey @ 2023-10-04 19:00 UTC (permalink / raw)
To: Noah Goldstein; +Cc: libc-alpha, hjl.tools, carlos
[-- Attachment #1: Type: text/plain, Size: 34601 bytes --]
On Wed, Oct 4, 2023 at 11:49 AM Noah Goldstein <goldstein.w.n@gmail.com>
wrote:
> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> common implementation: `strrchr-evex-base.S`.
>
> The motivation is `strrchr-evex` needed to be refactored to not use
> 64-bit masked registers in preperation for AVX10.
>
> Once vec-width masked register combining was removed, the EVEX and
> EVEX512 implementations can easily be implemented in the same file
> without any major overhead.
>
> The net result is performance improvements (measured on TGL) for both
> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> regressions in the test suite and it may be many of the cases that
> make the total-geomean of improvement/regression across bench-strrchr
> are cold. The point of the performance measurement is to show there
> are no major regressions, but the primary motivation is preperation
> for AVX10.
>
> Benchmarks where taken on TGL:
>
> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
>
> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
>
> Full check passes on x86.
> ---
> sysdeps/x86_64/multiarch/strrchr-evex-base.S | 469 ++++++++++++-------
> sysdeps/x86_64/multiarch/strrchr-evex.S | 392 +---------------
> sysdeps/x86_64/multiarch/wcsrchr-evex.S | 1 +
> 3 files changed, 293 insertions(+), 569 deletions(-)
>
> diff --git a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> index 58b2853ab6..cd6a0a870a 100644
> --- a/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> +++ b/sysdeps/x86_64/multiarch/strrchr-evex-base.S
> @@ -1,4 +1,4 @@
> -/* Placeholder function, not used by any processor at the moment.
> +/* Implementation for strrchr using evex256 and evex512.
> Copyright (C) 2022-2023 Free Software Foundation, Inc.
> This file is part of the GNU C Library.
>
> @@ -16,8 +16,6 @@
> License along with the GNU C Library; if not, see
> <https://www.gnu.org/licenses/>. */
>
> -/* UNUSED. Exists purely as reference implementation. */
> -
> #include <isa-level.h>
>
> #if ISA_SHOULD_BUILD (4)
> @@ -25,240 +23,351 @@
> # include <sysdep.h>
>
> # ifdef USE_AS_WCSRCHR
> +# if VEC_SIZE == 64
> +# define RCX_M cx
> +# define KORTEST_M kortestw
> +# else
> +# define RCX_M cl
> +# define KORTEST_M kortestb
> +# endif
> +
> +# define SHIFT_REG VRCX
> # define CHAR_SIZE 4
> -# define VPBROADCAST vpbroadcastd
> -# define VPCMPEQ vpcmpeqd
> -# define VPMINU vpminud
> +# define VPCMP vpcmpd
> +# define VPMIN vpminud
> +# define VPCOMPRESS vpcompressd
> # define VPTESTN vptestnmd
> +# define VPTEST vptestmd
> +# define VPBROADCAST vpbroadcastd
> +# define VPCMPEQ vpcmpeqd
> +
> # else
> +# define SHIFT_REG VRDI
> # define CHAR_SIZE 1
> -# define VPBROADCAST vpbroadcastb
> -# define VPCMPEQ vpcmpeqb
> -# define VPMINU vpminub
> +# define VPCMP vpcmpb
> +# define VPMIN vpminub
> +# define VPCOMPRESS vpcompressb
> # define VPTESTN vptestnmb
> +# define VPTEST vptestmb
> +# define VPBROADCAST vpbroadcastb
> +# define VPCMPEQ vpcmpeqb
> +
> +# define RCX_M VRCX
> +# define KORTEST_M KORTEST
> # endif
>
> -# define PAGE_SIZE 4096
> +# define VMATCH VMM(0)
> # define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> +# define PAGE_SIZE 4096
>
> .section SECTION(.text), "ax", @progbits
> -/* Aligning entry point to 64 byte, provides better performance for
> - one vector length string. */
> -ENTRY_P2ALIGN (STRRCHR, 6)
> -
> - /* Broadcast CHAR to VMM(0). */
> - VPBROADCAST %esi, %VMM(0)
> + /* Aligning entry point to 64 byte, provides better performance for
> + one vector length string. */
> +ENTRY_P2ALIGN(STRRCHR, 6)
> movl %edi, %eax
> - sall $20, %eax
> - cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
> - ja L(page_cross)
> + /* Broadcast CHAR to VMATCH. */
> + VPBROADCAST %esi, %VMATCH
>
> -L(page_cross_continue):
> - /* Compare [w]char for null, mask bit will be set for match. */
> - VMOVU (%rdi), %VMM(1)
> + andl $(PAGE_SIZE - 1), %eax
> + cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> + jg L(cross_page_boundary)
>
> - VPTESTN %VMM(1), %VMM(1), %k1
> - KMOV %k1, %VRCX
> - test %VRCX, %VRCX
> - jz L(align_more)
> -
> - VPCMPEQ %VMM(1), %VMM(0), %k0
> - KMOV %k0, %VRAX
> - BLSMSK %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(ret)
> -
> - BSR %VRAX, %VRAX
> + VMOVU (%rdi), %VMM(1)
> + /* k0 has a 1 for each zero CHAR in YMM1. */
> + VPTESTN %VMM(1), %VMM(1), %k0
> + KMOV %k0, %VGPR(rsi)
> + test %VGPR(rsi), %VGPR(rsi)
> + jz L(aligned_more)
> + /* fallthrough: zero CHAR in first VEC. */
> +L(page_cross_return):
> + /* K1 has a 1 for each search CHAR match in VEC(1). */
> + VPCMPEQ %VMATCH, %VMM(1), %k1
> + KMOV %k1, %VGPR(rax)
> + /* Build mask up until first zero CHAR (used to mask of
> + potential search CHAR matches past the end of the string). */
> + blsmsk %VGPR(rsi), %VGPR(rsi)
> + /* Use `and` here to remove any out of bounds matches so we can
> + do a reverse scan on `rax` to find the last match. */
> + and %VGPR(rsi), %VGPR(rax)
> + jz L(ret0)
> + /* Get last match. */
> + bsr %VGPR(rax), %VGPR(rax)
> # ifdef USE_AS_WCSRCHR
> leaq (%rdi, %rax, CHAR_SIZE), %rax
> # else
> - add %rdi, %rax
> + addq %rdi, %rax
> # endif
> -L(ret):
> +L(ret0):
> ret
>
> -L(vector_x2_end):
> - VPCMPEQ %VMM(2), %VMM(0), %k2
> - KMOV %k2, %VRAX
> - BLSMSK %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(vector_x1_ret)
> -
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> - /* Check the first vector at very last to look for match. */
> -L(vector_x1_ret):
> - VPCMPEQ %VMM(1), %VMM(0), %k2
> - KMOV %k2, %VRAX
> - test %VRAX, %VRAX
> - jz L(ret)
> -
> - BSR %VRAX, %VRAX
> + /* Returns for first vec x1/x2/x3 have hard coded backward
> + search path for earlier matches. */
> + .p2align 4,, 6
> +L(first_vec_x1):
> + VPCMPEQ %VMATCH, %VMM(2), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* eax non-zero if search CHAR in range. */
> + and %VGPR(rcx), %VGPR(rax)
> + jnz L(first_vec_x1_return)
> +
> + /* fallthrough: no match in YMM2 then need to check for earlier
> + matches (in YMM1). */
> + .p2align 4,, 4
> +L(first_vec_x0_test):
> + VPCMPEQ %VMATCH, %VMM(1), %k1
> + KMOV %k1, %VGPR(rax)
> + test %VGPR(rax), %VGPR(rax)
> + jz L(ret1)
> + bsr %VGPR(rax), %VGPR(rax)
> # ifdef USE_AS_WCSRCHR
> leaq (%rsi, %rax, CHAR_SIZE), %rax
> # else
> - add %rsi, %rax
> + addq %rsi, %rax
> # endif
> +L(ret1):
> ret
>
> -L(align_more):
> - /* Zero r8 to store match result. */
> - xorl %r8d, %r8d
> - /* Save pointer of first vector, in case if no match found. */
> + .p2align 4,, 10
> +L(first_vec_x3):
> + VPCMPEQ %VMATCH, %VMM(4), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* If no search CHAR match in range check YMM1/YMM2/YMM3. */
> + and %VGPR(rcx), %VGPR(rax)
> + jz L(first_vec_x1_or_x2)
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> + ret
> + .p2align 4,, 4
> +
> +L(first_vec_x2):
> + VPCMPEQ %VMATCH, %VMM(3), %k1
> + KMOV %k1, %VGPR(rax)
> + blsmsk %VGPR(rcx), %VGPR(rcx)
> + /* Check YMM3 for last match first. If no match try YMM2/YMM1. */
> + and %VGPR(rcx), %VGPR(rax)
> + jz L(first_vec_x0_x1_test)
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> + ret
> +
> + .p2align 4,, 6
> +L(first_vec_x0_x1_test):
> + VPCMPEQ %VMATCH, %VMM(2), %k1
> + KMOV %k1, %VGPR(rax)
> + /* Check YMM2 for last match first. If no match try YMM1. */
> + test %VGPR(rax), %VGPR(rax)
> + jz L(first_vec_x0_test)
> + .p2align 4,, 4
> +L(first_vec_x1_return):
> + bsr %VGPR(rax), %VGPR(rax)
> + leaq (VEC_SIZE)(%r8, %rax, CHAR_SIZE), %rax
> + ret
> +
> + .p2align 4,, 12
> +L(aligned_more):
> +L(page_cross_continue):
> + /* Need to keep original pointer incase VEC(1) has last match. */
> movq %rdi, %rsi
> - /* Align pointer to vector size. */
> andq $-VEC_SIZE, %rdi
> - /* Loop unroll for 2 vector loop. */
> - VMOVA (VEC_SIZE)(%rdi), %VMM(2)
> +
> + VMOVU VEC_SIZE(%rdi), %VMM(2)
> VPTESTN %VMM(2), %VMM(2), %k0
> KMOV %k0, %VRCX
> + movq %rdi, %r8
> test %VRCX, %VRCX
> - jnz L(vector_x2_end)
> + jnz L(first_vec_x1)
> +
> + VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> + VPTESTN %VMM(3), %VMM(3), %k0
> + KMOV %k0, %VRCX
> +
> + test %VRCX, %VRCX
> + jnz L(first_vec_x2)
> +
> + VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> + VPTESTN %VMM(4), %VMM(4), %k0
> + KMOV %k0, %VRCX
> +
> + /* Intentionally use 64-bit here. EVEX256 version needs 1-byte
> + padding for efficient nop before loop alignment. */
> + test %rcx, %rcx
> + jnz L(first_vec_x3)
>
> - /* Save pointer of second vector, in case if no match
> - found. */
> - movq %rdi, %r9
> - /* Align address to VEC_SIZE * 2 for loop. */
> andq $-(VEC_SIZE * 2), %rdi
> + .p2align 4
> +L(first_aligned_loop):
> + /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> + gurantee they don't store a match. */
> + VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> + VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
>
> - .p2align 4,,11
> -L(loop):
> - /* 2 vector loop, as it provide better performance as compared
> - to 4 vector loop. */
> - VMOVA (VEC_SIZE * 2)(%rdi), %VMM(3)
> - VMOVA (VEC_SIZE * 3)(%rdi), %VMM(4)
> - VPCMPEQ %VMM(3), %VMM(0), %k1
> - VPCMPEQ %VMM(4), %VMM(0), %k2
> - VPMINU %VMM(3), %VMM(4), %VMM(5)
> - VPTESTN %VMM(5), %VMM(5), %k0
> - KOR %k1, %k2, %k3
> - subq $-(VEC_SIZE * 2), %rdi
> - /* If k0 and k3 zero, match and end of string not found. */
> - KORTEST %k0, %k3
> - jz L(loop)
> -
> - /* If k0 is non zero, end of string found. */
> - KORTEST %k0, %k0
> - jnz L(endloop)
> -
> - lea VEC_SIZE(%rdi), %r8
> - /* A match found, it need to be stored in r8 before loop
> - continue. */
> - /* Check second vector first. */
> - KMOV %k2, %VRDX
> - test %VRDX, %VRDX
> - jnz L(loop_vec_x2_match)
> + VPCMP $4, %VMM(5), %VMATCH, %k2
> + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
>
> + VPMIN %VMM(5), %VMM(6), %VMM(7)
> +
> + VPTEST %VMM(7), %VMM(7), %k1{%k3}
> + subq $(VEC_SIZE * -2), %rdi
> + KORTEST_M %k1, %k1
> + jc L(first_aligned_loop)
> +
> + VPTESTN %VMM(7), %VMM(7), %k1
> KMOV %k1, %VRDX
> - /* Match is in first vector, rdi offset need to be subtracted
> - by VEC_SIZE. */
> - sub $VEC_SIZE, %r8
> -
> - /* If second vector doesn't have match, first vector must
> - have match. */
> -L(loop_vec_x2_match):
> - BSR %VRDX, %VRDX
> -# ifdef USE_AS_WCSRCHR
> - sal $2, %rdx
> -# endif
> - add %rdx, %r8
> - jmp L(loop)
> + test %VRDX, %VRDX
> + jz L(second_aligned_loop_prep)
>
> -L(endloop):
> - /* Check if string end in first loop vector. */
> - VPTESTN %VMM(3), %VMM(3), %k0
> - KMOV %k0, %VRCX
> - test %VRCX, %VRCX
> - jnz L(loop_vector_x1_end)
> + KORTEST_M %k3, %k3
> + jnc L(return_first_aligned_loop)
>
> - /* Check if it has match in first loop vector. */
> - KMOV %k1, %VRAX
> + .p2align 4,, 6
> +L(first_vec_x1_or_x2_or_x3):
> + VPCMPEQ %VMM(4), %VMATCH, %k4
> + KMOV %k4, %VRAX
> test %VRAX, %VRAX
> - jz L(loop_vector_x2_end)
> -
> - BSR %VRAX, %VRAX
> - leaq (%rdi, %rax, CHAR_SIZE), %r8
> + jz L(first_vec_x1_or_x2)
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> + ret
>
> - /* String must end in second loop vector. */
> -L(loop_vector_x2_end):
> - VPTESTN %VMM(4), %VMM(4), %k0
> + .p2align 4,, 8
> +L(return_first_aligned_loop):
> + VPTESTN %VMM(5), %VMM(5), %k0
> KMOV %k0, %VRCX
> + blsmsk %VRCX, %VRCX
> + jnc L(return_first_new_match_first)
> + blsmsk %VRDX, %VRDX
> + VPCMPEQ %VMM(6), %VMATCH, %k0
> + KMOV %k0, %VRAX
> + addq $VEC_SIZE, %rdi
> + and %VRDX, %VRAX
> + jnz L(return_first_new_match_ret)
> + subq $VEC_SIZE, %rdi
> +L(return_first_new_match_first):
> KMOV %k2, %VRAX
> - BLSMSK %VRCX, %VRCX
> - /* Check if it has match in second loop vector. */
> +# ifdef USE_AS_WCSRCHR
> + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> and %VRCX, %VRAX
> - jz L(check_last_match)
> +# else
> + andn %VRCX, %VRAX, %VRAX
> +# endif
> + jz L(first_vec_x1_or_x2_or_x3)
> +L(return_first_new_match_ret):
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> + ret
>
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> + .p2align 4,, 10
> +L(first_vec_x1_or_x2):
> + VPCMPEQ %VMM(3), %VMATCH, %k3
> + KMOV %k3, %VRAX
> + test %VRAX, %VRAX
> + jz L(first_vec_x0_x1_test)
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%r8, %rax, CHAR_SIZE), %rax
> ret
>
> - /* String end in first loop vector. */
> -L(loop_vector_x1_end):
> - KMOV %k1, %VRAX
> - BLSMSK %VRCX, %VRCX
> - /* Check if it has match in second loop vector. */
> - and %VRCX, %VRAX
> - jz L(check_last_match)
> + .p2align 4
> + /* We can throw away the work done for the first 4x checks here
> + as we have a later match. This is the 'fast' path persay. */
> +L(second_aligned_loop_prep):
> +L(second_aligned_loop_set_furthest_match):
> + movq %rdi, %rsi
> + VMOVA %VMM(5), %VMM(7)
> + VMOVA %VMM(6), %VMM(8)
> + .p2align 4
> +L(second_aligned_loop):
> + VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> + VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> + VPCMP $4, %VMM(5), %VMATCH, %k2
> + VPCMP $4, %VMM(6), %VMATCH, %k3{%k2}
> +
> + VPMIN %VMM(5), %VMM(6), %VMM(4)
> +
> + VPTEST %VMM(4), %VMM(4), %k1{%k3}
> + subq $(VEC_SIZE * -2), %rdi
> + KMOV %k1, %VRCX
> + inc %RCX_M
> + jz L(second_aligned_loop)
> + VPTESTN %VMM(4), %VMM(4), %k1
> + KMOV %k1, %VRDX
> + test %VRDX, %VRDX
> + jz L(second_aligned_loop_set_furthest_match)
>
> - BSR %VRAX, %VRAX
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> - ret
> + KORTEST_M %k3, %k3
> + jnc L(return_new_match)
> + /* branch here because there is a significant advantage interms
> + of output dependency chance in using edx. */
>
> - /* No match in first and second loop vector. */
> -L(check_last_match):
> - /* Check if any match recorded in r8. */
> - test %r8, %r8
> - jz L(vector_x2_ret)
> - movq %r8, %rax
> +L(return_old_match):
> + VPCMPEQ %VMM(8), %VMATCH, %k0
> + KMOV %k0, %VRCX
> + bsr %VRCX, %VRCX
> + jnz L(return_old_match_ret)
> +
> + VPCMPEQ %VMM(7), %VMATCH, %k0
> + KMOV %k0, %VRCX
> + bsr %VRCX, %VRCX
> + subq $VEC_SIZE, %rsi
> +L(return_old_match_ret):
> + leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> ret
>
> - /* No match recorded in r8. Check the second saved vector
> - in beginning. */
> -L(vector_x2_ret):
> - VPCMPEQ %VMM(2), %VMM(0), %k2
> +L(return_new_match):
> + VPTESTN %VMM(5), %VMM(5), %k0
> + KMOV %k0, %VRCX
> + blsmsk %VRCX, %VRCX
> + jnc L(return_new_match_first)
> + dec %VRDX
> + VPCMPEQ %VMM(6), %VMATCH, %k0
> + KMOV %k0, %VRAX
> + addq $VEC_SIZE, %rdi
> + and %VRDX, %VRAX
> + jnz L(return_new_match_ret)
> + subq $VEC_SIZE, %rdi
> +L(return_new_match_first):
> KMOV %k2, %VRAX
> - test %VRAX, %VRAX
> - jz L(vector_x1_ret)
> -
> - /* Match found in the second saved vector. */
> - BSR %VRAX, %VRAX
> - leaq (VEC_SIZE)(%r9, %rax, CHAR_SIZE), %rax
> +# ifdef USE_AS_WCSRCHR
> + xorl $((1 << CHAR_PER_VEC)- 1), %VRAX
> + and %VRCX, %VRAX
> +# else
> + andn %VRCX, %VRAX, %VRAX
> +# endif
> + jz L(return_old_match)
> +L(return_new_match_ret):
> + bsr %VRAX, %VRAX
> + leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> ret
>
> -L(page_cross):
> - mov %rdi, %rax
> - movl %edi, %ecx
> + .p2align 4,, 4
> +L(cross_page_boundary):
> + xorq %rdi, %rax
> + mov $-1, %VRDX
> + VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(6)
> + VPTESTN %VMM(6), %VMM(6), %k0
> + KMOV %k0, %VRSI
>
> # ifdef USE_AS_WCSRCHR
> - /* Calculate number of compare result bits to be skipped for
> - wide string alignment adjustment. */
> - andl $(VEC_SIZE - 1), %ecx
> - sarl $2, %ecx
> + movl %edi, %ecx
> + and $(VEC_SIZE - 1), %ecx
> + shrl $2, %ecx
> # endif
> - /* ecx contains number of w[char] to be skipped as a result
> - of address alignment. */
> - andq $-VEC_SIZE, %rax
> - VMOVA (%rax), %VMM(1)
> - VPTESTN %VMM(1), %VMM(1), %k1
> - KMOV %k1, %VRAX
> - SHR %cl, %VRAX
> - jz L(page_cross_continue)
> - VPCMPEQ %VMM(1), %VMM(0), %k0
> - KMOV %k0, %VRDX
> - SHR %cl, %VRDX
> - BLSMSK %VRAX, %VRAX
> - and %VRDX, %VRAX
> - jz L(ret)
> - BSR %VRAX, %VRAX
> + shlx %SHIFT_REG, %VRDX, %VRDX
> +
> # ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> + kmovw %edx, %k1
> # else
> - add %rdi, %rax
> + KMOV %VRDX, %k1
> # endif
>
> - ret
> -END (STRRCHR)
> + VPCOMPRESS %VMM(6), %VMM(1){%k1}{z}
> + /* We could technically just jmp back after the vpcompress but
> + it doesn't save any 16-byte blocks. */
> + shrx %SHIFT_REG, %VRSI, %VRSI
> + test %VRSI, %VRSI
> + jnz L(page_cross_return)
> + jmp L(page_cross_continue)
> + /* 1-byte from cache line. */
> +END(STRRCHR)
> #endif
> diff --git a/sysdeps/x86_64/multiarch/strrchr-evex.S
> b/sysdeps/x86_64/multiarch/strrchr-evex.S
> index 85e3b0119f..3bf6a51014 100644
> --- a/sysdeps/x86_64/multiarch/strrchr-evex.S
> +++ b/sysdeps/x86_64/multiarch/strrchr-evex.S
> @@ -1,394 +1,8 @@
> -/* strrchr/wcsrchr optimized with 256-bit EVEX instructions.
> - Copyright (C) 2021-2023 Free Software Foundation, Inc.
> - This file is part of the GNU C Library.
> -
> - The GNU C Library is free software; you can redistribute it and/or
> - modify it under the terms of the GNU Lesser General Public
> - License as published by the Free Software Foundation; either
> - version 2.1 of the License, or (at your option) any later version.
> -
> - The GNU C Library is distributed in the hope that it will be useful,
> - but WITHOUT ANY WARRANTY; without even the implied warranty of
> - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> - Lesser General Public License for more details.
> -
> - You should have received a copy of the GNU Lesser General Public
> - License along with the GNU C Library; if not, see
> - <https://www.gnu.org/licenses/>. */
> -
> -#include <isa-level.h>
> -
> -#if ISA_SHOULD_BUILD (4)
> -
> -# include <sysdep.h>
> -
> # ifndef STRRCHR
> # define STRRCHR __strrchr_evex
> # endif
>
> -# include "x86-evex256-vecs.h"
> -
> -# ifdef USE_AS_WCSRCHR
> -# define SHIFT_REG rsi
> -# define kunpck_2x kunpckbw
> -# define kmov_2x kmovd
> -# define maskz_2x ecx
> -# define maskm_2x eax
> -# define CHAR_SIZE 4
> -# define VPMIN vpminud
> -# define VPTESTN vptestnmd
> -# define VPTEST vptestmd
> -# define VPBROADCAST vpbroadcastd
> -# define VPCMPEQ vpcmpeqd
> -# define VPCMP vpcmpd
> -
> -# define USE_WIDE_CHAR
> -# else
> -# define SHIFT_REG rdi
> -# define kunpck_2x kunpckdq
> -# define kmov_2x kmovq
> -# define maskz_2x rcx
> -# define maskm_2x rax
> -
> -# define CHAR_SIZE 1
> -# define VPMIN vpminub
> -# define VPTESTN vptestnmb
> -# define VPTEST vptestmb
> -# define VPBROADCAST vpbroadcastb
> -# define VPCMPEQ vpcmpeqb
> -# define VPCMP vpcmpb
> -# endif
> -
> -# include "reg-macros.h"
> -
> -# define VMATCH VMM(0)
> -# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
> -# define PAGE_SIZE 4096
> -
> - .section SECTION(.text), "ax", @progbits
> -ENTRY_P2ALIGN(STRRCHR, 6)
> - movl %edi, %eax
> - /* Broadcast CHAR to VMATCH. */
> - VPBROADCAST %esi, %VMATCH
> -
> - andl $(PAGE_SIZE - 1), %eax
> - cmpl $(PAGE_SIZE - VEC_SIZE), %eax
> - jg L(cross_page_boundary)
> -L(page_cross_continue):
> - VMOVU (%rdi), %VMM(1)
> - /* k0 has a 1 for each zero CHAR in VEC(1). */
> - VPTESTN %VMM(1), %VMM(1), %k0
> - KMOV %k0, %VRSI
> - test %VRSI, %VRSI
> - jz L(aligned_more)
> - /* fallthrough: zero CHAR in first VEC. */
> - /* K1 has a 1 for each search CHAR match in VEC(1). */
> - VPCMPEQ %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - /* Build mask up until first zero CHAR (used to mask of
> - potential search CHAR matches past the end of the string).
> - */
> - blsmsk %VRSI, %VRSI
> - and %VRSI, %VRAX
> - jz L(ret0)
> - /* Get last match (the `and` removed any out of bounds matches).
> - */
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rdi, %rax
> -# endif
> -L(ret0):
> - ret
> -
> - /* Returns for first vec x1/x2/x3 have hard coded backward
> - search path for earlier matches. */
> - .p2align 4,, 6
> -L(first_vec_x1):
> - VPCMPEQ %VMATCH, %VMM(2), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* eax non-zero if search CHAR in range. */
> - and %VRCX, %VRAX
> - jnz L(first_vec_x1_return)
> -
> - /* fallthrough: no match in VEC(2) then need to check for
> - earlier matches (in VEC(1)). */
> - .p2align 4,, 4
> -L(first_vec_x0_test):
> - VPCMPEQ %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - test %VRAX, %VRAX
> - jz L(ret1)
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rsi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rsi, %rax
> -# endif
> -L(ret1):
> - ret
> -
> - .p2align 4,, 10
> -L(first_vec_x1_or_x2):
> - VPCMPEQ %VMM(3), %VMATCH, %k3
> - VPCMPEQ %VMM(2), %VMATCH, %k2
> - /* K2 and K3 have 1 for any search CHAR match. Test if any
> - matches between either of them. Otherwise check VEC(1). */
> - KORTEST %k2, %k3
> - jz L(first_vec_x0_test)
> -
> - /* Guaranteed that VEC(2) and VEC(3) are within range so merge
> - the two bitmasks then get last result. */
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 1)(%r8, %rax, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4,, 7
> -L(first_vec_x3):
> - VPCMPEQ %VMATCH, %VMM(4), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* If no search CHAR match in range check VEC(1)/VEC(2)/VEC(3).
> - */
> - and %VRCX, %VRAX
> - jz L(first_vec_x1_or_x2)
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE * 3)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 6
> -L(first_vec_x0_x1_test):
> - VPCMPEQ %VMATCH, %VMM(2), %k1
> - KMOV %k1, %VRAX
> - /* Check VEC(2) for last match first. If no match try VEC(1).
> - */
> - test %VRAX, %VRAX
> - jz L(first_vec_x0_test)
> - .p2align 4,, 4
> -L(first_vec_x1_return):
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 10
> -L(first_vec_x2):
> - VPCMPEQ %VMATCH, %VMM(3), %k1
> - KMOV %k1, %VRAX
> - blsmsk %VRCX, %VRCX
> - /* Check VEC(3) for last match first. If no match try
> - VEC(2)/VEC(1). */
> - and %VRCX, %VRAX
> - jz L(first_vec_x0_x1_test)
> - bsr %VRAX, %VRAX
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 12
> -L(aligned_more):
> - /* Need to keep original pointer in case VEC(1) has last match.
> - */
> - movq %rdi, %rsi
> - andq $-VEC_SIZE, %rdi
> -
> - VMOVU VEC_SIZE(%rdi), %VMM(2)
> - VPTESTN %VMM(2), %VMM(2), %k0
> - KMOV %k0, %VRCX
> -
> - test %VRCX, %VRCX
> - jnz L(first_vec_x1)
> -
> - VMOVU (VEC_SIZE * 2)(%rdi), %VMM(3)
> - VPTESTN %VMM(3), %VMM(3), %k0
> - KMOV %k0, %VRCX
> -
> - test %VRCX, %VRCX
> - jnz L(first_vec_x2)
> -
> - VMOVU (VEC_SIZE * 3)(%rdi), %VMM(4)
> - VPTESTN %VMM(4), %VMM(4), %k0
> - KMOV %k0, %VRCX
> - movq %rdi, %r8
> - test %VRCX, %VRCX
> - jnz L(first_vec_x3)
> -
> - andq $-(VEC_SIZE * 2), %rdi
> - .p2align 4,, 10
> -L(first_aligned_loop):
> - /* Preserve VEC(1), VEC(2), VEC(3), and VEC(4) until we can
> - guarantee they don't store a match. */
> - VMOVA (VEC_SIZE * 4)(%rdi), %VMM(5)
> - VMOVA (VEC_SIZE * 5)(%rdi), %VMM(6)
> -
> - VPCMPEQ %VMM(5), %VMATCH, %k2
> - vpxord %VMM(6), %VMATCH, %VMM(7)
> -
> - VPMIN %VMM(5), %VMM(6), %VMM(8)
> - VPMIN %VMM(8), %VMM(7), %VMM(7)
> -
> - VPTESTN %VMM(7), %VMM(7), %k1
> - subq $(VEC_SIZE * -2), %rdi
> - KORTEST %k1, %k2
> - jz L(first_aligned_loop)
> -
> - VPCMPEQ %VMM(6), %VMATCH, %k3
> - VPTESTN %VMM(8), %VMM(8), %k1
> -
> - /* If k1 is zero, then we found a CHAR match but no null-term.
> - We can now safely throw out VEC1-4. */
> - KTEST %k1, %k1
> - jz L(second_aligned_loop_prep)
> -
> - KORTEST %k2, %k3
> - jnz L(return_first_aligned_loop)
> -
> -
> - .p2align 4,, 6
> -L(first_vec_x1_or_x2_or_x3):
> - VPCMPEQ %VMM(4), %VMATCH, %k4
> - KMOV %k4, %VRAX
> - bsr %VRAX, %VRAX
> - jz L(first_vec_x1_or_x2)
> - leaq (VEC_SIZE * 3)(%r8, %rax, CHAR_SIZE), %rax
> - ret
> -
> -
> - .p2align 4,, 8
> -L(return_first_aligned_loop):
> - VPTESTN %VMM(5), %VMM(5), %k0
> -
> - /* Combined results from VEC5/6. */
> - kunpck_2x %k0, %k1, %k0
> - kmov_2x %k0, %maskz_2x
> -
> - blsmsk %maskz_2x, %maskz_2x
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> - and %maskz_2x, %maskm_2x
> - jz L(first_vec_x1_or_x2_or_x3)
> -
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4
> - /* We can throw away the work done for the first 4x checks here
> - as we have a later match. This is the 'fast' path persay.
> - */
> -L(second_aligned_loop_prep):
> -L(second_aligned_loop_set_furthest_match):
> - movq %rdi, %rsi
> - /* Ideally we would safe k2/k3 but `kmov/kunpck` take uops on
> - port0 and have noticeable overhead in the loop. */
> - VMOVA %VMM(5), %VMM(7)
> - VMOVA %VMM(6), %VMM(8)
> - .p2align 4
> -L(second_aligned_loop):
> - VMOVU (VEC_SIZE * 4)(%rdi), %VMM(5)
> - VMOVU (VEC_SIZE * 5)(%rdi), %VMM(6)
> - VPCMPEQ %VMM(5), %VMATCH, %k2
> - vpxord %VMM(6), %VMATCH, %VMM(3)
> -
> - VPMIN %VMM(5), %VMM(6), %VMM(4)
> - VPMIN %VMM(3), %VMM(4), %VMM(3)
> -
> - VPTESTN %VMM(3), %VMM(3), %k1
> - subq $(VEC_SIZE * -2), %rdi
> - KORTEST %k1, %k2
> - jz L(second_aligned_loop)
> - VPCMPEQ %VMM(6), %VMATCH, %k3
> - VPTESTN %VMM(4), %VMM(4), %k1
> - KTEST %k1, %k1
> - jz L(second_aligned_loop_set_furthest_match)
> -
> - /* branch here because we know we have a match in VEC7/8 but
> - might not in VEC5/6 so the latter is expected to be less
> - likely. */
> - KORTEST %k2, %k3
> - jnz L(return_new_match)
> -
> -L(return_old_match):
> - VPCMPEQ %VMM(8), %VMATCH, %k0
> - KMOV %k0, %VRCX
> - bsr %VRCX, %VRCX
> - jnz L(return_old_match_ret)
> -
> - VPCMPEQ %VMM(7), %VMATCH, %k0
> - KMOV %k0, %VRCX
> - bsr %VRCX, %VRCX
> - subq $VEC_SIZE, %rsi
> -L(return_old_match_ret):
> - leaq (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %rax
> - ret
> -
> - .p2align 4,, 10
> -L(return_new_match):
> - VPTESTN %VMM(5), %VMM(5), %k0
> -
> - /* Combined results from VEC5/6. */
> - kunpck_2x %k0, %k1, %k0
> - kmov_2x %k0, %maskz_2x
> -
> - blsmsk %maskz_2x, %maskz_2x
> - kunpck_2x %k2, %k3, %k3
> - kmov_2x %k3, %maskm_2x
> -
> - /* Match at end was out-of-bounds so use last known match. */
> - and %maskz_2x, %maskm_2x
> - jz L(return_old_match)
> -
> - bsr %maskm_2x, %maskm_2x
> - leaq (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %rax
> - ret
> -
> -L(cross_page_boundary):
> - /* eax contains all the page offset bits of src (rdi). `xor rdi,
> - rax` sets pointer will all page offset bits cleared so
> - offset of (PAGE_SIZE - VEC_SIZE) will get last aligned VEC
> - before page cross (guaranteed to be safe to read). Doing this
> - as opposed to `movq %rdi, %rax; andq $-VEC_SIZE, %rax` saves
> - a bit of code size. */
> - xorq %rdi, %rax
> - VMOVU (PAGE_SIZE - VEC_SIZE)(%rax), %VMM(1)
> - VPTESTN %VMM(1), %VMM(1), %k0
> - KMOV %k0, %VRCX
> -
> - /* Shift out zero CHAR matches that are before the beginning of
> - src (rdi). */
> -# ifdef USE_AS_WCSRCHR
> - movl %edi, %esi
> - andl $(VEC_SIZE - 1), %esi
> - shrl $2, %esi
> -# endif
> - shrx %VGPR(SHIFT_REG), %VRCX, %VRCX
> -
> - test %VRCX, %VRCX
> - jz L(page_cross_continue)
> +#include "x86-evex256-vecs.h"
> +#include "reg-macros.h"
>
> - /* Found zero CHAR so need to test for search CHAR. */
> - VPCMP $0, %VMATCH, %VMM(1), %k1
> - KMOV %k1, %VRAX
> - /* Shift out search CHAR matches that are before the beginning of
> - src (rdi). */
> - shrx %VGPR(SHIFT_REG), %VRAX, %VRAX
> -
> - /* Check if any search CHAR match in range. */
> - blsmsk %VRCX, %VRCX
> - and %VRCX, %VRAX
> - jz L(ret3)
> - bsr %VRAX, %VRAX
> -# ifdef USE_AS_WCSRCHR
> - leaq (%rdi, %rax, CHAR_SIZE), %rax
> -# else
> - addq %rdi, %rax
> -# endif
> -L(ret3):
> - ret
> -END(STRRCHR)
> -#endif
> +#include "strrchr-evex-base.S"
> diff --git a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> index e5c5fe3bf2..a584cd3f43 100644
> --- a/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> +++ b/sysdeps/x86_64/multiarch/wcsrchr-evex.S
> @@ -4,4 +4,5 @@
>
> #define STRRCHR WCSRCHR
> #define USE_AS_WCSRCHR 1
> +#define USE_WIDE_CHAR 1
> #include "strrchr-evex.S"
> --
> 2.34.1
>
>
LGTM
Reviewed-by: Sunil K Pandey <skpgkp2@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-10-04 18:48 ` Noah Goldstein
2023-10-04 19:00 ` Sunil Pandey
@ 2023-10-18 9:18 ` Florian Weimer
2023-11-01 21:04 ` Florian Weimer
1 sibling, 1 reply; 12+ messages in thread
From: Florian Weimer @ 2023-10-18 9:18 UTC (permalink / raw)
To: Noah Goldstein; +Cc: libc-alpha, hjl.tools, carlos
* Noah Goldstein:
> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> common implementation: `strrchr-evex-base.S`.
>
> The motivation is `strrchr-evex` needed to be refactored to not use
> 64-bit masked registers in preperation for AVX10.
>
> Once vec-width masked register combining was removed, the EVEX and
> EVEX512 implementations can easily be implemented in the same file
> without any major overhead.
>
> The net result is performance improvements (measured on TGL) for both
> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> regressions in the test suite and it may be many of the cases that
> make the total-geomean of improvement/regression across bench-strrchr
> are cold. The point of the performance measurement is to show there
> are no major regressions, but the primary motivation is preperation
> for AVX10.
>
> Benchmarks where taken on TGL:
> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
>
> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
>
> Full check passes on x86.
I believe this caused some sort of regression because when we upgraded
glibc in the Fedora rawhide buildroot, a lot of things started failing:
glibc-2.38.9000-13.fc40 broke rawhide buildroot on x86_64
<https://bugzilla.redhat.com/show_bug.cgi?id=2244688>
The list of changes relative to the previous version is rather short:
- stdlib: fix grouping verification with multi-byte thousands separator (bug 30964)
- build-many-glibcs: Check for required system tools
- x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
- aarch64: Optimise vecmath logs
- aarch64: Cosmetic change in SVE exp routines
- aarch64: Optimize SVE cos & cosf
- aarch64: Improve vecmath sin routines
- nss: Get rid of alloca usage in makedb's write_output.
- debug: Add regression tests for BZ 30932
- Fix FORTIFY_SOURCE false positive
- nss: Rearrange and sort Makefile variables
- inet: Rearrange and sort Makefile variables
- Fix off-by-one OOB write in iconv/tst-iconv-mt
And this patch is the most likely one to cause issues. I will try to
revert the patch and see if it fixes the observed issues.
Thanks,
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-10-18 9:18 ` Florian Weimer
@ 2023-11-01 21:04 ` Florian Weimer
2023-11-01 21:11 ` Noah Goldstein
0 siblings, 1 reply; 12+ messages in thread
From: Florian Weimer @ 2023-11-01 21:04 UTC (permalink / raw)
To: Florian Weimer
Cc: Noah Goldstein, libc-alpha, hjl.tools, carlos, Sunil Pandey
* Florian Weimer:
> * Noah Goldstein:
>
>> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
>> common implementation: `strrchr-evex-base.S`.
>>
>> The motivation is `strrchr-evex` needed to be refactored to not use
>> 64-bit masked registers in preperation for AVX10.
>>
>> Once vec-width masked register combining was removed, the EVEX and
>> EVEX512 implementations can easily be implemented in the same file
>> without any major overhead.
>>
>> The net result is performance improvements (measured on TGL) for both
>> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
>> regressions in the test suite and it may be many of the cases that
>> make the total-geomean of improvement/regression across bench-strrchr
>> are cold. The point of the performance measurement is to show there
>> are no major regressions, but the primary motivation is preperation
>> for AVX10.
>>
>> Benchmarks where taken on TGL:
>> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
>>
>> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
>> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
>>
>> Full check passes on x86.
>
> I believe this caused some sort of regression because when we upgraded
> glibc in the Fedora rawhide buildroot, a lot of things started failing:
>
> glibc-2.38.9000-13.fc40 broke rawhide buildroot on x86_64
> <https://bugzilla.redhat.com/show_bug.cgi?id=2244688>
>
> The list of changes relative to the previous version is rather short:
>
> - stdlib: fix grouping verification with multi-byte thousands separator (bug 30964)
> - build-many-glibcs: Check for required system tools
> - x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
> - aarch64: Optimise vecmath logs
> - aarch64: Cosmetic change in SVE exp routines
> - aarch64: Optimize SVE cos & cosf
> - aarch64: Improve vecmath sin routines
> - nss: Get rid of alloca usage in makedb's write_output.
> - debug: Add regression tests for BZ 30932
> - Fix FORTIFY_SOURCE false positive
> - nss: Rearrange and sort Makefile variables
> - inet: Rearrange and sort Makefile variables
> - Fix off-by-one OOB write in iconv/tst-iconv-mt
>
> And this patch is the most likely one to cause issues. I will try to
> revert the patch and see if it fixes the observed issues.
We did the revert and the issues were gone. So I think this commit is
faulty.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-11-01 21:04 ` Florian Weimer
@ 2023-11-01 21:11 ` Noah Goldstein
2023-11-01 21:22 ` Noah Goldstein
0 siblings, 1 reply; 12+ messages in thread
From: Noah Goldstein @ 2023-11-01 21:11 UTC (permalink / raw)
To: Florian Weimer
Cc: Florian Weimer, libc-alpha, hjl.tools, carlos, Sunil Pandey
On Wed, Nov 1, 2023 at 4:04 PM Florian Weimer <fw@deneb.enyo.de> wrote:
>
> * Florian Weimer:
>
> > * Noah Goldstein:
> >
> >> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> >> common implementation: `strrchr-evex-base.S`.
> >>
> >> The motivation is `strrchr-evex` needed to be refactored to not use
> >> 64-bit masked registers in preperation for AVX10.
> >>
> >> Once vec-width masked register combining was removed, the EVEX and
> >> EVEX512 implementations can easily be implemented in the same file
> >> without any major overhead.
> >>
> >> The net result is performance improvements (measured on TGL) for both
> >> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> >> regressions in the test suite and it may be many of the cases that
> >> make the total-geomean of improvement/regression across bench-strrchr
> >> are cold. The point of the performance measurement is to show there
> >> are no major regressions, but the primary motivation is preperation
> >> for AVX10.
> >>
> >> Benchmarks where taken on TGL:
> >> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
> >>
> >> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> >> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
> >>
> >> Full check passes on x86.
> >
> > I believe this caused some sort of regression because when we upgraded
> > glibc in the Fedora rawhide buildroot, a lot of things started failing:
> >
> > glibc-2.38.9000-13.fc40 broke rawhide buildroot on x86_64
> > <https://bugzilla.redhat.com/show_bug.cgi?id=2244688>
> >
> > The list of changes relative to the previous version is rather short:
> >
> > - stdlib: fix grouping verification with multi-byte thousands separator (bug 30964)
> > - build-many-glibcs: Check for required system tools
> > - x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
> > - aarch64: Optimise vecmath logs
> > - aarch64: Cosmetic change in SVE exp routines
> > - aarch64: Optimize SVE cos & cosf
> > - aarch64: Improve vecmath sin routines
> > - nss: Get rid of alloca usage in makedb's write_output.
> > - debug: Add regression tests for BZ 30932
> > - Fix FORTIFY_SOURCE false positive
> > - nss: Rearrange and sort Makefile variables
> > - inet: Rearrange and sort Makefile variables
> > - Fix off-by-one OOB write in iconv/tst-iconv-mt
> >
> > And this patch is the most likely one to cause issues. I will try to
> > revert the patch and see if it fixes the observed issues.
>
> We did the revert and the issues were gone. So I think this commit is
> faulty.
Bah, didn't see your last email.
Thank you for reverting. Will look into the issue.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-11-01 21:11 ` Noah Goldstein
@ 2023-11-01 21:22 ` Noah Goldstein
2023-11-01 22:17 ` Noah Goldstein
2023-11-02 6:44 ` Florian Weimer
0 siblings, 2 replies; 12+ messages in thread
From: Noah Goldstein @ 2023-11-01 21:22 UTC (permalink / raw)
To: Florian Weimer
Cc: Florian Weimer, libc-alpha, hjl.tools, carlos, Sunil Pandey
On Wed, Nov 1, 2023 at 4:11 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Wed, Nov 1, 2023 at 4:04 PM Florian Weimer <fw@deneb.enyo.de> wrote:
> >
> > * Florian Weimer:
> >
> > > * Noah Goldstein:
> > >
> > >> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> > >> common implementation: `strrchr-evex-base.S`.
> > >>
> > >> The motivation is `strrchr-evex` needed to be refactored to not use
> > >> 64-bit masked registers in preperation for AVX10.
> > >>
> > >> Once vec-width masked register combining was removed, the EVEX and
> > >> EVEX512 implementations can easily be implemented in the same file
> > >> without any major overhead.
> > >>
> > >> The net result is performance improvements (measured on TGL) for both
> > >> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> > >> regressions in the test suite and it may be many of the cases that
> > >> make the total-geomean of improvement/regression across bench-strrchr
> > >> are cold. The point of the performance measurement is to show there
> > >> are no major regressions, but the primary motivation is preperation
> > >> for AVX10.
> > >>
> > >> Benchmarks where taken on TGL:
> > >> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
> > >>
> > >> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> > >> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
> > >>
> > >> Full check passes on x86.
> > >
> > > I believe this caused some sort of regression because when we upgraded
> > > glibc in the Fedora rawhide buildroot, a lot of things started failing:
> > >
> > > glibc-2.38.9000-13.fc40 broke rawhide buildroot on x86_64
> > > <https://bugzilla.redhat.com/show_bug.cgi?id=2244688>
> > >
> > > The list of changes relative to the previous version is rather short:
> > >
> > > - stdlib: fix grouping verification with multi-byte thousands separator (bug 30964)
> > > - build-many-glibcs: Check for required system tools
> > > - x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
> > > - aarch64: Optimise vecmath logs
> > > - aarch64: Cosmetic change in SVE exp routines
> > > - aarch64: Optimize SVE cos & cosf
> > > - aarch64: Improve vecmath sin routines
> > > - nss: Get rid of alloca usage in makedb's write_output.
> > > - debug: Add regression tests for BZ 30932
> > > - Fix FORTIFY_SOURCE false positive
> > > - nss: Rearrange and sort Makefile variables
> > > - inet: Rearrange and sort Makefile variables
> > > - Fix off-by-one OOB write in iconv/tst-iconv-mt
> > >
> > > And this patch is the most likely one to cause issues. I will try to
> > > revert the patch and see if it fixes the observed issues.
> >
> > We did the revert and the issues were gone. So I think this commit is
> > faulty.
>
> Bah, didn't see your last email.
> Thank you for reverting. Will look into the issue.
Okay bug is missing VBMI2 check. But the VBMI2 stuff
isn't really needed so will update and repost w/ fixed ISA.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-11-01 21:22 ` Noah Goldstein
@ 2023-11-01 22:17 ` Noah Goldstein
2023-11-02 6:44 ` Florian Weimer
1 sibling, 0 replies; 12+ messages in thread
From: Noah Goldstein @ 2023-11-01 22:17 UTC (permalink / raw)
To: Florian Weimer
Cc: Florian Weimer, libc-alpha, hjl.tools, carlos, Sunil Pandey
On Wed, Nov 1, 2023 at 4:22 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
>
> On Wed, Nov 1, 2023 at 4:11 PM Noah Goldstein <goldstein.w.n@gmail.com> wrote:
> >
> > On Wed, Nov 1, 2023 at 4:04 PM Florian Weimer <fw@deneb.enyo.de> wrote:
> > >
> > > * Florian Weimer:
> > >
> > > > * Noah Goldstein:
> > > >
> > > >> This commit refactors `strrchr-evex` and `strrchr-evex512` to use a
> > > >> common implementation: `strrchr-evex-base.S`.
> > > >>
> > > >> The motivation is `strrchr-evex` needed to be refactored to not use
> > > >> 64-bit masked registers in preperation for AVX10.
> > > >>
> > > >> Once vec-width masked register combining was removed, the EVEX and
> > > >> EVEX512 implementations can easily be implemented in the same file
> > > >> without any major overhead.
> > > >>
> > > >> The net result is performance improvements (measured on TGL) for both
> > > >> `strrchr-evex` and `strrchr-evex512`. Although, note there are some
> > > >> regressions in the test suite and it may be many of the cases that
> > > >> make the total-geomean of improvement/regression across bench-strrchr
> > > >> are cold. The point of the performance measurement is to show there
> > > >> are no major regressions, but the primary motivation is preperation
> > > >> for AVX10.
> > > >>
> > > >> Benchmarks where taken on TGL:
> > > >> https://www.intel.com/content/www/us/en/products/sku/213799/intel-core-i711850h-processor-24m-cache-up-to-4-80-ghz/specifications.html
> > > >>
> > > >> EVEX geometric_mean(N=5) of all benchmarks New / Original : 0.74
> > > >> EVEX512 geometric_mean(N=5) of all benchmarks New / Original: 0.87
> > > >>
> > > >> Full check passes on x86.
> > > >
> > > > I believe this caused some sort of regression because when we upgraded
> > > > glibc in the Fedora rawhide buildroot, a lot of things started failing:
> > > >
> > > > glibc-2.38.9000-13.fc40 broke rawhide buildroot on x86_64
> > > > <https://bugzilla.redhat.com/show_bug.cgi?id=2244688>
> > > >
> > > > The list of changes relative to the previous version is rather short:
> > > >
> > > > - stdlib: fix grouping verification with multi-byte thousands separator (bug 30964)
> > > > - build-many-glibcs: Check for required system tools
> > > > - x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
> > > > - aarch64: Optimise vecmath logs
> > > > - aarch64: Cosmetic change in SVE exp routines
> > > > - aarch64: Optimize SVE cos & cosf
> > > > - aarch64: Improve vecmath sin routines
> > > > - nss: Get rid of alloca usage in makedb's write_output.
> > > > - debug: Add regression tests for BZ 30932
> > > > - Fix FORTIFY_SOURCE false positive
> > > > - nss: Rearrange and sort Makefile variables
> > > > - inet: Rearrange and sort Makefile variables
> > > > - Fix off-by-one OOB write in iconv/tst-iconv-mt
> > > >
> > > > And this patch is the most likely one to cause issues. I will try to
> > > > revert the patch and see if it fixes the observed issues.
> > >
> > > We did the revert and the issues were gone. So I think this commit is
> > > faulty.
> >
> > Bah, didn't see your last email.
> > Thank you for reverting. Will look into the issue.
>
> Okay bug is missing VBMI2 check. But the VBMI2 stuff
> isn't really needed so will update and repost w/ fixed ISA.
Posted fix.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10
2023-11-01 21:22 ` Noah Goldstein
2023-11-01 22:17 ` Noah Goldstein
@ 2023-11-02 6:44 ` Florian Weimer
1 sibling, 0 replies; 12+ messages in thread
From: Florian Weimer @ 2023-11-02 6:44 UTC (permalink / raw)
To: Noah Goldstein
Cc: Florian Weimer, libc-alpha, hjl.tools, carlos, Sunil Pandey
* Noah Goldstein:
> Okay bug is missing VBMI2 check. But the VBMI2 stuff
> isn't really needed so will update and repost w/ fixed ISA.
Thanks. The missing check explains why I couldn't reproduce it on the
lab machines I tried, which must have had VBMI2. The Fedora builders
apparently don't.
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-11-02 6:44 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-21 14:38 x86: Prepare `strrchr-evex` and `strrchr-evex512` for AVX10 Noah Goldstein
2023-09-21 14:39 ` Noah Goldstein
2023-09-21 15:16 ` H.J. Lu
2023-09-21 19:19 ` Noah Goldstein
2023-10-04 18:48 ` Noah Goldstein
2023-10-04 19:00 ` Sunil Pandey
2023-10-18 9:18 ` Florian Weimer
2023-11-01 21:04 ` Florian Weimer
2023-11-01 21:11 ` Noah Goldstein
2023-11-01 21:22 ` Noah Goldstein
2023-11-01 22:17 ` Noah Goldstein
2023-11-02 6:44 ` Florian Weimer
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