* FW: Trying to run on pid7t board
@ 2002-08-23 4:14 Robert Cragie
2002-08-23 5:52 ` Ben Elliston
0 siblings, 1 reply; 4+ messages in thread
From: Robert Cragie @ 2002-08-23 4:14 UTC (permalink / raw)
To: sid
I have done some more debugging on the problem I reported earlier regarding
exception handling in the ARM pid7t implementation. It actually threw an
abort_prefetch exception. I did a trace-semantics on what SID was doing and
it works fine until trying to return from exception:
0x8240: LDR_PRE_INC_IMM_OFFSET gr[0]:=0x13
0x8244: MSR_S spsr:=0x13
0x8248: AND_IMM gr[1]:=0x13
0x824c: CMP_IMM zbit:=0x1 nbit:=0x0 cbit:=0x1 vbit:=0x0
0x8250: X_INVALID
0x4: AND_REG_IMM_SHIFT gr[0]:=0x13
0x8: AND_REG_IMM_SHIFT gr[0]:=0x13
0xc: LDR_PRE_INC_IMM_OFFSET pc:=0x81ac
(it has now hit breakpoint at 0x81ac i.e. abort_prefetch exception handler)
The instruction at 0x8250 is:
ldmeqfd sp,{r0-r14,pc}^
The opcode for this is 0x08ddffff, which looks like
|COND|<4>|P|U|S|W|L| Rn | Reglist |
------------------------------------------
|0000|100|0|1|1|0|1|1101|1111111111111111|
------------------------------------------
| EQ | |FD |^| |L| sp | r0-r14,pc |
I confess I know very little about this, but I notice in CGEN, in arm7.cpu,
only two ldmia's are supported (PUSWL = 01001 and PUSWL = 01011). The opcode
above (PUSWL: 01101) (i.e. restore user mode banked registers) is not
included, so does this need to be in here too in some guise? Would this be
causing the invalid prefetch?
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
-----Original Message-----
From: sid-owner@sources.redhat.com
[mailto:sid-owner@sources.redhat.com]On Behalf Of Robert Cragie
Sent: 22 August 2002 18:09
To: Frank Ch. Eigler
Cc: sid@sources.redhat.com
Subject: RE: Trying to run on pid7t board
[snip]
With some further juggling of eCos configuration, I have got it printing to
the gdb console (-uart1:gdb), to the console sid was run from (-uart1:stdio)
and the tksm tty window. Excellent! Now I am having problems with the
timer-related calls (cyg_thread_delay() etc.) - I notice in the list this
was also seen by Cristiano Pereira (04-Mar-02). I have done some debugging,
and timer interrupt seems to fire once, then a data_abort exception is
thrown a bit later; looks like the pc was 0xe59d0044. Ho hum. I will try to
get to the bottom of what is going on - if anyone has any ideas, I'd
appreciate them.
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: FW: Trying to run on pid7t board
2002-08-23 4:14 FW: Trying to run on pid7t board Robert Cragie
@ 2002-08-23 5:52 ` Ben Elliston
2002-08-23 8:19 ` Robert Cragie
0 siblings, 1 reply; 4+ messages in thread
From: Ben Elliston @ 2002-08-23 5:52 UTC (permalink / raw)
To: Robert Cragie; +Cc: sid
>>>>> "Robert" == Robert Cragie <rcc@jennic.com> writes:
Robert> 0x8250: X_INVALID
Robert> ldmeqfd sp,{r0-r14,pc}^
Robert> I confess I know very little about this, but I notice in
Robert> CGEN, in arm7.cpu, only two ldmia's are supported (PUSWL =
Robert> 01001 and PUSWL = 01011). The opcode above (PUSWL: 01101)
Robert> (i.e. restore user mode banked registers) is not included,
Robert> so does this need to be in here too in some guise? Would
Robert> this be causing the invalid prefetch?
Yes. It should not take too much work to add that missing instruction
variant and regenerate the cpu files from the CGEN description. "make
cgen-all" in the cgen-cpu/arm7t subdirectory ought to do it.
Ben
^ permalink raw reply [flat|nested] 4+ messages in thread* RE: FW: Trying to run on pid7t board
2002-08-23 5:52 ` Ben Elliston
@ 2002-08-23 8:19 ` Robert Cragie
2002-08-23 10:57 ` Ben Elliston
0 siblings, 1 reply; 4+ messages in thread
From: Robert Cragie @ 2002-08-23 8:19 UTC (permalink / raw)
To: Ben Elliston; +Cc: sid
I can't find the directory you are referring to.
What I have done is this:
In sid/src/cgen/cpu/arm7.cpu, I have added the following instruction:
(dnai ldmia-psr "Load multiple registers (postindex, increment, update PSR)"
()
"FIXME"
(+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
(f-write-back? 0) (f-load? 1) rn reglist)
(sequence ((WI addr))
(set addr rn)
(multi-action 0 ldmia-action)
(multi-action 1 ldmia-action)
(multi-action 2 ldmia-action)
(multi-action 3 ldmia-action)
(multi-action 4 ldmia-action)
(multi-action 5 ldmia-action)
(multi-action 6 ldmia-action)
(multi-action 7 ldmia-action)
(multi-action 8 ldmia-action)
(multi-action 9 ldmia-action)
(multi-action 10 ldmia-action)
(multi-action 11 ldmia-action)
(multi-action 12 ldmia-action)
(multi-action 13 ldmia-action)
(multi-action 14 ldmia-action)
(multi-action 15 ldmia-action-r15)
(set (reg h-cpsr) (reg h-spsr)))
)
Will this work OK? I realise this is an incomplete implementation, and only
addresses the failed instruction, but one step at a time, as I am not at all
familiar with Scheme or CGEN.
So how do I rebuild sid to get this change in? I tried 'make all' in the
build directory originally created by src/configure and it didn't seem to do
anything.
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
> -----Original Message-----
> From: Ben Elliston [mailto:bje@redhat.com]
> Sent: 23 August 2002 13:52
> To: Robert Cragie
> Cc: sid@sources.redhat.com
> Subject: Re: FW: Trying to run on pid7t board
>
>
> >>>>> "Robert" == Robert Cragie <rcc@jennic.com> writes:
>
> Robert> 0x8250: X_INVALID
>
> Robert> ldmeqfd sp,{r0-r14,pc}^
>
> Robert> I confess I know very little about this, but I notice in
> Robert> CGEN, in arm7.cpu, only two ldmia's are supported (PUSWL =
> Robert> 01001 and PUSWL = 01011). The opcode above (PUSWL: 01101)
> Robert> (i.e. restore user mode banked registers) is not included,
> Robert> so does this need to be in here too in some guise? Would
> Robert> this be causing the invalid prefetch?
>
> Yes. It should not take too much work to add that missing instruction
> variant and regenerate the cpu files from the CGEN description. "make
> cgen-all" in the cgen-cpu/arm7t subdirectory ought to do it.
>
> Ben
>
^ permalink raw reply [flat|nested] 4+ messages in thread* RE: FW: Trying to run on pid7t board
2002-08-23 8:19 ` Robert Cragie
@ 2002-08-23 10:57 ` Ben Elliston
0 siblings, 0 replies; 4+ messages in thread
From: Ben Elliston @ 2002-08-23 10:57 UTC (permalink / raw)
To: Robert Cragie; +Cc: sid
>>>>> "Robert" == Robert Cragie <rcc@jennic.com> writes:
Robert> Will this work OK? I realise this is an incomplete implementation, and only
Robert> addresses the failed instruction, but one step at a time, as I am not at all
Robert> familiar with Scheme or CGEN.
Your patch looks correct at first glance.
Robert> So how do I rebuild sid to get this change in? I tried 'make all' in the
Robert> build directory originally created by src/configure and it didn't seem to do
Robert> anything.
cd build/sid/component/cgen-cpu/arm7t && make cgen-all. That should do it.
Ben
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2002-08-23 17:57 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2002-08-23 4:14 FW: Trying to run on pid7t board Robert Cragie
2002-08-23 5:52 ` Ben Elliston
2002-08-23 8:19 ` Robert Cragie
2002-08-23 10:57 ` Ben Elliston
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).