From: Robert Shideleff <bigbob@shideleff.com>
To: sid@sources.redhat.com
Subject: Level sensitive ARM interrupts
Date: Fri, 02 Jul 2004 18:37:00 -0000 [thread overview]
Message-ID: <200407021437.35768.bigbob@shideleff.com> (raw)
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This patch makes arm interrupts level sensitive, as they are in hardware. The
nirq and nfiq pins are no longer callbacks, but rather simple input pins.
They are 'pulled' to high at processor invocation and reset. Their level is
'sense()-ed' at the beginning of each step.
The patch file was taken from within the sid/component/cgen-cpu/arm7t
directory.
This is necessary for proper operation of eCos, and for the ability to model
interrupts as they occur in actual hardware.
Bob
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next reply other threads:[~2004-07-02 18:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-07-02 18:37 Robert Shideleff [this message]
2004-07-02 18:39 ` Robert Shideleff
2004-07-05 0:27 ` Ben Elliston
[not found] ` <200407141850.05451.bigbob@shideleff.com>
[not found] ` <20040804023021.GA16871@redhat.com>
[not found] ` <200408041117.50677.bigbob@shideleff.com>
2004-08-04 15:43 ` Frank Ch. Eigler
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