* [PATCH 0/2] opcodes: LoongArch: Cleanups to jumps
@ 2022-07-27 11:07 WANG Xuerui
2022-07-27 11:07 ` [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms WANG Xuerui
2022-07-27 11:07 ` [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing WANG Xuerui
0 siblings, 2 replies; 10+ messages in thread
From: WANG Xuerui @ 2022-07-27 11:07 UTC (permalink / raw)
To: binutils; +Cc: Chenghua Xu, Zhensong Liu, Xi Ruoyao, WANG Xuerui
From: WANG Xuerui <git@xen0n.name>
Hi,
This is a resend of the previous series at [1], but without the more
controversial parts for getting at least something done.
As for the controversy over "ret" [2]: how do we teach users about this?
We don't even have written documentation about the other pseudo-insns at
present. However I chose to include this change after all, after seeing
the just upstreamed glibc port adopting it downstream. If anything, you
(Loongson maintainers) could pick the first patch only, and let the
discussion over "ret" continue.
[1]: https://sourceware.org/pipermail/binutils/2021-October/118261.html
[2]: https://sourceware.org/pipermail/binutils/2021-November/118534.html
WANG Xuerui (2):
opcodes: LoongArch: make all non-native jumps desugar to canonical
b{lt/ge}[u] forms
opcodes: LoongArch: add "ret" instruction to reduce typing
opcodes/loongarch-opc.c | 32 +++++++++++++-------------------
1 file changed, 13 insertions(+), 19 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-27 11:07 [PATCH 0/2] opcodes: LoongArch: Cleanups to jumps WANG Xuerui @ 2022-07-27 11:07 ` WANG Xuerui 2022-07-29 1:18 ` liuzhensong 2022-08-01 3:43 ` liuzhensong 2022-07-27 11:07 ` [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing WANG Xuerui 1 sibling, 2 replies; 10+ messages in thread From: WANG Xuerui @ 2022-07-27 11:07 UTC (permalink / raw) To: binutils; +Cc: Chenghua Xu, Zhensong Liu, Xi Ruoyao, WANG Xuerui From: WANG Xuerui <git@xen0n.name> Also re-order the jump/branch opcodes while at it, so that insns are sorted in ascending order according to opcodes, and the label form preceding the real definition. --- opcodes/loongarch-opc.c | 31 ++++++++++++------------------- 1 file changed, 12 insertions(+), 19 deletions(-) diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c index 08ba101a902..6f5e42d57e5 100644 --- a/opcodes/loongarch-opc.c +++ b/opcodes/loongarch-opc.c @@ -810,22 +810,13 @@ static struct loongarch_opcode loongarch_float_jmp_opcodes[] = static struct loongarch_opcode loongarch_jmp_opcodes[] = { /* match, mask, name, format, macro, include, exclude, pinfo. */ - { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, + { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, @@ -834,20 +825,22 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, - { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, - { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, - { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, - { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, - { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, + /* Jumps implemented with macros. */ + { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, { 0 } /* Terminate the list. */ }; -- 2.35.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-27 11:07 ` [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms WANG Xuerui @ 2022-07-29 1:18 ` liuzhensong 2022-07-29 9:42 ` WANG Xuerui 2022-08-01 3:43 ` liuzhensong 1 sibling, 1 reply; 10+ messages in thread From: liuzhensong @ 2022-07-29 1:18 UTC (permalink / raw) To: WANG Xuerui, binutils; +Cc: Chenghua Xu, Xi Ruoyao, WANG Xuerui On 2022/7/27 下午7:07, WANG Xuerui wrote: > From: WANG Xuerui <git@xen0n.name> > > Also re-order the jump/branch opcodes while at it, so that insns are > sorted in ascending order according to opcodes, and the label form > preceding the real definition. > --- > opcodes/loongarch-opc.c | 31 ++++++++++++------------------- > 1 file changed, 12 insertions(+), 19 deletions(-) > > diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c > index 08ba101a902..6f5e42d57e5 100644 > --- a/opcodes/loongarch-opc.c > +++ b/opcodes/loongarch-opc.c > @@ -810,22 +810,13 @@ static struct loongarch_opcode loongarch_float_jmp_opcodes[] = > static struct loongarch_opcode loongarch_jmp_opcodes[] = > { > /* match, mask, name, format, macro, include, exclude, pinfo. */ > - { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, > - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, > - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, > - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, > - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, > { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, > { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, > - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, > { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, > + { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, > + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, > { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, > @@ -834,20 +825,22 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = > { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > + /* Jumps implemented with macros. */ > + { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, > { 0 } /* Terminate the list. */ > }; > Looks good to me. And I don't think the instruction "ret" is necessary in [PATCH 2/2]. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-29 1:18 ` liuzhensong @ 2022-07-29 9:42 ` WANG Xuerui 2022-07-29 10:02 ` liuzhensong 0 siblings, 1 reply; 10+ messages in thread From: WANG Xuerui @ 2022-07-29 9:42 UTC (permalink / raw) To: liuzhensong, WANG Xuerui, binutils; +Cc: Chenghua Xu, Xi Ruoyao, WANG Xuerui On 2022/7/29 09:18, liuzhensong wrote: > > > On 2022/7/27 下午7:07, WANG Xuerui wrote: >> From: WANG Xuerui<git@xen0n.name> >> >> Also re-order the jump/branch opcodes while at it, so that insns are >> sorted in ascending order according to opcodes, and the label form >> preceding the real definition. >> --- >> opcodes/loongarch-opc.c | 31 ++++++++++++------------------- >> 1 file changed, 12 insertions(+), 19 deletions(-) >> >> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c >> index 08ba101a902..6f5e42d57e5 100644 >> --- a/opcodes/loongarch-opc.c >> +++ b/opcodes/loongarch-opc.c >> @@ -810,22 +810,13 @@ static struct loongarch_opcode loongarch_float_jmp_opcodes[] = >> static struct loongarch_opcode loongarch_jmp_opcodes[] = >> { >> /* match, mask, name, format, macro, include, exclude, pinfo. */ >> - { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, >> - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, >> - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, >> - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, >> - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, >> { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, >> { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, >> - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, >> { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, >> + { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, >> + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, >> { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, >> @@ -834,20 +825,22 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = >> { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, >> { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, >> - { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, >> { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, >> - { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, >> { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, >> - { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, >> { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >> - { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, >> - { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >> + /* Jumps implemented with macros. */ >> + { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, >> + { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, >> + { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, >> + { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, >> + { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, >> + { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, >> + { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, >> + { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, >> + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, >> { 0 } /* Terminate the list. */ >> }; >> > Looks good to me. And I don't think the instruction "ret" is > necessary in [PATCH 2/2]. Please don't be so subjective. You and Chenghua never gave objective reasons against "ret", your rejections seem to be just based on some kind of personal preference. All while ignoring the objective readability improvement and ease of learning gained by adding such support, and I believe there must be community members in favor of the addition. And it's not like everyone must immediately migrate to it, people may well continue to write "jr ra" or even "jirl zero, ra, 0", only those of us preferring brevity would have one more palatable choice... ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-29 9:42 ` WANG Xuerui @ 2022-07-29 10:02 ` liuzhensong 2022-07-29 10:06 ` WANG Xuerui 0 siblings, 1 reply; 10+ messages in thread From: liuzhensong @ 2022-07-29 10:02 UTC (permalink / raw) To: WANG Xuerui, binutils; +Cc: Chenghua Xu, Xi Ruoyao, WANG Xuerui, chenglulu 在 2022/7/29 下午5:42, WANG Xuerui 写道: > On 2022/7/29 09:18, liuzhensong wrote: >> >> >> On 2022/7/27 下午7:07, WANG Xuerui wrote: >>> From: WANG Xuerui<git@xen0n.name> >>> >>> Also re-order the jump/branch opcodes while at it, so that insns are >>> sorted in ascending order according to opcodes, and the label form >>> preceding the real definition. >>> --- >>> opcodes/loongarch-opc.c | 31 ++++++++++++------------------- >>> 1 file changed, 12 insertions(+), 19 deletions(-) >>> >>> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c >>> index 08ba101a902..6f5e42d57e5 100644 >>> --- a/opcodes/loongarch-opc.c >>> +++ b/opcodes/loongarch-opc.c >>> @@ -810,22 +810,13 @@ static struct loongarch_opcode >>> loongarch_float_jmp_opcodes[] = >>> static struct loongarch_opcode loongarch_jmp_opcodes[] = >>> { >>> /* match, mask, name, format, >>> macro, include, exclude, pinfo. */ >>> - { 0x0, 0x0, "bltz", "r,la", "bltz >>> %1,%%b16(%2)", 0, 0, 0 }, >>> - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", >>> 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "bgtz", "r,la", "bgtz >>> %1,%%b16(%2)", 0, 0, 0 }, >>> - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", >>> 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "bgez", "r,la", "bgez >>> %1,%%b16(%2)", 0, 0, 0 }, >>> - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", >>> 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "blez", "r,la", "blez >>> %1,%%b16(%2)", 0, 0, 0 }, >>> - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", >>> 0, 0, 0, 0 }, >>> { 0x0, 0x0, "beqz", "r,la", "beqz >>> %1,%%b21(%2)", 0, 0, 0 }, >>> { 0x40000000, 0xfc000000, "beqz", >>> "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >>> { 0x0, 0x0, "bnez", "r,la", "bnez >>> %1,%%b21(%2)", 0, 0, 0 }, >>> { 0x44000000, 0xfc000000, "bnez", >>> "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", >>> 0, 0, 0 }, >>> - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", >>> 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "b", "la", "b >>> %%b26(%1)", 0, 0, 0 }, >>> { 0x4c000000, 0xfc000000, "jirl", >>> "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, >>> + { 0x0, 0x0, "b", "la", "b >>> %%b26(%1)", 0, 0, 0 }, >>> + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", >>> 0, 0, 0, 0 }, >>> { 0x0, 0x0, "bl", "la", "bl >>> %%b26(%1)", 0, 0, 0 }, >>> { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", >>> 0, 0, 0, 0 }, >>> { 0x0, 0x0, "beq", "r,r,la", "beq >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> @@ -834,20 +825,22 @@ static struct loongarch_opcode >>> loongarch_jmp_opcodes[] = >>> { 0x5c000000, 0xfc000000, "bne", >>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>> { 0x0, 0x0, "blt", "r,r,la", "blt >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> { 0x60000000, 0xfc000000, "blt", >>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "bgt", "r,r,la", "bgt >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> - { 0x60000000, 0xfc000000, "bgt", >>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>> { 0x0, 0x0, "bge", "r,r,la", "bge >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> { 0x64000000, 0xfc000000, "bge", >>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "ble", "r,r,la", "ble >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> - { 0x64000000, 0xfc000000, "ble", >>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>> { 0x0, 0x0, "bltu", "r,r,la", "bltu >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> { 0x68000000, 0xfc000000, "bltu", >>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> - { 0x68000000, 0xfc000000, "bgtu", >>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>> { 0x0, 0x0, "bgeu", "r,r,la", "bgeu >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> { 0x6c000000, 0xfc000000, "bgeu", >>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>> - { 0x0, 0x0, "bleu", "r,r,la", "bleu >>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>> - { 0x6c000000, 0xfc000000, "bleu", >>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>> + /* Jumps implemented with macros. */ >>> + { 0x0, 0x0, "bgt", "r,r,la", "blt >>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>> + { 0x0, 0x0, "ble", "r,r,la", "bge >>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>> + { 0x0, 0x0, "bltz", "r,la", "blt >>> %1,$r0,%%b16(%2)", 0, 0, 0 }, >>> + { 0x0, 0x0, "bgtz", "r,la", "blt >>> $r0,%1,%%b16(%2)", 0, 0, 0 }, >>> + { 0x0, 0x0, "bgez", "r,la", "bge >>> %1,$r0,%%b16(%2)", 0, 0, 0 }, >>> + { 0x0, 0x0, "blez", "r,la", "bge >>> $r0,%1,%%b16(%2)", 0, 0, 0 }, >>> + { 0x0, 0x0, "bgtu", "r,r,la", "bltu >>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>> + { 0x0, 0x0, "bleu", "r,r,la", "bgeu >>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>> + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", >>> 0, 0, 0 }, >>> { 0 } /* Terminate the list. */ >>> }; >> Looks good to me. And I don't think the instruction "ret" is >> necessary in [PATCH 2/2]. > > Please don't be so subjective. You and Chenghua never gave objective > reasons against "ret", your rejections seem to be just based on some > kind of personal preference. All while ignoring the objective > readability improvement and ease of learning gained by adding such > support, and I believe there must be community members in favor of the > addition. > > And it's not like everyone must immediately migrate to it, people may > well continue to write "jr ra" or even "jirl zero, ra, 0", only those > of us preferring brevity would have one more palatable choice... If gcc is not required to be generated instruction "ret" by default, I think it can be added. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-29 10:02 ` liuzhensong @ 2022-07-29 10:06 ` WANG Xuerui 0 siblings, 0 replies; 10+ messages in thread From: WANG Xuerui @ 2022-07-29 10:06 UTC (permalink / raw) To: liuzhensong, WANG Xuerui, binutils Cc: Chenghua Xu, Xi Ruoyao, WANG Xuerui, chenglulu On 2022/7/29 18:02, liuzhensong wrote: > > 在 2022/7/29 下午5:42, WANG Xuerui 写道: >> On 2022/7/29 09:18, liuzhensong wrote: >>> >>> >>> On 2022/7/27 下午7:07, WANG Xuerui wrote: >>>> From: WANG Xuerui<git@xen0n.name> >>>> >>>> Also re-order the jump/branch opcodes while at it, so that insns are >>>> sorted in ascending order according to opcodes, and the label form >>>> preceding the real definition. >>>> --- >>>> opcodes/loongarch-opc.c | 31 ++++++++++++------------------- >>>> 1 file changed, 12 insertions(+), 19 deletions(-) >>>> >>>> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c >>>> index 08ba101a902..6f5e42d57e5 100644 >>>> --- a/opcodes/loongarch-opc.c >>>> +++ b/opcodes/loongarch-opc.c >>>> @@ -810,22 +810,13 @@ static struct loongarch_opcode >>>> loongarch_float_jmp_opcodes[] = >>>> static struct loongarch_opcode loongarch_jmp_opcodes[] = >>>> { >>>> /* match, mask, name, format, macro, >>>> include, exclude, pinfo. */ >>>> - { 0x0, 0x0, "bltz", "r,la", "bltz >>>> %1,%%b16(%2)", 0, 0, 0 }, >>>> - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", >>>> 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "bgtz", "r,la", "bgtz >>>> %1,%%b16(%2)", 0, 0, 0 }, >>>> - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", >>>> 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "bgez", "r,la", "bgez >>>> %1,%%b16(%2)", 0, 0, 0 }, >>>> - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", >>>> 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "blez", "r,la", "blez >>>> %1,%%b16(%2)", 0, 0, 0 }, >>>> - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", >>>> 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "beqz", "r,la", "beqz >>>> %1,%%b21(%2)", 0, 0, 0 }, >>>> { 0x40000000, 0xfc000000, "beqz", >>>> "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "bnez", "r,la", "bnez >>>> %1,%%b21(%2)", 0, 0, 0 }, >>>> { 0x44000000, 0xfc000000, "bnez", >>>> "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", >>>> 0, 0, 0 }, >>>> - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", >>>> 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "b", "la", "b >>>> %%b26(%1)", 0, 0, 0 }, >>>> { 0x4c000000, 0xfc000000, "jirl", >>>> "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, >>>> + { 0x0, 0x0, "b", "la", "b >>>> %%b26(%1)", 0, 0, 0 }, >>>> + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", >>>> 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "bl", "la", "bl >>>> %%b26(%1)", 0, 0, 0 }, >>>> { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", >>>> 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "beq", "r,r,la", "beq >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> @@ -834,20 +825,22 @@ static struct loongarch_opcode >>>> loongarch_jmp_opcodes[] = >>>> { 0x5c000000, 0xfc000000, "bne", >>>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "blt", "r,r,la", "blt >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> { 0x60000000, 0xfc000000, "blt", >>>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "bgt", "r,r,la", "bgt >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> - { 0x60000000, 0xfc000000, "bgt", >>>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "bge", "r,r,la", "bge >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> { 0x64000000, 0xfc000000, "bge", >>>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "ble", "r,r,la", "ble >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> - { 0x64000000, 0xfc000000, "ble", >>>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "bltu", "r,r,la", "bltu >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> { 0x68000000, 0xfc000000, "bltu", >>>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> - { 0x68000000, 0xfc000000, "bgtu", >>>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> { 0x0, 0x0, "bgeu", "r,r,la", "bgeu >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> { 0x6c000000, 0xfc000000, "bgeu", >>>> "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> - { 0x0, 0x0, "bleu", "r,r,la", "bleu >>>> %1,%2,%%b16(%3)", 0, 0, 0 }, >>>> - { 0x6c000000, 0xfc000000, "bleu", >>>> "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, >>>> + /* Jumps implemented with macros. */ >>>> + { 0x0, 0x0, "bgt", "r,r,la", "blt >>>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "ble", "r,r,la", "bge >>>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "bltz", "r,la", "blt >>>> %1,$r0,%%b16(%2)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "bgtz", "r,la", "blt >>>> $r0,%1,%%b16(%2)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "bgez", "r,la", "bge >>>> %1,$r0,%%b16(%2)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "blez", "r,la", "bge >>>> $r0,%1,%%b16(%2)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "bgtu", "r,r,la", "bltu >>>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "bleu", "r,r,la", "bgeu >>>> %2,%1,%%b16(%3)", 0, 0, 0 }, >>>> + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", >>>> 0, 0, 0 }, >>>> { 0 } /* Terminate the list. */ >>>> }; >>> Looks good to me. And I don't think the instruction "ret" is >>> necessary in [PATCH 2/2]. >> >> Please don't be so subjective. You and Chenghua never gave objective >> reasons against "ret", your rejections seem to be just based on some >> kind of personal preference. All while ignoring the objective >> readability improvement and ease of learning gained by adding such >> support, and I believe there must be community members in favor of >> the addition. >> >> And it's not like everyone must immediately migrate to it, people may >> well continue to write "jr ra" or even "jirl zero, ra, 0", only those >> of us preferring brevity would have one more palatable choice... > If gcc is not required to be generated instruction "ret" by default, I > think it can be added. > Yeah that was never my intention to force everyone onto this. I always wanted to ease the learning curve of LoongArch assembly, and improve its readability and brevity along the way. All my effort around the assembler is centered around this, including the addition of "ret" of course. And thanks for the very much needed communication and understanding. ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms 2022-07-27 11:07 ` [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms WANG Xuerui 2022-07-29 1:18 ` liuzhensong @ 2022-08-01 3:43 ` liuzhensong 1 sibling, 0 replies; 10+ messages in thread From: liuzhensong @ 2022-08-01 3:43 UTC (permalink / raw) To: WANG Xuerui, binutils; +Cc: Chenghua Xu, Xi Ruoyao, WANG Xuerui 在 2022/7/27 下午7:07, WANG Xuerui 写道: > From: WANG Xuerui <git@xen0n.name> > > Also re-order the jump/branch opcodes while at it, so that insns are > sorted in ascending order according to opcodes, and the label form > preceding the real definition. > --- > opcodes/loongarch-opc.c | 31 ++++++++++++------------------- > 1 file changed, 12 insertions(+), 19 deletions(-) > > diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c > index 08ba101a902..6f5e42d57e5 100644 > --- a/opcodes/loongarch-opc.c > +++ b/opcodes/loongarch-opc.c > @@ -810,22 +810,13 @@ static struct loongarch_opcode loongarch_float_jmp_opcodes[] = > static struct loongarch_opcode loongarch_jmp_opcodes[] = > { > /* match, mask, name, format, macro, include, exclude, pinfo. */ > - { 0x0, 0x0, "bltz", "r,la", "bltz %1,%%b16(%2)", 0, 0, 0 }, > - { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgtz", "r,la", "bgtz %1,%%b16(%2)", 0, 0, 0 }, > - { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgez", "r,la", "bgez %1,%%b16(%2)", 0, 0, 0 }, > - { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "blez", "r,la", "blez %1,%%b16(%2)", 0, 0, 0 }, > - { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, > { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, > { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, > - { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, > { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 }, > + { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, > + { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, > { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, > @@ -834,20 +825,22 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = > { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgt", "r,r,la", "bgt %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x60000000, 0xfc000000, "bgt", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "ble", "r,r,la", "ble %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x64000000, 0xfc000000, "ble", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bgtu", "r,r,la", "bgtu %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x68000000, 0xfc000000, "bgtu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, > { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, > - { 0x0, 0x0, "bleu", "r,r,la", "bleu %1,%2,%%b16(%3)", 0, 0, 0 }, > - { 0x6c000000, 0xfc000000, "bleu", "r0:5,r5:5,sb10:16<<2", 0, 0, 0, 0 }, > + /* Jumps implemented with macros. */ > + { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, > + { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, > + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, + /* Jumps implemented with macros. */ + { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, + { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, + { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, + { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, Maybe it's better to sort according to the order of the real instructions. > { 0 } /* Terminate the list. */ > }; > ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing 2022-07-27 11:07 [PATCH 0/2] opcodes: LoongArch: Cleanups to jumps WANG Xuerui 2022-07-27 11:07 ` [PATCH 1/2] opcodes: LoongArch: make all non-native jumps desugar to canonical b{lt/ge}[u] forms WANG Xuerui @ 2022-07-27 11:07 ` WANG Xuerui 2022-07-27 13:26 ` Xi Ruoyao 1 sibling, 1 reply; 10+ messages in thread From: WANG Xuerui @ 2022-07-27 11:07 UTC (permalink / raw) To: binutils; +Cc: Chenghua Xu, Zhensong Liu, Xi Ruoyao, WANG Xuerui From: WANG Xuerui <git@xen0n.name> This syntactic sugar is present in both classical and emerging architectures, like Alpha, SPARC and RISC-V, and assembler macros doing the same thing can already be found in the wild e.g. [1], proving the feature's popularity. It's better to provide support directly in the assembler so downstream users wouldn't have to re-invent this over and over again. [1]: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/loongarch/sysdep.h;h=c586df819cd90;hb=HEAD#l28 --- opcodes/loongarch-opc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c index 6f5e42d57e5..e4e3a512f03 100644 --- a/opcodes/loongarch-opc.c +++ b/opcodes/loongarch-opc.c @@ -841,6 +841,7 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] = { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, + { 0x0, 0x0, "ret", "", "jirl $r0,$r1,0", 0, 0, 0 }, { 0 } /* Terminate the list. */ }; -- 2.35.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing 2022-07-27 11:07 ` [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing WANG Xuerui @ 2022-07-27 13:26 ` Xi Ruoyao 2022-07-29 10:09 ` WANG Xuerui 0 siblings, 1 reply; 10+ messages in thread From: Xi Ruoyao @ 2022-07-27 13:26 UTC (permalink / raw) To: WANG Xuerui, binutils; +Cc: Chenghua Xu, Zhensong Liu, WANG Xuerui On Wed, 2022-07-27 at 19:07 +0800, WANG Xuerui wrote: > From: WANG Xuerui <git@xen0n.name> > > This syntactic sugar is present in both classical and emerging > architectures, like Alpha, SPARC and RISC-V, and assembler macros > doing the same thing can already be found in the wild e.g. [1], proving > the feature's popularity. It's better to provide support directly in the > assembler so downstream users wouldn't have to re-invent this over and > over again. Maybe an off-topic question: should we document the syntactic sugars in LoongArch-Documentation.git? I've already seen at least 3 different "re-invented `move`" :(. -- Xi Ruoyao <xry111@xry111.site> School of Aerospace Science and Technology, Xidian University ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing 2022-07-27 13:26 ` Xi Ruoyao @ 2022-07-29 10:09 ` WANG Xuerui 0 siblings, 0 replies; 10+ messages in thread From: WANG Xuerui @ 2022-07-29 10:09 UTC (permalink / raw) To: Xi Ruoyao, WANG Xuerui, binutils; +Cc: Chenghua Xu, Zhensong Liu, WANG Xuerui On 2022/7/27 21:26, Xi Ruoyao wrote: > On Wed, 2022-07-27 at 19:07 +0800, WANG Xuerui wrote: >> From: WANG Xuerui <git@xen0n.name> >> >> This syntactic sugar is present in both classical and emerging >> architectures, like Alpha, SPARC and RISC-V, and assembler macros >> doing the same thing can already be found in the wild e.g. [1], proving >> the feature's popularity. It's better to provide support directly in the >> assembler so downstream users wouldn't have to re-invent this over and >> over again. > Maybe an off-topic question: should we document the syntactic sugars in > LoongArch-Documentation.git? I've already seen at least 3 different > "re-invented `move`" :(. Yeah I plan to do so after finishing the insn format spec [1]. (I'll need the formal syntax defined to allow for concise and precise description of both insn encoding and asm syntax). The pseudo-insns are to be included in the assembly syntax conventions doc. [1]: https://github.com/loongson/LoongArch-Documentation/pull/56 ^ permalink raw reply [flat|nested] 10+ messages in thread
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Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2022-07-27 11:07 [PATCH 0/2] opcodes: LoongArch: Cleanups to jumps WANG Xuerui
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2022-07-29 1:18 ` liuzhensong
2022-07-29 9:42 ` WANG Xuerui
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2022-07-29 10:06 ` WANG Xuerui
2022-08-01 3:43 ` liuzhensong
2022-07-27 11:07 ` [PATCH 2/2] opcodes: LoongArch: add "ret" instruction to reduce typing WANG Xuerui
2022-07-27 13:26 ` Xi Ruoyao
2022-07-29 10:09 ` WANG Xuerui
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