From: Matthieu Longo <matthieu.longo@arm.com>
To: binutils@sourceware.org
Cc: Richard Earnshaw <richard.earnshaw@arm.com>,
Nick Clifton <nickc@redhat.com>,
Matthieu Longo <matthieu.longo@arm.com>
Subject: [PATCH v1 2/4] aarch64: testsuite: use same regs for read and write tests
Date: Tue, 27 Feb 2024 10:59:15 +0000 [thread overview]
Message-ID: <20240227105917.295899-3-matthieu.longo@arm.com> (raw)
In-Reply-To: <20240227105917.295899-1-matthieu.longo@arm.com>
[-- Attachment #1: Type: text/plain, Size: 682 bytes --]
This patch aims at making easier to replacement of read and write
instructions to system registers by a macro that will use the same
registers for read and write.
---
gas/testsuite/gas/aarch64/sysreg/sysreg-2.d | 102 ++--
gas/testsuite/gas/aarch64/sysreg/sysreg-2.s | 38 +-
gas/testsuite/gas/aarch64/sysreg/sysreg-3.d | 40 +-
gas/testsuite/gas/aarch64/sysreg/sysreg-3.s | 18 +-
gas/testsuite/gas/aarch64/sysreg/sysreg-8.d | 528 +++++++++----------
gas/testsuite/gas/aarch64/sysreg/sysreg-8.s | 6 +-
gas/testsuite/gas/aarch64/sysreg/sysreg128.d | 20 +-
gas/testsuite/gas/aarch64/sysreg/sysreg128.s | 2 +-
8 files changed, 377 insertions(+), 377 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: v1-0002-aarch64-testsuite-use-same-regs-for-read-and-writ.patch --]
[-- Type: text/x-patch; name="v1-0002-aarch64-testsuite-use-same-regs-for-read-and-writ.patch", Size: 34792 bytes --]
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
index ac0a8621bfa..0a3a0c7d6b4 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d
@@ -7,54 +7,54 @@
Disassembly of section .text:
0+ <.*>:
-.*: d5380725 mrs x5, id_aa64mmfr1_el1
-.*: d5380747 mrs x7, id_aa64mmfr2_el1
-.*: d5380769 mrs x9, id_aa64mmfr3_el1
-.*: d538078b mrs x11, id_aa64mmfr4_el1
- [0-9a-f]+: d5385305 mrs x5, erridr_el1
- [0-9a-f]+: d5185327 msr errselr_el1, x7
- [0-9a-f]+: d5385327 mrs x7, errselr_el1
- [0-9a-f]+: d5385405 mrs x5, erxfr_el1
- [0-9a-f]+: d5185425 msr erxctlr_el1, x5
- [0-9a-f]+: d5385425 mrs x5, erxctlr_el1
- [0-9a-f]+: d5185445 msr erxstatus_el1, x5
- [0-9a-f]+: d5385445 mrs x5, erxstatus_el1
- [0-9a-f]+: d5185465 msr erxaddr_el1, x5
- [0-9a-f]+: d5385465 mrs x5, erxaddr_el1
- [0-9a-f]+: d5185505 msr erxmisc0_el1, x5
- [0-9a-f]+: d5385505 mrs x5, erxmisc0_el1
- [0-9a-f]+: d5185525 msr erxmisc1_el1, x5
- [0-9a-f]+: d5385525 mrs x5, erxmisc1_el1
- [0-9a-f]+: d53c5265 mrs x5, vsesr_el2
- [0-9a-f]+: d518c125 msr disr_el1, x5
- [0-9a-f]+: d538c125 mrs x5, disr_el1
- [0-9a-f]+: d53cc125 mrs x5, vdisr_el2
- [0-9a-f]+: d50b7a20 dc cvac, x0
- [0-9a-f]+: d50b7b21 dc cvau, x1
- [0-9a-f]+: d50b7c22 dc cvap, x2
- [0-9a-f]+: d5087900 at s1e1rp, x0
- [0-9a-f]+: d5087921 at s1e1wp, x1
- [0-9a-f]+: d5189a07 msr pmblimitr_el1, x7
- [0-9a-f]+: d5389a07 mrs x7, pmblimitr_el1
- [0-9a-f]+: d5189a27 msr pmbptr_el1, x7
- [0-9a-f]+: d5389a27 mrs x7, pmbptr_el1
- [0-9a-f]+: d5189a67 msr pmbsr_el1, x7
- [0-9a-f]+: d5389a67 mrs x7, pmbsr_el1
- [0-9a-f]+: d5189907 msr pmscr_el1, x7
- [0-9a-f]+: d5389907 mrs x7, pmscr_el1
- [0-9a-f]+: d5189947 msr pmsicr_el1, x7
- [0-9a-f]+: d5389947 mrs x7, pmsicr_el1
- [0-9a-f]+: d5189967 msr pmsirr_el1, x7
- [0-9a-f]+: d5389967 mrs x7, pmsirr_el1
- [0-9a-f]+: d5189987 msr pmsfcr_el1, x7
- [0-9a-f]+: d5389987 mrs x7, pmsfcr_el1
- [0-9a-f]+: d51899a7 msr pmsevfr_el1, x7
- [0-9a-f]+: d53899a7 mrs x7, pmsevfr_el1
- [0-9a-f]+: d51899c7 msr pmslatfr_el1, x7
- [0-9a-f]+: d53899c7 mrs x7, pmslatfr_el1
- [0-9a-f]+: d51c9907 msr pmscr_el2, x7
- [0-9a-f]+: d53c9907 mrs x7, pmscr_el2
- [0-9a-f]+: d51d9907 msr pmscr_el12, x7
- [0-9a-f]+: d53d9907 mrs x7, pmscr_el12
- [0-9a-f]+: d5389ae7 mrs x7, pmbidr_el1
- [0-9a-f]+: d53899e7 mrs x7, pmsidr_el1
+.*: d5380720 mrs x0, id_aa64mmfr1_el1
+.*: d5380740 mrs x0, id_aa64mmfr2_el1
+.*: d5380760 mrs x0, id_aa64mmfr3_el1
+.*: d5380780 mrs x0, id_aa64mmfr4_el1
+.*: d5385300 mrs x0, erridr_el1
+.*: d5185320 msr errselr_el1, x0
+.*: d5385320 mrs x0, errselr_el1
+.*: d5385400 mrs x0, erxfr_el1
+.*: d5185420 msr erxctlr_el1, x0
+.*: d5385420 mrs x0, erxctlr_el1
+.*: d5185440 msr erxstatus_el1, x0
+.*: d5385440 mrs x0, erxstatus_el1
+.*: d5185460 msr erxaddr_el1, x0
+.*: d5385460 mrs x0, erxaddr_el1
+.*: d5185500 msr erxmisc0_el1, x0
+.*: d5385500 mrs x0, erxmisc0_el1
+.*: d5185520 msr erxmisc1_el1, x0
+.*: d5385520 mrs x0, erxmisc1_el1
+.*: d53c5260 mrs x0, vsesr_el2
+.*: d518c120 msr disr_el1, x0
+.*: d538c120 mrs x0, disr_el1
+.*: d53cc120 mrs x0, vdisr_el2
+.*: d50b7a20 dc cvac, x0
+.*: d50b7b21 dc cvau, x1
+.*: d50b7c22 dc cvap, x2
+.*: d5087900 at s1e1rp, x0
+.*: d5087921 at s1e1wp, x1
+.*: d5189a00 msr pmblimitr_el1, x0
+.*: d5389a00 mrs x0, pmblimitr_el1
+.*: d5189a20 msr pmbptr_el1, x0
+.*: d5389a20 mrs x0, pmbptr_el1
+.*: d5189a60 msr pmbsr_el1, x0
+.*: d5389a60 mrs x0, pmbsr_el1
+.*: d5189900 msr pmscr_el1, x0
+.*: d5389900 mrs x0, pmscr_el1
+.*: d5189940 msr pmsicr_el1, x0
+.*: d5389940 mrs x0, pmsicr_el1
+.*: d5189960 msr pmsirr_el1, x0
+.*: d5389960 mrs x0, pmsirr_el1
+.*: d5189980 msr pmsfcr_el1, x0
+.*: d5389980 mrs x0, pmsfcr_el1
+.*: d51899a0 msr pmsevfr_el1, x0
+.*: d53899a0 mrs x0, pmsevfr_el1
+.*: d51899c0 msr pmslatfr_el1, x0
+.*: d53899c0 mrs x0, pmslatfr_el1
+.*: d51c9900 msr pmscr_el2, x0
+.*: d53c9900 mrs x0, pmscr_el2
+.*: d51d9900 msr pmscr_el12, x0
+.*: d53d9900 mrs x0, pmscr_el12
+.*: d5389ae0 mrs x0, pmbidr_el1
+.*: d53899e0 mrs x0, pmsidr_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
index ae2bb145e72..315e6411849 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s
@@ -11,27 +11,27 @@
.text
- rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0
- rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0
- rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x9 r=1 w=0
- rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x11 r=1 w=0
+ rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x0 r=1 w=0
/* RAS extension. */
- rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0
- rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1
+ rw_sys_reg sys_reg=erridr_el1 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=errselr_el1 xreg=x0 r=1 w=1
- rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0
- rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1
- rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1
- rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1
+ rw_sys_reg sys_reg=erxfr_el1 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=erxctlr_el1 xreg=x0 r=1 w=1
+ rw_sys_reg sys_reg=erxstatus_el1 xreg=x0 r=1 w=1
+ rw_sys_reg sys_reg=erxaddr_el1 xreg=x0 r=1 w=1
- rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1
- rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1
+ rw_sys_reg sys_reg=erxmisc0_el1 xreg=x0 r=1 w=1
+ rw_sys_reg sys_reg=erxmisc1_el1 xreg=x0 r=1 w=1
- rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0
- rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1
- rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0
+ rw_sys_reg sys_reg=vsesr_el2 xreg=x0 r=1 w=0
+ rw_sys_reg sys_reg=disr_el1 xreg=x0 r=1 w=1
+ rw_sys_reg sys_reg=vdisr_el2 xreg=x0 r=1 w=0
/* DC CVAP. */
@@ -47,17 +47,17 @@
/* Statistical profiling. */
.irp reg, pmblimitr_el1, pmbptr_el1, pmbsr_el1
- rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1
+ rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
.endr
.irp reg, pmscr_el1, pmsicr_el1, pmsirr_el1, pmsfcr_el1
- rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1
+ rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
.endr
.irp reg, pmsevfr_el1, pmslatfr_el1, pmscr_el2, pmscr_el12
- rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1
+ rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=1
.endr
.irp reg, pmbidr_el1, pmsidr_el1
- rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=0
+ rw_sys_reg sys_reg=\reg xreg=x0 r=1 w=0
.endr
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
index e1c1ead73e7..5ed05d6916c 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d
@@ -6,23 +6,23 @@
Disassembly of section \.text:
0+ <.*>:
- 0: d5182100 msr apiakeylo_el1, x0
- 4: d5382100 mrs x0, apiakeylo_el1
- 8: d5182121 msr apiakeyhi_el1, x1
- c: d5382121 mrs x1, apiakeyhi_el1
- 10: d5182142 msr apibkeylo_el1, x2
- 14: d5382142 mrs x2, apibkeylo_el1
- 18: d5182163 msr apibkeyhi_el1, x3
- 1c: d5382163 mrs x3, apibkeyhi_el1
- 20: d5182204 msr apdakeylo_el1, x4
- 24: d5382204 mrs x4, apdakeylo_el1
- 28: d5182225 msr apdakeyhi_el1, x5
- 2c: d5382225 mrs x5, apdakeyhi_el1
- 30: d5182246 msr apdbkeylo_el1, x6
- 34: d5382246 mrs x6, apdbkeylo_el1
- 38: d5182267 msr apdbkeyhi_el1, x7
- 3c: d5382267 mrs x7, apdbkeyhi_el1
- 40: d5182308 msr apgakeylo_el1, x8
- 44: d5382308 mrs x8, apgakeylo_el1
- 48: d5182329 msr apgakeyhi_el1, x9
- 4c: d5382329 mrs x9, apgakeyhi_el1
+.*: d5182100 msr apiakeylo_el1, x0
+.*: d5382100 mrs x0, apiakeylo_el1
+.*: d5182120 msr apiakeyhi_el1, x0
+.*: d5382120 mrs x0, apiakeyhi_el1
+.*: d5182140 msr apibkeylo_el1, x0
+.*: d5382140 mrs x0, apibkeylo_el1
+.*: d5182160 msr apibkeyhi_el1, x0
+.*: d5382160 mrs x0, apibkeyhi_el1
+.*: d5182200 msr apdakeylo_el1, x0
+.*: d5382200 mrs x0, apdakeylo_el1
+.*: d5182220 msr apdakeyhi_el1, x0
+.*: d5382220 mrs x0, apdakeyhi_el1
+.*: d5182240 msr apdbkeylo_el1, x0
+.*: d5382240 mrs x0, apdbkeylo_el1
+.*: d5182260 msr apdbkeyhi_el1, x0
+.*: d5382260 mrs x0, apdbkeyhi_el1
+.*: d5182300 msr apgakeylo_el1, x0
+.*: d5382300 mrs x0, apgakeylo_el1
+.*: d5182320 msr apgakeyhi_el1, x0
+.*: d5382320 mrs x0, apgakeyhi_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
index e2ffc81c2b2..b45f89fcf27 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s
@@ -8,14 +8,14 @@
.text
test sys_reg=apiakeylo_el1 xreg=x0
- test sys_reg=apiakeyhi_el1 xreg=x1
- test sys_reg=apibkeylo_el1 xreg=x2
- test sys_reg=apibkeyhi_el1 xreg=x3
+ test sys_reg=apiakeyhi_el1 xreg=x0
+ test sys_reg=apibkeylo_el1 xreg=x0
+ test sys_reg=apibkeyhi_el1 xreg=x0
- test sys_reg=apdakeylo_el1 xreg=x4
- test sys_reg=apdakeyhi_el1 xreg=x5
- test sys_reg=apdbkeylo_el1 xreg=x6
- test sys_reg=apdbkeyhi_el1 xreg=x7
+ test sys_reg=apdakeylo_el1 xreg=x0
+ test sys_reg=apdakeyhi_el1 xreg=x0
+ test sys_reg=apdbkeylo_el1 xreg=x0
+ test sys_reg=apdbkeyhi_el1 xreg=x0
- test sys_reg=apgakeylo_el1 xreg=x8
- test sys_reg=apgakeyhi_el1 xreg=x9
+ test sys_reg=apgakeylo_el1 xreg=x0
+ test sys_reg=apgakeyhi_el1 xreg=x0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
index 09b67245781..3f048849836 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d
@@ -9,287 +9,287 @@ Disassembly of section \.text:
[^:]*: d53803a0 mrs x0, id_dfr1_el1
[^:]*: d53803c0 mrs x0, id_mmfr5_el1
[^:]*: d53802e0 mrs x0, id_isar6_el1
-[^:]*: d5384602 mrs x2, icc_pmr_el1
-[^:]*: d5184603 msr icc_pmr_el1, x3
+[^:]*: d5384600 mrs x0, icc_pmr_el1
+[^:]*: d5184600 msr icc_pmr_el1, x0
[^:]*: d538c800 mrs x0, icc_iar0_el1
-[^:]*: d518c821 msr icc_eoir0_el1, x1
+[^:]*: d518c820 msr icc_eoir0_el1, x0
[^:]*: d538c840 mrs x0, icc_hppir0_el1
-[^:]*: d538c862 mrs x2, icc_bpr0_el1
-[^:]*: d518c863 msr icc_bpr0_el1, x3
-[^:]*: d538c882 mrs x2, icc_ap0r0_el1
-[^:]*: d518c883 msr icc_ap0r0_el1, x3
-[^:]*: d538c8a2 mrs x2, icc_ap0r1_el1
-[^:]*: d518c8a3 msr icc_ap0r1_el1, x3
-[^:]*: d538c8c2 mrs x2, icc_ap0r2_el1
-[^:]*: d518c8c3 msr icc_ap0r2_el1, x3
-[^:]*: d538c8e2 mrs x2, icc_ap0r3_el1
-[^:]*: d518c8e3 msr icc_ap0r3_el1, x3
-[^:]*: d538c902 mrs x2, icc_ap1r0_el1
-[^:]*: d518c903 msr icc_ap1r0_el1, x3
-[^:]*: d538c922 mrs x2, icc_ap1r1_el1
-[^:]*: d518c923 msr icc_ap1r1_el1, x3
-[^:]*: d538c942 mrs x2, icc_ap1r2_el1
-[^:]*: d518c943 msr icc_ap1r2_el1, x3
-[^:]*: d538c962 mrs x2, icc_ap1r3_el1
-[^:]*: d518c963 msr icc_ap1r3_el1, x3
-[^:]*: d518cb21 msr icc_dir_el1, x1
+[^:]*: d538c860 mrs x0, icc_bpr0_el1
+[^:]*: d518c860 msr icc_bpr0_el1, x0
+[^:]*: d538c880 mrs x0, icc_ap0r0_el1
+[^:]*: d518c880 msr icc_ap0r0_el1, x0
+[^:]*: d538c8a0 mrs x0, icc_ap0r1_el1
+[^:]*: d518c8a0 msr icc_ap0r1_el1, x0
+[^:]*: d538c8c0 mrs x0, icc_ap0r2_el1
+[^:]*: d518c8c0 msr icc_ap0r2_el1, x0
+[^:]*: d538c8e0 mrs x0, icc_ap0r3_el1
+[^:]*: d518c8e0 msr icc_ap0r3_el1, x0
+[^:]*: d538c900 mrs x0, icc_ap1r0_el1
+[^:]*: d518c900 msr icc_ap1r0_el1, x0
+[^:]*: d538c920 mrs x0, icc_ap1r1_el1
+[^:]*: d518c920 msr icc_ap1r1_el1, x0
+[^:]*: d538c940 mrs x0, icc_ap1r2_el1
+[^:]*: d518c940 msr icc_ap1r2_el1, x0
+[^:]*: d538c960 mrs x0, icc_ap1r3_el1
+[^:]*: d518c960 msr icc_ap1r3_el1, x0
+[^:]*: d518cb20 msr icc_dir_el1, x0
[^:]*: d538cb60 mrs x0, icc_rpr_el1
-[^:]*: d518cba1 msr icc_sgi1r_el1, x1
-[^:]*: d518cbc1 msr icc_asgi1r_el1, x1
-[^:]*: d518cbe1 msr icc_sgi0r_el1, x1
+[^:]*: d518cba0 msr icc_sgi1r_el1, x0
+[^:]*: d518cbc0 msr icc_asgi1r_el1, x0
+[^:]*: d518cbe0 msr icc_sgi0r_el1, x0
[^:]*: d538cc00 mrs x0, icc_iar1_el1
-[^:]*: d518cc21 msr icc_eoir1_el1, x1
+[^:]*: d518cc20 msr icc_eoir1_el1, x0
[^:]*: d538cc40 mrs x0, icc_hppir1_el1
-[^:]*: d538cc62 mrs x2, icc_bpr1_el1
-[^:]*: d518cc63 msr icc_bpr1_el1, x3
-[^:]*: d538cc82 mrs x2, icc_ctlr_el1
-[^:]*: d518cc83 msr icc_ctlr_el1, x3
-[^:]*: d538ccc2 mrs x2, icc_igrpen0_el1
-[^:]*: d518ccc3 msr icc_igrpen0_el1, x3
-[^:]*: d538cce2 mrs x2, icc_igrpen1_el1
-[^:]*: d518cce3 msr icc_igrpen1_el1, x3
-[^:]*: d53cc802 mrs x2, ich_ap0r0_el2
-[^:]*: d51cc803 msr ich_ap0r0_el2, x3
-[^:]*: d53cc822 mrs x2, ich_ap0r1_el2
-[^:]*: d51cc823 msr ich_ap0r1_el2, x3
-[^:]*: d53cc842 mrs x2, ich_ap0r2_el2
-[^:]*: d51cc843 msr ich_ap0r2_el2, x3
-[^:]*: d53cc862 mrs x2, ich_ap0r3_el2
-[^:]*: d51cc863 msr ich_ap0r3_el2, x3
-[^:]*: d53cc902 mrs x2, ich_ap1r0_el2
-[^:]*: d51cc903 msr ich_ap1r0_el2, x3
-[^:]*: d53cc922 mrs x2, ich_ap1r1_el2
-[^:]*: d51cc923 msr ich_ap1r1_el2, x3
-[^:]*: d53cc942 mrs x2, ich_ap1r2_el2
-[^:]*: d51cc943 msr ich_ap1r2_el2, x3
-[^:]*: d53cc962 mrs x2, ich_ap1r3_el2
-[^:]*: d51cc963 msr ich_ap1r3_el2, x3
-[^:]*: d53ccb02 mrs x2, ich_hcr_el2
-[^:]*: d51ccb03 msr ich_hcr_el2, x3
+[^:]*: d538cc60 mrs x0, icc_bpr1_el1
+[^:]*: d518cc60 msr icc_bpr1_el1, x0
+[^:]*: d538cc80 mrs x0, icc_ctlr_el1
+[^:]*: d518cc80 msr icc_ctlr_el1, x0
+[^:]*: d538ccc0 mrs x0, icc_igrpen0_el1
+[^:]*: d518ccc0 msr icc_igrpen0_el1, x0
+[^:]*: d538cce0 mrs x0, icc_igrpen1_el1
+[^:]*: d518cce0 msr icc_igrpen1_el1, x0
+[^:]*: d53cc800 mrs x0, ich_ap0r0_el2
+[^:]*: d51cc800 msr ich_ap0r0_el2, x0
+[^:]*: d53cc820 mrs x0, ich_ap0r1_el2
+[^:]*: d51cc820 msr ich_ap0r1_el2, x0
+[^:]*: d53cc840 mrs x0, ich_ap0r2_el2
+[^:]*: d51cc840 msr ich_ap0r2_el2, x0
+[^:]*: d53cc860 mrs x0, ich_ap0r3_el2
+[^:]*: d51cc860 msr ich_ap0r3_el2, x0
+[^:]*: d53cc900 mrs x0, ich_ap1r0_el2
+[^:]*: d51cc900 msr ich_ap1r0_el2, x0
+[^:]*: d53cc920 mrs x0, ich_ap1r1_el2
+[^:]*: d51cc920 msr ich_ap1r1_el2, x0
+[^:]*: d53cc940 mrs x0, ich_ap1r2_el2
+[^:]*: d51cc940 msr ich_ap1r2_el2, x0
+[^:]*: d53cc960 mrs x0, ich_ap1r3_el2
+[^:]*: d51cc960 msr ich_ap1r3_el2, x0
+[^:]*: d53ccb00 mrs x0, ich_hcr_el2
+[^:]*: d51ccb00 msr ich_hcr_el2, x0
[^:]*: d53ccb40 mrs x0, ich_misr_el2
[^:]*: d53ccb60 mrs x0, ich_eisr_el2
[^:]*: d53ccba0 mrs x0, ich_elrsr_el2
-[^:]*: d53ccbe2 mrs x2, ich_vmcr_el2
-[^:]*: d51ccbe3 msr ich_vmcr_el2, x3
-[^:]*: d53ccc02 mrs x2, ich_lr0_el2
-[^:]*: d51ccc03 msr ich_lr0_el2, x3
-[^:]*: d53ccc22 mrs x2, ich_lr1_el2
-[^:]*: d51ccc23 msr ich_lr1_el2, x3
-[^:]*: d53ccc42 mrs x2, ich_lr2_el2
-[^:]*: d51ccc43 msr ich_lr2_el2, x3
-[^:]*: d53ccc62 mrs x2, ich_lr3_el2
-[^:]*: d51ccc63 msr ich_lr3_el2, x3
-[^:]*: d53ccc82 mrs x2, ich_lr4_el2
-[^:]*: d51ccc83 msr ich_lr4_el2, x3
-[^:]*: d53ccca2 mrs x2, ich_lr5_el2
-[^:]*: d51ccca3 msr ich_lr5_el2, x3
-[^:]*: d53cccc2 mrs x2, ich_lr6_el2
-[^:]*: d51cccc3 msr ich_lr6_el2, x3
-[^:]*: d53ccce2 mrs x2, ich_lr7_el2
-[^:]*: d51ccce3 msr ich_lr7_el2, x3
-[^:]*: d53ccd02 mrs x2, ich_lr8_el2
-[^:]*: d51ccd03 msr ich_lr8_el2, x3
-[^:]*: d53ccd22 mrs x2, ich_lr9_el2
-[^:]*: d51ccd23 msr ich_lr9_el2, x3
-[^:]*: d53ccd42 mrs x2, ich_lr10_el2
-[^:]*: d51ccd43 msr ich_lr10_el2, x3
-[^:]*: d53ccd62 mrs x2, ich_lr11_el2
-[^:]*: d51ccd63 msr ich_lr11_el2, x3
-[^:]*: d53ccd82 mrs x2, ich_lr12_el2
-[^:]*: d51ccd83 msr ich_lr12_el2, x3
-[^:]*: d53ccda2 mrs x2, ich_lr13_el2
-[^:]*: d51ccda3 msr ich_lr13_el2, x3
-[^:]*: d53ccdc2 mrs x2, ich_lr14_el2
-[^:]*: d51ccdc3 msr ich_lr14_el2, x3
-[^:]*: d53ccde2 mrs x2, ich_lr15_el2
-[^:]*: d51ccde3 msr ich_lr15_el2, x3
-[^:]*: d53ecce2 mrs x2, icc_igrpen1_el3
-[^:]*: d51ecce3 msr icc_igrpen1_el3, x3
+[^:]*: d53ccbe0 mrs x0, ich_vmcr_el2
+[^:]*: d51ccbe0 msr ich_vmcr_el2, x0
+[^:]*: d53ccc00 mrs x0, ich_lr0_el2
+[^:]*: d51ccc00 msr ich_lr0_el2, x0
+[^:]*: d53ccc20 mrs x0, ich_lr1_el2
+[^:]*: d51ccc20 msr ich_lr1_el2, x0
+[^:]*: d53ccc40 mrs x0, ich_lr2_el2
+[^:]*: d51ccc40 msr ich_lr2_el2, x0
+[^:]*: d53ccc60 mrs x0, ich_lr3_el2
+[^:]*: d51ccc60 msr ich_lr3_el2, x0
+[^:]*: d53ccc80 mrs x0, ich_lr4_el2
+[^:]*: d51ccc80 msr ich_lr4_el2, x0
+[^:]*: d53ccca0 mrs x0, ich_lr5_el2
+[^:]*: d51ccca0 msr ich_lr5_el2, x0
+[^:]*: d53cccc0 mrs x0, ich_lr6_el2
+[^:]*: d51cccc0 msr ich_lr6_el2, x0
+[^:]*: d53ccce0 mrs x0, ich_lr7_el2
+[^:]*: d51ccce0 msr ich_lr7_el2, x0
+[^:]*: d53ccd00 mrs x0, ich_lr8_el2
+[^:]*: d51ccd00 msr ich_lr8_el2, x0
+[^:]*: d53ccd20 mrs x0, ich_lr9_el2
+[^:]*: d51ccd20 msr ich_lr9_el2, x0
+[^:]*: d53ccd40 mrs x0, ich_lr10_el2
+[^:]*: d51ccd40 msr ich_lr10_el2, x0
+[^:]*: d53ccd60 mrs x0, ich_lr11_el2
+[^:]*: d51ccd60 msr ich_lr11_el2, x0
+[^:]*: d53ccd80 mrs x0, ich_lr12_el2
+[^:]*: d51ccd80 msr ich_lr12_el2, x0
+[^:]*: d53ccda0 mrs x0, ich_lr13_el2
+[^:]*: d51ccda0 msr ich_lr13_el2, x0
+[^:]*: d53ccdc0 mrs x0, ich_lr14_el2
+[^:]*: d51ccdc0 msr ich_lr14_el2, x0
+[^:]*: d53ccde0 mrs x0, ich_lr15_el2
+[^:]*: d51ccde0 msr ich_lr15_el2, x0
+[^:]*: d53ecce0 mrs x0, icc_igrpen1_el3
+[^:]*: d51ecce0 msr icc_igrpen1_el3, x0
[^:]*: d538a4e0 mrs x0, lorid_el1
[^:]*: d5390040 mrs x0, ccsidr2_el1
-[^:]*: d5381222 mrs x2, trfcr_el1
-[^:]*: d5181223 msr trfcr_el1, x3
+[^:]*: d5381220 mrs x0, trfcr_el1
+[^:]*: d5181220 msr trfcr_el1, x0
[^:]*: d5389ec0 mrs x0, pmmir_el1
-[^:]*: d53c1222 mrs x2, trfcr_el2
-[^:]*: d51c1223 msr trfcr_el2, x3
-[^:]*: d53d1222 mrs x2, trfcr_el12
-[^:]*: d51d1223 msr trfcr_el12, x3
-[^:]*: d53bd202 mrs x2, amcr_el0
-[^:]*: d51bd203 msr amcr_el0, x3
+[^:]*: d53c1220 mrs x0, trfcr_el2
+[^:]*: d51c1220 msr trfcr_el2, x0
+[^:]*: d53d1220 mrs x0, trfcr_el12
+[^:]*: d51d1220 msr trfcr_el12, x0
+[^:]*: d53bd200 mrs x0, amcr_el0
+[^:]*: d51bd200 msr amcr_el0, x0
[^:]*: d53bd220 mrs x0, amcfgr_el0
[^:]*: d53bd240 mrs x0, amcgcr_el0
-[^:]*: d53bd262 mrs x2, amuserenr_el0
-[^:]*: d51bd263 msr amuserenr_el0, x3
-[^:]*: d53bd282 mrs x2, amcntenclr0_el0
-[^:]*: d51bd283 msr amcntenclr0_el0, x3
-[^:]*: d53bd2a2 mrs x2, amcntenset0_el0
-[^:]*: d51bd2a3 msr amcntenset0_el0, x3
-[^:]*: d53bd302 mrs x2, amcntenclr1_el0
-[^:]*: d51bd303 msr amcntenclr1_el0, x3
-[^:]*: d53bd322 mrs x2, amcntenset1_el0
-[^:]*: d51bd323 msr amcntenset1_el0, x3
-[^:]*: d53bd402 mrs x2, amevcntr00_el0
-[^:]*: d51bd403 msr amevcntr00_el0, x3
-[^:]*: d53bd422 mrs x2, amevcntr01_el0
-[^:]*: d51bd423 msr amevcntr01_el0, x3
-[^:]*: d53bd442 mrs x2, amevcntr02_el0
-[^:]*: d51bd443 msr amevcntr02_el0, x3
-[^:]*: d53bd462 mrs x2, amevcntr03_el0
-[^:]*: d51bd463 msr amevcntr03_el0, x3
+[^:]*: d53bd260 mrs x0, amuserenr_el0
+[^:]*: d51bd260 msr amuserenr_el0, x0
+[^:]*: d53bd280 mrs x0, amcntenclr0_el0
+[^:]*: d51bd280 msr amcntenclr0_el0, x0
+[^:]*: d53bd2a0 mrs x0, amcntenset0_el0
+[^:]*: d51bd2a0 msr amcntenset0_el0, x0
+[^:]*: d53bd300 mrs x0, amcntenclr1_el0
+[^:]*: d51bd300 msr amcntenclr1_el0, x0
+[^:]*: d53bd320 mrs x0, amcntenset1_el0
+[^:]*: d51bd320 msr amcntenset1_el0, x0
+[^:]*: d53bd400 mrs x0, amevcntr00_el0
+[^:]*: d51bd400 msr amevcntr00_el0, x0
+[^:]*: d53bd420 mrs x0, amevcntr01_el0
+[^:]*: d51bd420 msr amevcntr01_el0, x0
+[^:]*: d53bd440 mrs x0, amevcntr02_el0
+[^:]*: d51bd440 msr amevcntr02_el0, x0
+[^:]*: d53bd460 mrs x0, amevcntr03_el0
+[^:]*: d51bd460 msr amevcntr03_el0, x0
[^:]*: d53bd600 mrs x0, amevtyper00_el0
[^:]*: d53bd620 mrs x0, amevtyper01_el0
[^:]*: d53bd640 mrs x0, amevtyper02_el0
[^:]*: d53bd660 mrs x0, amevtyper03_el0
-[^:]*: d53bdc02 mrs x2, amevcntr10_el0
-[^:]*: d51bdc03 msr amevcntr10_el0, x3
-[^:]*: d53bdc22 mrs x2, amevcntr11_el0
-[^:]*: d51bdc23 msr amevcntr11_el0, x3
-[^:]*: d53bdc42 mrs x2, amevcntr12_el0
-[^:]*: d51bdc43 msr amevcntr12_el0, x3
-[^:]*: d53bdc62 mrs x2, amevcntr13_el0
-[^:]*: d51bdc63 msr amevcntr13_el0, x3
-[^:]*: d53bdc82 mrs x2, amevcntr14_el0
-[^:]*: d51bdc83 msr amevcntr14_el0, x3
-[^:]*: d53bdca2 mrs x2, amevcntr15_el0
-[^:]*: d51bdca3 msr amevcntr15_el0, x3
-[^:]*: d53bdcc2 mrs x2, amevcntr16_el0
-[^:]*: d51bdcc3 msr amevcntr16_el0, x3
-[^:]*: d53bdce2 mrs x2, amevcntr17_el0
-[^:]*: d51bdce3 msr amevcntr17_el0, x3
-[^:]*: d53bdd02 mrs x2, amevcntr18_el0
-[^:]*: d51bdd03 msr amevcntr18_el0, x3
-[^:]*: d53bdd22 mrs x2, amevcntr19_el0
-[^:]*: d51bdd23 msr amevcntr19_el0, x3
-[^:]*: d53bdd42 mrs x2, amevcntr110_el0
-[^:]*: d51bdd43 msr amevcntr110_el0, x3
-[^:]*: d53bdd62 mrs x2, amevcntr111_el0
-[^:]*: d51bdd63 msr amevcntr111_el0, x3
-[^:]*: d53bdd82 mrs x2, amevcntr112_el0
-[^:]*: d51bdd83 msr amevcntr112_el0, x3
-[^:]*: d53bdda2 mrs x2, amevcntr113_el0
-[^:]*: d51bdda3 msr amevcntr113_el0, x3
-[^:]*: d53bddc2 mrs x2, amevcntr114_el0
-[^:]*: d51bddc3 msr amevcntr114_el0, x3
-[^:]*: d53bdde2 mrs x2, amevcntr115_el0
-[^:]*: d51bdde3 msr amevcntr115_el0, x3
-[^:]*: d53bde02 mrs x2, amevtyper10_el0
-[^:]*: d51bde03 msr amevtyper10_el0, x3
-[^:]*: d53bde22 mrs x2, amevtyper11_el0
-[^:]*: d51bde23 msr amevtyper11_el0, x3
-[^:]*: d53bde42 mrs x2, amevtyper12_el0
-[^:]*: d51bde43 msr amevtyper12_el0, x3
-[^:]*: d53bde62 mrs x2, amevtyper13_el0
-[^:]*: d51bde63 msr amevtyper13_el0, x3
-[^:]*: d53bde82 mrs x2, amevtyper14_el0
-[^:]*: d51bde83 msr amevtyper14_el0, x3
-[^:]*: d53bdea2 mrs x2, amevtyper15_el0
-[^:]*: d51bdea3 msr amevtyper15_el0, x3
-[^:]*: d53bdec2 mrs x2, amevtyper16_el0
-[^:]*: d51bdec3 msr amevtyper16_el0, x3
-[^:]*: d53bdee2 mrs x2, amevtyper17_el0
-[^:]*: d51bdee3 msr amevtyper17_el0, x3
-[^:]*: d53bdf02 mrs x2, amevtyper18_el0
-[^:]*: d51bdf03 msr amevtyper18_el0, x3
-[^:]*: d53bdf22 mrs x2, amevtyper19_el0
-[^:]*: d51bdf23 msr amevtyper19_el0, x3
-[^:]*: d53bdf42 mrs x2, amevtyper110_el0
-[^:]*: d51bdf43 msr amevtyper110_el0, x3
-[^:]*: d53bdf62 mrs x2, amevtyper111_el0
-[^:]*: d51bdf63 msr amevtyper111_el0, x3
-[^:]*: d53bdf82 mrs x2, amevtyper112_el0
-[^:]*: d51bdf83 msr amevtyper112_el0, x3
-[^:]*: d53bdfa2 mrs x2, amevtyper113_el0
-[^:]*: d51bdfa3 msr amevtyper113_el0, x3
-[^:]*: d53bdfc2 mrs x2, amevtyper114_el0
-[^:]*: d51bdfc3 msr amevtyper114_el0, x3
-[^:]*: d53bdfe2 mrs x2, amevtyper115_el0
-[^:]*: d51bdfe3 msr amevtyper115_el0, x3
+[^:]*: d53bdc00 mrs x0, amevcntr10_el0
+[^:]*: d51bdc00 msr amevcntr10_el0, x0
+[^:]*: d53bdc20 mrs x0, amevcntr11_el0
+[^:]*: d51bdc20 msr amevcntr11_el0, x0
+[^:]*: d53bdc40 mrs x0, amevcntr12_el0
+[^:]*: d51bdc40 msr amevcntr12_el0, x0
+[^:]*: d53bdc60 mrs x0, amevcntr13_el0
+[^:]*: d51bdc60 msr amevcntr13_el0, x0
+[^:]*: d53bdc80 mrs x0, amevcntr14_el0
+[^:]*: d51bdc80 msr amevcntr14_el0, x0
+[^:]*: d53bdca0 mrs x0, amevcntr15_el0
+[^:]*: d51bdca0 msr amevcntr15_el0, x0
+[^:]*: d53bdcc0 mrs x0, amevcntr16_el0
+[^:]*: d51bdcc0 msr amevcntr16_el0, x0
+[^:]*: d53bdce0 mrs x0, amevcntr17_el0
+[^:]*: d51bdce0 msr amevcntr17_el0, x0
+[^:]*: d53bdd00 mrs x0, amevcntr18_el0
+[^:]*: d51bdd00 msr amevcntr18_el0, x0
+[^:]*: d53bdd20 mrs x0, amevcntr19_el0
+[^:]*: d51bdd20 msr amevcntr19_el0, x0
+[^:]*: d53bdd40 mrs x0, amevcntr110_el0
+[^:]*: d51bdd40 msr amevcntr110_el0, x0
+[^:]*: d53bdd60 mrs x0, amevcntr111_el0
+[^:]*: d51bdd60 msr amevcntr111_el0, x0
+[^:]*: d53bdd80 mrs x0, amevcntr112_el0
+[^:]*: d51bdd80 msr amevcntr112_el0, x0
+[^:]*: d53bdda0 mrs x0, amevcntr113_el0
+[^:]*: d51bdda0 msr amevcntr113_el0, x0
+[^:]*: d53bddc0 mrs x0, amevcntr114_el0
+[^:]*: d51bddc0 msr amevcntr114_el0, x0
+[^:]*: d53bdde0 mrs x0, amevcntr115_el0
+[^:]*: d51bdde0 msr amevcntr115_el0, x0
+[^:]*: d53bde00 mrs x0, amevtyper10_el0
+[^:]*: d51bde00 msr amevtyper10_el0, x0
+[^:]*: d53bde20 mrs x0, amevtyper11_el0
+[^:]*: d51bde20 msr amevtyper11_el0, x0
+[^:]*: d53bde40 mrs x0, amevtyper12_el0
+[^:]*: d51bde40 msr amevtyper12_el0, x0
+[^:]*: d53bde60 mrs x0, amevtyper13_el0
+[^:]*: d51bde60 msr amevtyper13_el0, x0
+[^:]*: d53bde80 mrs x0, amevtyper14_el0
+[^:]*: d51bde80 msr amevtyper14_el0, x0
+[^:]*: d53bdea0 mrs x0, amevtyper15_el0
+[^:]*: d51bdea0 msr amevtyper15_el0, x0
+[^:]*: d53bdec0 mrs x0, amevtyper16_el0
+[^:]*: d51bdec0 msr amevtyper16_el0, x0
+[^:]*: d53bdee0 mrs x0, amevtyper17_el0
+[^:]*: d51bdee0 msr amevtyper17_el0, x0
+[^:]*: d53bdf00 mrs x0, amevtyper18_el0
+[^:]*: d51bdf00 msr amevtyper18_el0, x0
+[^:]*: d53bdf20 mrs x0, amevtyper19_el0
+[^:]*: d51bdf20 msr amevtyper19_el0, x0
+[^:]*: d53bdf40 mrs x0, amevtyper110_el0
+[^:]*: d51bdf40 msr amevtyper110_el0, x0
+[^:]*: d53bdf60 mrs x0, amevtyper111_el0
+[^:]*: d51bdf60 msr amevtyper111_el0, x0
+[^:]*: d53bdf80 mrs x0, amevtyper112_el0
+[^:]*: d51bdf80 msr amevtyper112_el0, x0
+[^:]*: d53bdfa0 mrs x0, amevtyper113_el0
+[^:]*: d51bdfa0 msr amevtyper113_el0, x0
+[^:]*: d53bdfc0 mrs x0, amevtyper114_el0
+[^:]*: d51bdfc0 msr amevtyper114_el0, x0
+[^:]*: d53bdfe0 mrs x0, amevtyper115_el0
+[^:]*: d51bdfe0 msr amevtyper115_el0, x0
[^:]*: d53bd2c0 mrs x0, amcg1idr_el0
[^:]*: d53be0a0 mrs x0, cntpctss_el0
[^:]*: d53be0c0 mrs x0, cntvctss_el0
-[^:]*: d53c1182 mrs x2, hfgrtr_el2
-[^:]*: d51c1183 msr hfgrtr_el2, x3
-[^:]*: d53c11a2 mrs x2, hfgwtr_el2
-[^:]*: d51c11a3 msr hfgwtr_el2, x3
-[^:]*: d53c11c2 mrs x2, hfgitr_el2
-[^:]*: d51c11c3 msr hfgitr_el2, x3
-[^:]*: d53c3182 mrs x2, hdfgrtr_el2
-[^:]*: d51c3183 msr hdfgrtr_el2, x3
-[^:]*: d53c31a2 mrs x2, hdfgwtr_el2
-[^:]*: d51c31a3 msr hdfgwtr_el2, x3
-[^:]*: d53c31c2 mrs x2, hafgrtr_el2
-[^:]*: d51c31c3 msr hafgrtr_el2, x3
-[^:]*: d53cd802 mrs x2, amevcntvoff00_el2
-[^:]*: d51cd803 msr amevcntvoff00_el2, x3
-[^:]*: d53cd822 mrs x2, amevcntvoff01_el2
-[^:]*: d51cd823 msr amevcntvoff01_el2, x3
-[^:]*: d53cd842 mrs x2, amevcntvoff02_el2
-[^:]*: d51cd843 msr amevcntvoff02_el2, x3
-[^:]*: d53cd862 mrs x2, amevcntvoff03_el2
-[^:]*: d51cd863 msr amevcntvoff03_el2, x3
-[^:]*: d53cd882 mrs x2, amevcntvoff04_el2
-[^:]*: d51cd883 msr amevcntvoff04_el2, x3
-[^:]*: d53cd8a2 mrs x2, amevcntvoff05_el2
-[^:]*: d51cd8a3 msr amevcntvoff05_el2, x3
-[^:]*: d53cd8c2 mrs x2, amevcntvoff06_el2
-[^:]*: d51cd8c3 msr amevcntvoff06_el2, x3
-[^:]*: d53cd8e2 mrs x2, amevcntvoff07_el2
-[^:]*: d51cd8e3 msr amevcntvoff07_el2, x3
-[^:]*: d53cd902 mrs x2, amevcntvoff08_el2
-[^:]*: d51cd903 msr amevcntvoff08_el2, x3
-[^:]*: d53cd922 mrs x2, amevcntvoff09_el2
-[^:]*: d51cd923 msr amevcntvoff09_el2, x3
-[^:]*: d53cd942 mrs x2, amevcntvoff010_el2
-[^:]*: d51cd943 msr amevcntvoff010_el2, x3
-[^:]*: d53cd962 mrs x2, amevcntvoff011_el2
-[^:]*: d51cd963 msr amevcntvoff011_el2, x3
-[^:]*: d53cd982 mrs x2, amevcntvoff012_el2
-[^:]*: d51cd983 msr amevcntvoff012_el2, x3
-[^:]*: d53cd9a2 mrs x2, amevcntvoff013_el2
-[^:]*: d51cd9a3 msr amevcntvoff013_el2, x3
-[^:]*: d53cd9c2 mrs x2, amevcntvoff014_el2
-[^:]*: d51cd9c3 msr amevcntvoff014_el2, x3
-[^:]*: d53cd9e2 mrs x2, amevcntvoff015_el2
-[^:]*: d51cd9e3 msr amevcntvoff015_el2, x3
-[^:]*: d53cda02 mrs x2, amevcntvoff10_el2
-[^:]*: d51cda03 msr amevcntvoff10_el2, x3
-[^:]*: d53cda22 mrs x2, amevcntvoff11_el2
-[^:]*: d51cda23 msr amevcntvoff11_el2, x3
-[^:]*: d53cda42 mrs x2, amevcntvoff12_el2
-[^:]*: d51cda43 msr amevcntvoff12_el2, x3
-[^:]*: d53cda62 mrs x2, amevcntvoff13_el2
-[^:]*: d51cda63 msr amevcntvoff13_el2, x3
-[^:]*: d53cda82 mrs x2, amevcntvoff14_el2
-[^:]*: d51cda83 msr amevcntvoff14_el2, x3
-[^:]*: d53cdaa2 mrs x2, amevcntvoff15_el2
-[^:]*: d51cdaa3 msr amevcntvoff15_el2, x3
-[^:]*: d53cdac2 mrs x2, amevcntvoff16_el2
-[^:]*: d51cdac3 msr amevcntvoff16_el2, x3
-[^:]*: d53cdae2 mrs x2, amevcntvoff17_el2
-[^:]*: d51cdae3 msr amevcntvoff17_el2, x3
-[^:]*: d53cdb02 mrs x2, amevcntvoff18_el2
-[^:]*: d51cdb03 msr amevcntvoff18_el2, x3
-[^:]*: d53cdb22 mrs x2, amevcntvoff19_el2
-[^:]*: d51cdb23 msr amevcntvoff19_el2, x3
-[^:]*: d53cdb42 mrs x2, amevcntvoff110_el2
-[^:]*: d51cdb43 msr amevcntvoff110_el2, x3
-[^:]*: d53cdb62 mrs x2, amevcntvoff111_el2
-[^:]*: d51cdb63 msr amevcntvoff111_el2, x3
-[^:]*: d53cdb82 mrs x2, amevcntvoff112_el2
-[^:]*: d51cdb83 msr amevcntvoff112_el2, x3
-[^:]*: d53cdba2 mrs x2, amevcntvoff113_el2
-[^:]*: d51cdba3 msr amevcntvoff113_el2, x3
-[^:]*: d53cdbc2 mrs x2, amevcntvoff114_el2
-[^:]*: d51cdbc3 msr amevcntvoff114_el2, x3
-[^:]*: d53cdbe2 mrs x2, amevcntvoff115_el2
-[^:]*: d51cdbe3 msr amevcntvoff115_el2, x3
-[^:]*: d53ce0c2 mrs x2, cntpoff_el2
-[^:]*: d51ce0c3 msr cntpoff_el2, x3
-[^:]*: d5389922 mrs x2, pmsnevfr_el1
-[^:]*: d5189923 msr pmsnevfr_el1, x3
-[^:]*: d53c1242 mrs x2, hcrx_el2
-[^:]*: d51c1243 msr hcrx_el2, x3
-[^:]*: d538d0c2 mrs x2, rcwmask_el1
-[^:]*: d518d0c3 msr rcwmask_el1, x3
-[^:]*: d538d062 mrs x2, rcwsmask_el1
-[^:]*: d518d063 msr rcwsmask_el1, x3
+[^:]*: d53c1180 mrs x0, hfgrtr_el2
+[^:]*: d51c1180 msr hfgrtr_el2, x0
+[^:]*: d53c11a0 mrs x0, hfgwtr_el2
+[^:]*: d51c11a0 msr hfgwtr_el2, x0
+[^:]*: d53c11c0 mrs x0, hfgitr_el2
+[^:]*: d51c11c0 msr hfgitr_el2, x0
+[^:]*: d53c3180 mrs x0, hdfgrtr_el2
+[^:]*: d51c3180 msr hdfgrtr_el2, x0
+[^:]*: d53c31a0 mrs x0, hdfgwtr_el2
+[^:]*: d51c31a0 msr hdfgwtr_el2, x0
+[^:]*: d53c31c0 mrs x0, hafgrtr_el2
+[^:]*: d51c31c0 msr hafgrtr_el2, x0
+[^:]*: d53cd800 mrs x0, amevcntvoff00_el2
+[^:]*: d51cd800 msr amevcntvoff00_el2, x0
+[^:]*: d53cd820 mrs x0, amevcntvoff01_el2
+[^:]*: d51cd820 msr amevcntvoff01_el2, x0
+[^:]*: d53cd840 mrs x0, amevcntvoff02_el2
+[^:]*: d51cd840 msr amevcntvoff02_el2, x0
+[^:]*: d53cd860 mrs x0, amevcntvoff03_el2
+[^:]*: d51cd860 msr amevcntvoff03_el2, x0
+[^:]*: d53cd880 mrs x0, amevcntvoff04_el2
+[^:]*: d51cd880 msr amevcntvoff04_el2, x0
+[^:]*: d53cd8a0 mrs x0, amevcntvoff05_el2
+[^:]*: d51cd8a0 msr amevcntvoff05_el2, x0
+[^:]*: d53cd8c0 mrs x0, amevcntvoff06_el2
+[^:]*: d51cd8c0 msr amevcntvoff06_el2, x0
+[^:]*: d53cd8e0 mrs x0, amevcntvoff07_el2
+[^:]*: d51cd8e0 msr amevcntvoff07_el2, x0
+[^:]*: d53cd900 mrs x0, amevcntvoff08_el2
+[^:]*: d51cd900 msr amevcntvoff08_el2, x0
+[^:]*: d53cd920 mrs x0, amevcntvoff09_el2
+[^:]*: d51cd920 msr amevcntvoff09_el2, x0
+[^:]*: d53cd940 mrs x0, amevcntvoff010_el2
+[^:]*: d51cd940 msr amevcntvoff010_el2, x0
+[^:]*: d53cd960 mrs x0, amevcntvoff011_el2
+[^:]*: d51cd960 msr amevcntvoff011_el2, x0
+[^:]*: d53cd980 mrs x0, amevcntvoff012_el2
+[^:]*: d51cd980 msr amevcntvoff012_el2, x0
+[^:]*: d53cd9a0 mrs x0, amevcntvoff013_el2
+[^:]*: d51cd9a0 msr amevcntvoff013_el2, x0
+[^:]*: d53cd9c0 mrs x0, amevcntvoff014_el2
+[^:]*: d51cd9c0 msr amevcntvoff014_el2, x0
+[^:]*: d53cd9e0 mrs x0, amevcntvoff015_el2
+[^:]*: d51cd9e0 msr amevcntvoff015_el2, x0
+[^:]*: d53cda00 mrs x0, amevcntvoff10_el2
+[^:]*: d51cda00 msr amevcntvoff10_el2, x0
+[^:]*: d53cda20 mrs x0, amevcntvoff11_el2
+[^:]*: d51cda20 msr amevcntvoff11_el2, x0
+[^:]*: d53cda40 mrs x0, amevcntvoff12_el2
+[^:]*: d51cda40 msr amevcntvoff12_el2, x0
+[^:]*: d53cda60 mrs x0, amevcntvoff13_el2
+[^:]*: d51cda60 msr amevcntvoff13_el2, x0
+[^:]*: d53cda80 mrs x0, amevcntvoff14_el2
+[^:]*: d51cda80 msr amevcntvoff14_el2, x0
+[^:]*: d53cdaa0 mrs x0, amevcntvoff15_el2
+[^:]*: d51cdaa0 msr amevcntvoff15_el2, x0
+[^:]*: d53cdac0 mrs x0, amevcntvoff16_el2
+[^:]*: d51cdac0 msr amevcntvoff16_el2, x0
+[^:]*: d53cdae0 mrs x0, amevcntvoff17_el2
+[^:]*: d51cdae0 msr amevcntvoff17_el2, x0
+[^:]*: d53cdb00 mrs x0, amevcntvoff18_el2
+[^:]*: d51cdb00 msr amevcntvoff18_el2, x0
+[^:]*: d53cdb20 mrs x0, amevcntvoff19_el2
+[^:]*: d51cdb20 msr amevcntvoff19_el2, x0
+[^:]*: d53cdb40 mrs x0, amevcntvoff110_el2
+[^:]*: d51cdb40 msr amevcntvoff110_el2, x0
+[^:]*: d53cdb60 mrs x0, amevcntvoff111_el2
+[^:]*: d51cdb60 msr amevcntvoff111_el2, x0
+[^:]*: d53cdb80 mrs x0, amevcntvoff112_el2
+[^:]*: d51cdb80 msr amevcntvoff112_el2, x0
+[^:]*: d53cdba0 mrs x0, amevcntvoff113_el2
+[^:]*: d51cdba0 msr amevcntvoff113_el2, x0
+[^:]*: d53cdbc0 mrs x0, amevcntvoff114_el2
+[^:]*: d51cdbc0 msr amevcntvoff114_el2, x0
+[^:]*: d53cdbe0 mrs x0, amevcntvoff115_el2
+[^:]*: d51cdbe0 msr amevcntvoff115_el2, x0
+[^:]*: d53ce0c0 mrs x0, cntpoff_el2
+[^:]*: d51ce0c0 msr cntpoff_el2, x0
+[^:]*: d5389920 mrs x0, pmsnevfr_el1
+[^:]*: d5189920 msr pmsnevfr_el1, x0
+[^:]*: d53c1240 mrs x0, hcrx_el2
+[^:]*: d51c1240 msr hcrx_el2, x0
+[^:]*: d538d0c0 mrs x0, rcwmask_el1
+[^:]*: d518d0c0 msr rcwmask_el1, x0
+[^:]*: d538d060 mrs x0, rcwsmask_el1
+[^:]*: d518d060 msr rcwsmask_el1, x0
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
index 21daa8c8c65..bf555d23b82 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s
@@ -3,12 +3,12 @@
.endm
.macro woreg, name
- msr \name, x1
+ msr \name, x0
.endm
.macro rwreg, name
- mrs x2, \name
- msr \name, x3
+ mrs x0, \name
+ msr \name, x0
.endm
roreg id_dfr1_el1
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.d b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
index 8c9f7ca14d1..cb895c64503 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d
@@ -7,22 +7,22 @@ Disassembly of section \.text:
0+ <\.text>:
[^:]*: d5787402 mrrs x2, x3, par_el1
-[^:]*: d5587404 msrr par_el1, x4, x5
+[^:]*: d5587402 msrr par_el1, x2, x3
[^:]*: d578d0c2 mrrs x2, x3, rcwmask_el1
-[^:]*: d558d0c4 msrr rcwmask_el1, x4, x5
+[^:]*: d558d0c2 msrr rcwmask_el1, x2, x3
[^:]*: d578d062 mrrs x2, x3, rcwsmask_el1
-[^:]*: d558d064 msrr rcwsmask_el1, x4, x5
+[^:]*: d558d062 msrr rcwsmask_el1, x2, x3
[^:]*: d5782002 mrrs x2, x3, ttbr0_el1
-[^:]*: d5582004 msrr ttbr0_el1, x4, x5
+[^:]*: d5582002 msrr ttbr0_el1, x2, x3
[^:]*: d57d2002 mrrs x2, x3, ttbr0_el12
-[^:]*: d55d2004 msrr ttbr0_el12, x4, x5
+[^:]*: d55d2002 msrr ttbr0_el12, x2, x3
[^:]*: d57c2002 mrrs x2, x3, ttbr0_el2
-[^:]*: d55c2004 msrr ttbr0_el2, x4, x5
+[^:]*: d55c2002 msrr ttbr0_el2, x2, x3
[^:]*: d5782022 mrrs x2, x3, ttbr1_el1
-[^:]*: d5582024 msrr ttbr1_el1, x4, x5
+[^:]*: d5582022 msrr ttbr1_el1, x2, x3
[^:]*: d57d2022 mrrs x2, x3, ttbr1_el12
-[^:]*: d55d2024 msrr ttbr1_el12, x4, x5
+[^:]*: d55d2022 msrr ttbr1_el12, x2, x3
[^:]*: d57c2022 mrrs x2, x3, ttbr1_el2
-[^:]*: d55c2024 msrr ttbr1_el2, x4, x5
+[^:]*: d55c2022 msrr ttbr1_el2, x2, x3
[^:]*: d57c2102 mrrs x2, x3, vttbr_el2
-[^:]*: d55c2104 msrr vttbr_el2, x4, x5
\ No newline at end of file
+[^:]*: d55c2102 msrr vttbr_el2, x2, x3
\ No newline at end of file
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.s b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
index 4093315973d..09c9dace9b5 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s
@@ -2,7 +2,7 @@
.macro rwreg128, name
mrrs x2, x3, \name
- msrr \name, x4, x5
+ msrr \name, x2, x3
.endm
rwreg128 par_el1
next prev parent reply other threads:[~2024-02-27 11:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-27 10:59 [PATCH v1 0/4][Binutils] aarch64: testsuite: refactoring of some tests to share test macros Matthieu Longo
2024-02-27 10:59 ` [PATCH v1 1/4] aarch64: testsuite: replace instruction addresses by regex Matthieu Longo
2024-05-10 10:34 ` Richard Earnshaw (lists)
2024-02-27 10:59 ` Matthieu Longo [this message]
2024-05-10 10:37 ` [PATCH v1 2/4] aarch64: testsuite: use same regs for read and write tests Richard Earnshaw (lists)
2024-02-27 10:59 ` [PATCH v1 3/4] aarch64: testsuite: reorder write and read to match macro order Matthieu Longo
2024-05-10 10:40 ` Richard Earnshaw (lists)
2024-02-27 10:59 ` [PATCH v1 4/4] aarch64: testsuite: share test utils macros and use them Matthieu Longo
2024-02-27 16:31 ` Andrew Carlotti
2024-03-01 10:10 ` Matthieu Longo
2024-03-04 14:43 ` Andrew Carlotti
2024-05-10 10:34 ` Richard Earnshaw (lists)
2024-05-10 10:42 ` Richard Earnshaw (lists)
2024-04-24 10:48 ` [PATCH v1 0/4][Binutils] aarch64: testsuite: refactoring of some tests to share test macros Matthieu Longo
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