From: Matthieu Longo <matthieu.longo@arm.com>
To: binutils@sourceware.org
Cc: Richard Earnshaw <richard.earnshaw@arm.com>,
Nick Clifton <nickc@redhat.com>,
Matthieu Longo <matthieu.longo@arm.com>
Subject: [PATCH v1 1/4] aarch64: testsuite: replace instruction addresses by regex
Date: Tue, 27 Feb 2024 10:59:14 +0000 [thread overview]
Message-ID: <20240227105917.295899-2-matthieu.longo@arm.com> (raw)
In-Reply-To: <20240227105917.295899-1-matthieu.longo@arm.com>
[-- Attachment #1: Type: text/plain, Size: 383 bytes --]
This patch removes the instruction addresses from the objdump's expected
output (.d files). The intended benefit from this clean-up is to allow to
swap lines around more easilly, and removes the noise of patches that add,
remove or reorder instructions.
---
gas/testsuite/gas/aarch64/sysreg/sysreg.d | 56 +++++++++++------------
1 file changed, 28 insertions(+), 28 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: v1-0001-aarch64-testsuite-replace-instruction-addresses-b.patch --]
[-- Type: text/x-patch; name="v1-0001-aarch64-testsuite-replace-instruction-addresses-b.patch", Size: 2387 bytes --]
diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sysreg.d
index d10175837f2..90b5be3cabf 100644
--- a/gas/testsuite/gas/aarch64/sysreg/sysreg.d
+++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.d
@@ -5,31 +5,31 @@
Disassembly of section \.text:
0+ <.*>:
- 0: d51b9c67 msr pmovsclr_el0, x7
- 4: d53b9c60 mrs x0, pmovsclr_el0
- 8: d51b9e67 msr pmovsset_el0, x7
- c: d53b9e60 mrs x0, pmovsset_el0
- 10: d5380140 mrs x0, id_dfr0_el1
- 14: d5380100 mrs x0, id_pfr0_el1
- 18: d5380120 mrs x0, id_pfr1_el1
- 1c: d5380160 mrs x0, id_afr0_el1
- 20: d5380180 mrs x0, id_mmfr0_el1
- 24: d53801a0 mrs x0, id_mmfr1_el1
- 28: d53801c0 mrs x0, id_mmfr2_el1
- 2c: d53801e0 mrs x0, id_mmfr3_el1
- 30: d53802c0 mrs x0, id_mmfr4_el1
- 34: d5380200 mrs x0, id_isar0_el1
- 38: d5380220 mrs x0, id_isar1_el1
- 3c: d5380240 mrs x0, id_isar2_el1
- 40: d5380260 mrs x0, id_isar3_el1
- 44: d5380280 mrs x0, id_isar4_el1
- 48: d53802a0 mrs x0, id_isar5_el1
- 4c: d538cf00 mrs x0, s3_0_c12_c15_0
- 50: d5384b00 mrs x0, s3_0_c4_c11_0
- 54: d5184b00 msr s3_0_c4_c11_0, x0
- 58: d5310300 mrs x0, trcstatr
- 5c: d5110300 msr trcstatr, x0
- 60: d5380640 mrs x0, id_aa64isar2_el1
- 64: d538065e mrs x30, id_aa64isar2_el1
- 68: d5380660 mrs x0, id_aa64isar3_el1
- 6c: d538067e mrs x30, id_aa64isar3_el1
+.*: d51b9c67 msr pmovsclr_el0, x7
+.*: d53b9c60 mrs x0, pmovsclr_el0
+.*: d51b9e67 msr pmovsset_el0, x7
+.*: d53b9e60 mrs x0, pmovsset_el0
+.*: d5380140 mrs x0, id_dfr0_el1
+.*: d5380100 mrs x0, id_pfr0_el1
+.*: d5380120 mrs x0, id_pfr1_el1
+.*: d5380160 mrs x0, id_afr0_el1
+.*: d5380180 mrs x0, id_mmfr0_el1
+.*: d53801a0 mrs x0, id_mmfr1_el1
+.*: d53801c0 mrs x0, id_mmfr2_el1
+.*: d53801e0 mrs x0, id_mmfr3_el1
+.*: d53802c0 mrs x0, id_mmfr4_el1
+.*: d5380200 mrs x0, id_isar0_el1
+.*: d5380220 mrs x0, id_isar1_el1
+.*: d5380240 mrs x0, id_isar2_el1
+.*: d5380260 mrs x0, id_isar3_el1
+.*: d5380280 mrs x0, id_isar4_el1
+.*: d53802a0 mrs x0, id_isar5_el1
+.*: d538cf00 mrs x0, s3_0_c12_c15_0
+.*: d5384b00 mrs x0, s3_0_c4_c11_0
+.*: d5184b00 msr s3_0_c4_c11_0, x0
+.*: d5310300 mrs x0, trcstatr
+.*: d5110300 msr trcstatr, x0
+.*: d5380640 mrs x0, id_aa64isar2_el1
+.*: d538065e mrs x30, id_aa64isar2_el1
+.*: d5380660 mrs x0, id_aa64isar3_el1
+.*: d538067e mrs x30, id_aa64isar3_el1
next prev parent reply other threads:[~2024-02-27 11:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-27 10:59 [PATCH v1 0/4][Binutils] aarch64: testsuite: refactoring of some tests to share test macros Matthieu Longo
2024-02-27 10:59 ` Matthieu Longo [this message]
2024-05-10 10:34 ` [PATCH v1 1/4] aarch64: testsuite: replace instruction addresses by regex Richard Earnshaw (lists)
2024-02-27 10:59 ` [PATCH v1 2/4] aarch64: testsuite: use same regs for read and write tests Matthieu Longo
2024-05-10 10:37 ` Richard Earnshaw (lists)
2024-02-27 10:59 ` [PATCH v1 3/4] aarch64: testsuite: reorder write and read to match macro order Matthieu Longo
2024-05-10 10:40 ` Richard Earnshaw (lists)
2024-02-27 10:59 ` [PATCH v1 4/4] aarch64: testsuite: share test utils macros and use them Matthieu Longo
2024-02-27 16:31 ` Andrew Carlotti
2024-03-01 10:10 ` Matthieu Longo
2024-03-04 14:43 ` Andrew Carlotti
2024-05-10 10:34 ` Richard Earnshaw (lists)
2024-05-10 10:42 ` Richard Earnshaw (lists)
2024-04-24 10:48 ` [PATCH v1 0/4][Binutils] aarch64: testsuite: refactoring of some tests to share test macros Matthieu Longo
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