From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Nelson Chu <nelson@rivosinc.com>
Subject: [PATCH 3/3] RISC-V: prefer FSRM/FSFLAGS aliases for FSRMI/FSFLAGSI
Date: Fri, 13 Jan 2023 11:20:23 +0100 [thread overview]
Message-ID: <448243b9-8134-f981-8e66-635790d4e680@suse.com> (raw)
In-Reply-To: <678b275f-1930-4a59-dfba-fe21cd548fca@suse.com>
While not spelled out by the spec, gas has been supporting these
i-suffixed aliases almost forever. However, unlike other insns with
immediate operands, i-suffix-less aliases were missing. Add such,
paralleling in particular CSR*I having CSR* aliases.
--- a/gas/testsuite/gas/riscv/csr-insns-pseudo.d
+++ b/gas/testsuite/gas/riscv/csr-insns-pseudo.d
@@ -27,10 +27,10 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+002022f3[ ]+frrm[ ]+t0
[ ]+[0-9a-f]+:[ ]+002312f3[ ]+fsrm[ ]+t0,t1
[ ]+[0-9a-f]+:[ ]+00231073[ ]+fsrm[ ]+t1
-[ ]+[0-9a-f]+:[ ]+002fd2f3[ ]+fsrmi[ ]+t0,31
-[ ]+[0-9a-f]+:[ ]+002fd073[ ]+fsrmi[ ]+zero,31
+[ ]+[0-9a-f]+:[ ]+002fd2f3[ ]+fsrm[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+002fd073[ ]+fsrm[ ]+zero,31
[ ]+[0-9a-f]+:[ ]+001022f3[ ]+frflags[ ]+t0
[ ]+[0-9a-f]+:[ ]+001312f3[ ]+fsflags[ ]+t0,t1
[ ]+[0-9a-f]+:[ ]+00131073[ ]+fsflags[ ]+t1
-[ ]+[0-9a-f]+:[ ]+001fd2f3[ ]+fsflagsi[ ]+t0,31
-[ ]+[0-9a-f]+:[ ]+001fd073[ ]+fsflagsi[ ]+zero,31
+[ ]+[0-9a-f]+:[ ]+001fd2f3[ ]+fsflags[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+001fd073[ ]+fsflags[ ]+zero,31
--- a/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d
+++ b/gas/testsuite/gas/riscv/csr-insns-pseudo-zfinx.d
@@ -27,10 +27,10 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+002022f3[ ]+frrm[ ]+t0
[ ]+[0-9a-f]+:[ ]+002312f3[ ]+fsrm[ ]+t0,t1
[ ]+[0-9a-f]+:[ ]+00231073[ ]+fsrm[ ]+t1
-[ ]+[0-9a-f]+:[ ]+002fd2f3[ ]+fsrmi[ ]+t0,31
-[ ]+[0-9a-f]+:[ ]+002fd073[ ]+fsrmi[ ]+zero,31
+[ ]+[0-9a-f]+:[ ]+002fd2f3[ ]+fsrm[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+002fd073[ ]+fsrm[ ]+zero,31
[ ]+[0-9a-f]+:[ ]+001022f3[ ]+frflags[ ]+t0
[ ]+[0-9a-f]+:[ ]+001312f3[ ]+fsflags[ ]+t0,t1
[ ]+[0-9a-f]+:[ ]+00131073[ ]+fsflags[ ]+t1
-[ ]+[0-9a-f]+:[ ]+001fd2f3[ ]+fsflagsi[ ]+t0,31
-[ ]+[0-9a-f]+:[ ]+001fd073[ ]+fsflagsi[ ]+zero,31
+[ ]+[0-9a-f]+:[ ]+001fd2f3[ ]+fsflags[ ]+t0,31
+[ ]+[0-9a-f]+:[ ]+001fd073[ ]+fsflags[ ]+zero,31
--- a/gas/testsuite/gas/riscv/fsxxi.d
+++ b/gas/testsuite/gas/riscv/fsxxi.d
@@ -7,7 +7,7 @@
Disassembly of section .text:
0+000 <.text>:
-[ ]+0:[ ]+002fd573[ ]+fsrmi[ ]+a0,31
-[ ]+4:[ ]+002f5073[ ]+fsrmi[ ]+zero,30
-[ ]+8:[ ]+001ed773[ ]+fsflagsi[ ]+a4,29
-[ ]+c:[ ]+001e5073[ ]+fsflagsi[ ]+zero,28
+[ ]+0:[ ]+002fd573[ ]+fsrm[ ]+a0,31
+[ ]+4:[ ]+002f5073[ ]+fsrm[ ]+zero,30
+[ ]+8:[ ]+001ed773[ ]+fsflags[ ]+a4,29
+[ ]+c:[ ]+001e5073[ ]+fsflags[ ]+zero,28
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -693,11 +693,15 @@ const struct riscv_opcode riscv_opcodes[
{"frrm", 0, INSN_CLASS_F_INX, "d", MATCH_FRRM, MASK_FRRM, match_opcode, INSN_ALIAS },
{"fsrm", 0, INSN_CLASS_F_INX, "s", MATCH_FSRM, MASK_FSRM|MASK_RD, match_opcode, INSN_ALIAS },
{"fsrm", 0, INSN_CLASS_F_INX, "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, INSN_ALIAS },
+{"fsrm", 0, INSN_CLASS_F_INX, "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, INSN_ALIAS },
+{"fsrm", 0, INSN_CLASS_F_INX, "Z", MATCH_FSRMI, MASK_FSRMI|MASK_RD, match_opcode, INSN_ALIAS },
{"fsrmi", 0, INSN_CLASS_F_INX, "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, INSN_ALIAS },
{"fsrmi", 0, INSN_CLASS_F_INX, "Z", MATCH_FSRMI, MASK_FSRMI|MASK_RD, match_opcode, INSN_ALIAS },
{"frflags", 0, INSN_CLASS_F_INX, "d", MATCH_FRFLAGS, MASK_FRFLAGS, match_opcode, INSN_ALIAS },
{"fsflags", 0, INSN_CLASS_F_INX, "s", MATCH_FSFLAGS, MASK_FSFLAGS|MASK_RD, match_opcode, INSN_ALIAS },
{"fsflags", 0, INSN_CLASS_F_INX, "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, INSN_ALIAS },
+{"fsflags", 0, INSN_CLASS_F_INX, "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, INSN_ALIAS },
+{"fsflags", 0, INSN_CLASS_F_INX, "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI|MASK_RD, match_opcode, INSN_ALIAS },
{"fsflagsi", 0, INSN_CLASS_F_INX, "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, INSN_ALIAS },
{"fsflagsi", 0, INSN_CLASS_F_INX, "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI|MASK_RD, match_opcode, INSN_ALIAS },
{"flw", 32, INSN_CLASS_F_AND_C, "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, INSN_ALIAS|INSN_DREF|INSN_4_BYTE },
prev parent reply other threads:[~2023-01-13 10:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-13 10:18 [PATCH 0/3] RISC-V: further alias insn handling adjustments Jan Beulich
2023-01-13 10:19 ` [PATCH 1/3] RISC-V: prefer SLT{,U} aliases for SLTI{,U} Jan Beulich
2023-01-15 4:35 ` Maciej W. Rozycki
2023-01-16 7:46 ` Jan Beulich
2023-01-25 0:42 ` Maciej W. Rozycki
2023-01-25 15:02 ` Jan Beulich
2023-01-25 15:22 ` Maciej W. Rozycki
2023-01-26 1:29 ` Andrew Waterman
2023-01-26 9:35 ` Jan Beulich
2023-01-26 22:20 ` Andrew Waterman
2023-01-26 9:41 ` Jan Beulich
2023-01-26 23:27 ` Maciej W. Rozycki
2023-01-13 10:19 ` [PATCH 2/3] RISC-V: move OR and XOR aliases down Jan Beulich
2023-01-20 9:23 ` Ping: " Jan Beulich
2023-02-14 7:26 ` Jan Beulich
2023-01-13 10:20 ` Jan Beulich [this message]
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