Re: [PATCH 1/3] RISC-V: prefer SLT{,U} aliases for SLTI{,U}

[Jan Beulich <jbeulich@suse.com>]

On 25.01.2023 01:42, Maciej W. Rozycki wrote:
> On Mon, 16 Jan 2023, Jan Beulich wrote:
> 
>>>  I think this is going backwards.  Aliases are used in disassembly to 
>>> improve readability, e.g. to show `nop', rather than `c.addi zero,0' which 
>>> would make anyone scratch their head, at least initially.
>>>
>>>  In this case there's no improvement, but obfuscation, as you're losing 
>>> the clear distinction between the register and the immediate instructions 
>>> and one will have to examine the operands to spot the difference.
>>
>> I can see this as a way to look at things, but then there need to be
>> changes in the other direction (after all patches 1 and 3 here merely
>> follow existing practice). Plus, perhaps more importantly, if you
>> don't strictly prefer aliases over "real" insns, then first of all it
>> needs establishing (and writing down) where to draw the boundary.
>>
>> My view is that the "i" in the name is needlessly distinguishing the
>> mnemonics from their non-immediate counterparts (i.e. I view
>> "improvement" vs "obfuscation the other way around"). I'm surely
>> biased from architectures like x86, IA-64, or Arm, where mnemonic
>> names don't try to duplicate what's expressed by operands. Much like
>> you ...
> 
>  This is however what these instructions have been named in the ISA and 
> the assembly dialect.  In the case of NOP, MOVE, etc. mnemonics they are 
> significant assembly idioms (usually mentioned in the ISA manual) and 
> there are sometimes thousands of alternative encodings that could be used 
> to effect the same operation, but only the chosen canonical encoding is 
> disassembled this way.

Aren't you changing topics? Being able to use alternative encodings to
achieve the same effect isn't what we were talking about.

>>>  The alternative mnemonic forms for immediate machine instructions are 
>>> there (NB pinched from the MIPS assembly dialect) to make it easier for 
>>> people to write handcoded assembly, especially where macros are involved, 
>>> either GAS or C preprocessor ones, and not for disassembly.  Conceptually 
>>> they're assembly macros that expand to a single instruction rather than 
>>> aliases.  IOW it's not a bug that those are not considered aliases for 
>>> disassembly.
>>
>> ... may be biased by your MIPS experience.
> 
>  It's rather how the assembly language has been designed (FWIW the RISC-V 
> ISA and assembly dialect have been largely inspired by the MIPS approach).  

Well, such a design imo ought to include a clear statement on uses of
aliases. Iirc at least the 32-bit Arm ARM is very precise about what
aliases exist, and it effectively mandates for at least some of them
that they should be use in disassembly.

As said before, I'd be happy to see things move in about any direction,
just as long as the result is consistent and hence observable behavior
is predictable for users of the assembler and disassembler.

> NB the POWER ISA also uses different mnemonics in its assembly dialect for 
> immediate ALU ("i") or indexed memory ("x") machine operations vs their 
> register or displacement variants.

Of course, as they're permitting plain numbers to represent register
operands.

Jan