From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Nelson Chu <nelson@rivosinc.com>
Subject: Re: [PATCH 1/3] RISC-V: prefer SLT{,U} aliases for SLTI{,U}
Date: Wed, 25 Jan 2023 15:22:40 +0000 (GMT) [thread overview]
Message-ID: <alpine.DEB.2.21.2301251513450.8022@angie.orcam.me.uk> (raw)
In-Reply-To: <54e213db-3268-e7b5-6f11-09dc14a1a49e@suse.com>
On Wed, 25 Jan 2023, Jan Beulich wrote:
> > This is however what these instructions have been named in the ISA and
> > the assembly dialect. In the case of NOP, MOVE, etc. mnemonics they are
> > significant assembly idioms (usually mentioned in the ISA manual) and
> > there are sometimes thousands of alternative encodings that could be used
> > to effect the same operation, but only the chosen canonical encoding is
> > disassembled this way.
>
> Aren't you changing topics? Being able to use alternative encodings to
> achieve the same effect isn't what we were talking about.
No, it just gives you background as to why some encodings are given
canonical aliases (used for disassembly) and why some are not.
> > It's rather how the assembly language has been designed (FWIW the RISC-V
> > ISA and assembly dialect have been largely inspired by the MIPS approach).
>
> Well, such a design imo ought to include a clear statement on uses of
> aliases. Iirc at least the 32-bit Arm ARM is very precise about what
> aliases exist, and it effectively mandates for at least some of them
> that they should be use in disassembly.
>
> As said before, I'd be happy to see things move in about any direction,
> just as long as the result is consistent and hence observable behavior
> is predictable for users of the assembler and disassembler.
It's been consistent so far AFAICT for the RISC-V assembly dialect (and
for that matter for the MIPS one as well). If you disagree, then you're
welcome to present your view, but I think the context of libopcodes and
the binutils mailing list is not the correct place to discuss the assembly
language syntax. You'd need to take it to the RISC-V ISA maintainters and
then we can implement whatever they've agreed to.
Maciej
next prev parent reply other threads:[~2023-01-25 15:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-13 10:18 [PATCH 0/3] RISC-V: further alias insn handling adjustments Jan Beulich
2023-01-13 10:19 ` [PATCH 1/3] RISC-V: prefer SLT{,U} aliases for SLTI{,U} Jan Beulich
2023-01-15 4:35 ` Maciej W. Rozycki
2023-01-16 7:46 ` Jan Beulich
2023-01-25 0:42 ` Maciej W. Rozycki
2023-01-25 15:02 ` Jan Beulich
2023-01-25 15:22 ` Maciej W. Rozycki [this message]
2023-01-26 1:29 ` Andrew Waterman
2023-01-26 9:35 ` Jan Beulich
2023-01-26 22:20 ` Andrew Waterman
2023-01-26 9:41 ` Jan Beulich
2023-01-26 23:27 ` Maciej W. Rozycki
2023-01-13 10:19 ` [PATCH 2/3] RISC-V: move OR and XOR aliases down Jan Beulich
2023-01-20 9:23 ` Ping: " Jan Beulich
2023-02-14 7:26 ` Jan Beulich
2023-01-13 10:20 ` [PATCH 3/3] RISC-V: prefer FSRM/FSFLAGS aliases for FSRMI/FSFLAGSI Jan Beulich
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