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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Andrew Burgess <aburgess@redhat.com>,
	Mike Frysinger <vapier@gentoo.org>,
	Nick Clifton <nickc@redhat.com>
Cc: binutils@sourceware.org
Subject: [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU
Date: Thu, 20 Oct 2022 09:25:50 +0000	[thread overview]
Message-ID: <65223c79fdfd7faf132275415cd9da9852c5bec3.1666257885.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1666257885.git.research_trasio@irq.a4lg.com>

GCC / Clang generate a warning if a variable may be used uninitialized on
some cases (Clang: "-Wsometimes-uninitialized").  When the program is being
built by Clang with the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

Those error occur on sim/cris/semcrisv{10,32}f-switch.c but they are
CGEN-generated files.  The real cause of this problem is in cpu/cris.cpu
which does not initialize certain variables.

This commit ensures such variables are initialized to zero by default.
Note that this commit itself does not regenerate CRIS CPU related files
with CGEN because it still has several issues preventing regeneration.
They are to be fixed in the later commits.

cpu/ChangeLog:

	* cris.cpu: Initialize condres, newval and tmpres variables.
---
 cpu/cris.cpu | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 97b44581e78..cd85f4e94e2 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -541,6 +541,7 @@
   (sequence
     BI
     ((SI tmpcond) (BI condres))
+    (set condres 0)
     (set tmpcond condno)
      (.splice
       cond
@@ -2655,6 +2656,7 @@
      (sequence
        ((SI rno) (SI newval))
        (set rno (regno Pd))
+       (set newval 0)
        (.splice
 	cond
 	; No sanity check for constant special register here, since the
@@ -3698,6 +3700,7 @@
   (sequence
     SI
     ((SI tmpcode) (SI tmpval) (SI tmpres))
+    (set tmpres 0)
     (set tmpcode swapcode)
     (set tmpval val)
     (.splice
-- 
2.34.1


  parent reply	other threads:[~2022-10-20  9:27 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-20  9:25 [PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) Tsukasa OI
2022-10-20  9:25 ` [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib Tsukasa OI
2022-10-20  9:25 ` [PATCH 02/40] sim: Check known getrusage declaration existence Tsukasa OI
2022-10-20  9:25 ` [PATCH 03/40] sim/aarch64: Remove unused functions Tsukasa OI
2022-10-20  9:25 ` Tsukasa OI [this message]
2022-10-22  1:59   ` [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 Tsukasa OI
2022-10-22  1:44   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 06/40] sim/cris: Move declarations of f_specific_init Tsukasa OI
2022-10-22  1:46   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 07/40] sim/cris: Regenerate with CGEN Tsukasa OI
2022-10-22  2:02   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 08/40] sim/erc32: Insert void parameter Tsukasa OI
2022-10-20  9:25 ` [PATCH 09/40] sim/erc32: Use int32_t as event callback argument Tsukasa OI
2022-10-20  9:25 ` [PATCH 10/40] sim/erc32: Use int32_t as IRQ " Tsukasa OI
2022-10-20  9:25 ` [PATCH 11/40] cpu/frv: Initialize some variables Tsukasa OI
2022-10-20  9:25 ` [PATCH 12/40] sim/frv: Initialize nesr variable Tsukasa OI
2022-10-20  9:25 ` [PATCH 13/40] sim/frv: Initialize some variables Tsukasa OI
2022-10-20  9:26 ` [PATCH 14/40] sim/frv: Add explicit casts Tsukasa OI
2022-10-20  9:26 ` [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Tsukasa OI
2022-10-25 13:54   ` Jeff Law
2022-10-20  9:26 ` [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Tsukasa OI
2022-10-20  9:26 ` [PATCH 17/40] sim/lm32: Add explicit casts Tsukasa OI
2022-10-20  9:32 ` [PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) Tsukasa OI
2022-10-22 19:01 ` Mike Frysinger
2022-10-24  7:59   ` Tsukasa OI

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