public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Andrew Burgess <aburgess@redhat.com>,
	Mike Frysinger <vapier@gentoo.org>,
	Nick Clifton <nickc@redhat.com>
Cc: binutils@sourceware.org
Subject: [PATCH 13/40] sim/frv: Initialize some variables
Date: Thu, 20 Oct 2022 09:25:59 +0000	[thread overview]
Message-ID: <51a03f7097921cc48954210cf99e370ae8982ec8.1666257885.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1666257885.git.research_trasio@irq.a4lg.com>

This commit is strongly related to "cpu/frv: Initialize some variables" and
applies corresponding changes to sim/frv/sem.c.

Note:
This commit touches CGEN-generated files directly.
Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best
way to prevent this issue from happening again but there is another known
regression in CGEN to resolve.
---
 sim/frv/sem.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sim/frv/sem.c b/sim/frv/sem.c
index cc7cbeee318..28610f4eac7 100644
--- a/sim/frv/sem.c
+++ b/sim/frv/sem.c
@@ -3054,6 +3054,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   QI tmp_cc;
+  tmp_cc = 0;
 if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) {
   tmp_cc = ANDQI (tmp_cc, 7);
 } else {
@@ -4545,6 +4546,7 @@ SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -4591,6 +4593,7 @@ SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (tmp_do_op) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -6706,6 +6709,7 @@ SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
-- 
2.34.1


  parent reply	other threads:[~2022-10-20  9:28 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-20  9:25 [PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) Tsukasa OI
2022-10-20  9:25 ` [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib Tsukasa OI
2022-10-20  9:25 ` [PATCH 02/40] sim: Check known getrusage declaration existence Tsukasa OI
2022-10-20  9:25 ` [PATCH 03/40] sim/aarch64: Remove unused functions Tsukasa OI
2022-10-20  9:25 ` [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU Tsukasa OI
2022-10-22  1:59   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 Tsukasa OI
2022-10-22  1:44   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 06/40] sim/cris: Move declarations of f_specific_init Tsukasa OI
2022-10-22  1:46   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 07/40] sim/cris: Regenerate with CGEN Tsukasa OI
2022-10-22  2:02   ` Hans-Peter Nilsson
2022-10-20  9:25 ` [PATCH 08/40] sim/erc32: Insert void parameter Tsukasa OI
2022-10-20  9:25 ` [PATCH 09/40] sim/erc32: Use int32_t as event callback argument Tsukasa OI
2022-10-20  9:25 ` [PATCH 10/40] sim/erc32: Use int32_t as IRQ " Tsukasa OI
2022-10-20  9:25 ` [PATCH 11/40] cpu/frv: Initialize some variables Tsukasa OI
2022-10-20  9:25 ` [PATCH 12/40] sim/frv: Initialize nesr variable Tsukasa OI
2022-10-20  9:25 ` Tsukasa OI [this message]
2022-10-20  9:26 ` [PATCH 14/40] sim/frv: Add explicit casts Tsukasa OI
2022-10-20  9:26 ` [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Tsukasa OI
2022-10-25 13:54   ` Jeff Law
2022-10-20  9:26 ` [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Tsukasa OI
2022-10-20  9:26 ` [PATCH 17/40] sim/lm32: Add explicit casts Tsukasa OI
2022-10-20  9:32 ` [PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1) Tsukasa OI
2022-10-22 19:01 ` Mike Frysinger
2022-10-24  7:59   ` Tsukasa OI

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=51a03f7097921cc48954210cf99e370ae8982ec8.1666257885.git.research_trasio@irq.a4lg.com \
    --to=research_trasio@irq.a4lg.com \
    --cc=aburgess@redhat.com \
    --cc=binutils@sourceware.org \
    --cc=nickc@redhat.com \
    --cc=vapier@gentoo.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).