From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
"H . Peter Anvin" <hpa@zytor.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Nelson Chu <nelson@rivosinc.com>
Cc: binutils@sourceware.org
Subject: [PATCH v8 4/7] RISC-V: Print highest address on the disassembler
Date: Sat, 27 Aug 2022 00:22:56 +0000 [thread overview]
Message-ID: <83ef6d68e80ab6e0bed9eaae67f68dd9105da887.1661559777.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1661559777.git.research_trasio@irq.a4lg.com>
This patch makes possible to print the highest address (0xffffffff on RV32,
0xffffffff_ffffffff on RV64). This is particularly useful if the highest
address space is used for I/O registers and corresponding symbols
are defined.
gas/ChangeLog:
* testsuite/gas/riscv/dis-addr-topaddr.s: New test for the top
address printing.
* testsuite/gas/riscv/dis-addr-topaddr-32.d: Likewise.
* testsuite/gas/riscv/dis-addr-topaddr-64.d: Likewise.
opcodes/ChangeLog:
* riscv-dis.c (struct riscv_private_data): Add `to_print_addr' to
enable printing the highest address.
(maybe_print_address): Utilize `to_print_addr'.
(riscv_disassemble_insn): Likewise.
---
gas/testsuite/gas/riscv/dis-addr-topaddr-32.d | 11 +++++++++++
gas/testsuite/gas/riscv/dis-addr-topaddr-64.d | 11 +++++++++++
gas/testsuite/gas/riscv/dis-addr-topaddr.s | 10 ++++++++++
opcodes/riscv-dis.c | 9 ++++++---
4 files changed, 38 insertions(+), 3 deletions(-)
create mode 100644 gas/testsuite/gas/riscv/dis-addr-topaddr-32.d
create mode 100644 gas/testsuite/gas/riscv/dis-addr-topaddr-64.d
create mode 100644 gas/testsuite/gas/riscv/dis-addr-topaddr.s
diff --git a/gas/testsuite/gas/riscv/dis-addr-topaddr-32.d b/gas/testsuite/gas/riscv/dis-addr-topaddr-32.d
new file mode 100644
index 00000000000..87854cd58e6
--- /dev/null
+++ b/gas/testsuite/gas/riscv/dis-addr-topaddr-32.d
@@ -0,0 +1,11 @@
+#as: -march=rv32ic
+#source: dis-addr-topaddr.s
+#objdump: -d
+
+.*: file format elf32-(little|big)riscv
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+fff00283[ ]+lb[ ]+t0,-1\(zero\) # ffffffff <addr_top>
diff --git a/gas/testsuite/gas/riscv/dis-addr-topaddr-64.d b/gas/testsuite/gas/riscv/dis-addr-topaddr-64.d
new file mode 100644
index 00000000000..38f67efdcaf
--- /dev/null
+++ b/gas/testsuite/gas/riscv/dis-addr-topaddr-64.d
@@ -0,0 +1,11 @@
+#as: -march=rv64ic -defsym rv64=1
+#source: dis-addr-topaddr.s
+#objdump: -d
+
+.*: file format elf64-(little|big)riscv
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+fff00283[ ]+lb[ ]+t0,-1\(zero\) # ffffffffffffffff <addr_top>
diff --git a/gas/testsuite/gas/riscv/dis-addr-topaddr.s b/gas/testsuite/gas/riscv/dis-addr-topaddr.s
new file mode 100644
index 00000000000..b66587f448d
--- /dev/null
+++ b/gas/testsuite/gas/riscv/dis-addr-topaddr.s
@@ -0,0 +1,10 @@
+.ifdef rv64
+topbase = 0xffffffff00000000
+.else
+topbase = 0
+.endif
+
+.set addr_top, topbase + 0xffffffff # -1
+
+target:
+ lb t0, -1(zero)
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index b3ca680e506..7532c72187d 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -52,6 +52,7 @@ struct riscv_private_data
bfd_vma gp;
bfd_vma print_addr;
bfd_vma hi_addr[OP_MASK_RD + 1];
+ bool to_print_addr;
};
/* Used for mapping symbols. */
@@ -183,6 +184,7 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset,
pd->print_addr = offset;
else
return; /* Don't print the address. */
+ pd->to_print_addr = true;
/* Sign-extend a 32-bit value to a 64-bit value. */
if (wide)
@@ -602,9 +604,10 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
pd = info->private_data = xcalloc (1, sizeof (struct riscv_private_data));
pd->gp = -1;
- pd->print_addr = -1;
+ pd->print_addr = 0;
for (i = 0; i < (int)ARRAY_SIZE (pd->hi_addr); i++)
pd->hi_addr[i] = -1;
+ pd->to_print_addr = false;
for (i = 0; i < info->symtab_size; i++)
if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0)
@@ -668,13 +671,13 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
print_insn_args (op->args, word, memaddr, info);
/* Try to disassemble multi-instruction addressing sequences. */
- if (pd->print_addr != (bfd_vma)-1)
+ if (pd->to_print_addr)
{
info->target = pd->print_addr;
(*info->fprintf_styled_func)
(info->stream, dis_style_comment_start, " # ");
(*info->print_address_func) (info->target, info);
- pd->print_addr = -1;
+ pd->to_print_addr = false;
}
/* Finish filling out insn_info fields. */
--
2.34.1
next prev parent reply other threads:[~2022-08-27 0:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-27 0:10 [PATCH v8 0/7] RISC-V: Fix address printer " Tsukasa OI
2022-08-27 0:10 ` [PATCH v8 1/7] RISC-V: Add address printer tests with ADDIW Tsukasa OI
2022-08-27 0:10 ` [PATCH v8 2/7] RISC-V: Fix JALR target address computation Tsukasa OI
2022-08-27 0:11 ` [PATCH v8 3/7] RISC-V: Fix RV32 disassembler " Tsukasa OI
2022-08-27 0:11 ` [PATCH v8 4/7] RISC-V: Print highest address on the disassembler Tsukasa OI
2022-08-27 0:11 ` [PATCH v8 5/7] RISC-V: Print top GP-relative addresses " Tsukasa OI
2022-08-27 0:11 ` [PATCH v8 6/7] RISC-V: Clarify that `wide' is only used for ADDIW Tsukasa OI
2022-08-27 0:11 ` [PATCH v8 7/7] RISC-V: Make `is_addiw' parameter bool Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 0/7] RISC-V: Fix address printer on the disassembler Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 1/7] RISC-V: Add address printer tests with ADDIW Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 2/7] RISC-V: Fix JALR target address computation Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 3/7] RISC-V: Fix RV32 disassembler " Tsukasa OI
2022-08-27 0:22 ` Tsukasa OI [this message]
2022-08-27 0:22 ` [PATCH v8 5/7] RISC-V: Print top GP-relative addresses on the disassembler Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 6/7] RISC-V: Clarify that `wide' is only used for ADDIW Tsukasa OI
2022-08-27 0:22 ` [PATCH v8 7/7] RISC-V: Make `is_addiw' parameter bool Tsukasa OI
2022-08-27 0:28 ` [PATCH v8 0/7] RISC-V: Fix address printer on the disassembler Tsukasa OI
2022-09-02 6:18 ` Nelson Chu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=83ef6d68e80ab6e0bed9eaae67f68dd9105da887.1661559777.git.research_trasio@irq.a4lg.com \
--to=research_trasio@irq.a4lg.com \
--cc=andrew@sifive.com \
--cc=binutils@sourceware.org \
--cc=hpa@zytor.com \
--cc=jim.wilson.gcc@gmail.com \
--cc=nelson@rivosinc.com \
--cc=palmer@dabbelt.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).