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* [PATCH] x86: simplify and slightly correct XCHG vs NOP checking
@ 2022-12-01  9:11 Jan Beulich
  2022-12-01 16:43 ` H.J. Lu
  0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2022-12-01  9:11 UTC (permalink / raw)
  To: Binutils; +Cc: H.J. Lu

For one, because of CheckRegSize, there's no need to check the size of
both (register) operands. And then in process_suffix() check opcode
space rather than the (potentially ambiguous) extension opcode.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6686,8 +6686,7 @@ match_template (char mnem_suffix)
 	      && t->opcode_modifier.opcodespace == SPACE_BASE
 	      && i.types[0].bitfield.instance == Accum
 	      && i.types[0].bitfield.dword
-	      && i.types[1].bitfield.instance == Accum
-	      && i.types[1].bitfield.dword)
+	      && i.types[1].bitfield.instance == Accum)
 	    continue;
 	  /* xrelease mov %eax, <disp> is another special case. It must not
 	     match the accumulator-only encoding of mov.  */
@@ -7408,11 +7407,10 @@ process_suffix (void)
 	     need rex64. */
 	  && ! (i.operands == 2
 		&& i.tm.base_opcode == 0x90
-		&& i.tm.extension_opcode == None
+		&& i.tm.opcode_modifier.opcodespace == SPACE_BASE
 		&& i.types[0].bitfield.instance == Accum
 		&& i.types[0].bitfield.qword
-		&& i.types[1].bitfield.instance == Accum
-		&& i.types[1].bitfield.qword))
+		&& i.types[1].bitfield.instance == Accum))
 	i.rex |= REX_W;
 
       break;

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] x86: simplify and slightly correct XCHG vs NOP checking
  2022-12-01  9:11 [PATCH] x86: simplify and slightly correct XCHG vs NOP checking Jan Beulich
@ 2022-12-01 16:43 ` H.J. Lu
  0 siblings, 0 replies; 2+ messages in thread
From: H.J. Lu @ 2022-12-01 16:43 UTC (permalink / raw)
  To: Jan Beulich; +Cc: Binutils

On Thu, Dec 1, 2022 at 1:11 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> For one, because of CheckRegSize, there's no need to check the size of
> both (register) operands. And then in process_suffix() check opcode
> space rather than the (potentially ambiguous) extension opcode.
>
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -6686,8 +6686,7 @@ match_template (char mnem_suffix)
>               && t->opcode_modifier.opcodespace == SPACE_BASE
>               && i.types[0].bitfield.instance == Accum
>               && i.types[0].bitfield.dword
> -             && i.types[1].bitfield.instance == Accum
> -             && i.types[1].bitfield.dword)
> +             && i.types[1].bitfield.instance == Accum)
>             continue;
>           /* xrelease mov %eax, <disp> is another special case. It must not
>              match the accumulator-only encoding of mov.  */
> @@ -7408,11 +7407,10 @@ process_suffix (void)
>              need rex64. */
>           && ! (i.operands == 2
>                 && i.tm.base_opcode == 0x90
> -               && i.tm.extension_opcode == None
> +               && i.tm.opcode_modifier.opcodespace == SPACE_BASE
>                 && i.types[0].bitfield.instance == Accum
>                 && i.types[0].bitfield.qword
> -               && i.types[1].bitfield.instance == Accum
> -               && i.types[1].bitfield.qword))
> +               && i.types[1].bitfield.instance == Accum))
>         i.rex |= REX_W;
>
>        break;

OK.

Thanks.

-- 
H.J.

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2022-12-01 16:43 ` H.J. Lu

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