* [patch] MIPS: Fix synthesized doubleword transfers (ping)
@ 2005-02-24 22:30 Maciej W. Rozycki
2005-02-24 22:57 ` Richard Sandiford
0 siblings, 1 reply; 12+ messages in thread
From: Maciej W. Rozycki @ 2005-02-24 22:30 UTC (permalink / raw)
To: binutils
Hello,
I've reviewed my pile of patches due to the close 2.16 branch and this
patch is still needed. OK to apply?
Maciej
---------- Forwarded message ----------
Message-ID: <Pine.LNX.4.55.0406281848400.23162@jurand.ds.pg.gda.pl>
Date: Mon, 28 Jun 2004 19:18:02 +0200 (CEST)
From: Maciej W. Rozycki <macro@linux-mips.org>
To: binutils@sources.redhat.com
Subject: [patch] MIPS: Fix synthesized doubleword transfers
Hello,
This is a follow-on patch to the "mips-hilo-reloc-sort" one. It changes
a number of macro expansions that synthesize doubleword memory transfers
from word ones. All of them use an invalid orphaned LO16 reloc with no
matching HI16_S one. These relocs break when a carry has to be propagated
for them, but not for the other LO16 reloc (it's even noted in the
comment).
New expansions increment the base register used for the second transfer
getting rid of the carry problem and making the associated LO16 reloc pair
with the preceding HI16_S like the other LO16 one.
gas/:
2004-06-28 Maciej W. Rozycki <macro@linux-mips.org>
* config/tc-mips.c (macro): Avoid a reloc overflow for word
memory transfers in expansions of the "li.d", "l.d", "s.d", "ld"
and "sd" macros.
gas/testsuite/:
2004-06-28 Maciej W. Rozycki <macro@linux-mips.org>
* gas/mips/ld-svr4pic.d: Update to work with new expansions of
synthesized doubleword memory transfers.
* gas/mips/ld-xgot.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/lif-svr4pic.d: Likewise.
* gas/mips/lif-xgot.d: Likewise.
* gas/mips/lifloat.d: Likewise.
* gas/mips/mips-abi32-pic.d: Likewise.
* gas/mips/mips-abi32.d: Likewise.
* gas/mips/mips-gp32-fp32-pic.d: Likewise.
* gas/mips/mips-gp32-fp32.d: Likewise.
* gas/mips/mips-gp32-fp64-pic.d: Likewise.
* gas/mips/mips-gp32-fp64.d: Likewise.
* gas/mips/ld.s: Fix trailing space.
* gas/mips/lifloat.s: Likewise.
This has been tested for the mipsel-linux-gnu target with no new
regressions and fixing failures revealed by the "mips-hilo-reloc-sort"
patch in the addressed test cases. The output has been studied for
correctness.
OK to apply?
Maciej
binutils-2.15.91-20040625-mips-dword-reloc.patch
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/config/tc-mips.c binutils-2.15.91-20040625/gas/config/tc-mips.c
--- binutils-2.15.91-20040625.macro/gas/config/tc-mips.c 2004-06-15 03:25:28.000000000 +0000
+++ binutils-2.15.91-20040625/gas/config/tc-mips.c 2004-06-28 00:15:46.000000000 +0000
@@ -6255,9 +6255,8 @@ macro (struct mips_cl_insn *ip)
macro_build (&offset_expr, "lw", "t,o(b)", treg, BFD_RELOC_LO16, AT);
if (treg != RA)
{
- /* FIXME: How in the world do we deal with the possible
- overflow here? */
- offset_expr.X_add_number += 4;
+ expr1.X_add_number = 4;
+ macro_build (&expr1, "addiu", "t,r,j", AT, AT, BFD_RELOC_LO16);
macro_build (&offset_expr, "lw", "t,o(b)",
treg + 1, BFD_RELOC_LO16, AT);
}
@@ -6342,16 +6341,32 @@ macro (struct mips_cl_insn *ip)
r = BFD_RELOC_LO16;
dob:
assert (mips_opts.isa == ISA_MIPS1);
+ if (breg == 0
+ && offset_expr.X_op == O_constant
+ && offset_expr.X_add_number >= 0x8000 - 4)
+ goto dab;
macro_build (&offset_expr, "lwc1", "T,o(b)",
target_big_endian ? treg + 1 : treg, r, breg);
- /* FIXME: A possible overflow which I don't know how to deal
- with. */
- offset_expr.X_add_number += 4;
+ if (offset_expr.X_op == O_constant || r == BFD_RELOC_MIPS_LITERAL)
+ offset_expr.X_add_number += 4;
+ else
+ {
+ expr1.X_add_number = 4;
+ macro_build (&expr1, "addiu", "t,r,j", breg, breg, BFD_RELOC_LO16);
+ }
macro_build (&offset_expr, "lwc1", "T,o(b)",
target_big_endian ? treg : treg + 1, r, breg);
if (breg != AT)
- return;
+ {
+ if (offset_expr.X_op != O_constant && r != BFD_RELOC_MIPS_LITERAL)
+ {
+ expr1.X_add_number = -4;
+ macro_build (&expr1, "addiu", "t,r,j", breg, breg,
+ BFD_RELOC_LO16);
+ }
+ return;
+ }
break;
case M_L_DAB:
@@ -6379,6 +6394,7 @@ macro (struct mips_cl_insn *ip)
goto ld;
}
+ dab:
s = "lwc1";
fmt = "T,o(b)";
goto ldd_std;
@@ -6451,7 +6467,8 @@ macro (struct mips_cl_insn *ip)
If this is not a GP relative symbol, we want
lui $at,<sym> (BFD_RELOC_HI16_S)
<op> $treg,<sym>($at) (BFD_RELOC_LO16)
- <op> $treg+1,<sym>+4($at) (BFD_RELOC_LO16)
+ addiu $at,$at,4
+ <op> $treg+1,<sym>($at) (BFD_RELOC_LO16)
If there is a base register, we add it to $at after the
lui instruction. If there is a constant, we always use
the last case. */
@@ -6517,8 +6534,13 @@ macro (struct mips_cl_insn *ip)
/* Itbl support may require additional care here. */
macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg,
BFD_RELOC_LO16, AT);
- /* FIXME: How do we handle overflow here? */
- offset_expr.X_add_number += 4;
+ if (offset_expr.X_op == O_constant)
+ offset_expr.X_add_number += 4;
+ else
+ {
+ expr1.X_add_number = 4;
+ macro_build (&expr1, "addiu", "t,r,j", AT, AT, BFD_RELOC_LO16);
+ }
/* Itbl support may require additional care here. */
macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1,
BFD_RELOC_LO16, AT);
@@ -6536,7 +6558,8 @@ macro (struct mips_cl_insn *ip)
lw $at,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
nop
<op> $treg,<sym>($at) (BFD_RELOC_LO16)
- <op> $treg+1,<sym>+4($at) (BFD_RELOC_LO16)
+ addiu $at,$at,4
+ <op> $treg+1,<sym>($at) (BFD_RELOC_LO16)
If there is a base register we add it to $at before the
lwc1 instructions. If there is a constant we include it
in the lwc1 instructions. */
@@ -6550,27 +6573,28 @@ macro (struct mips_cl_insn *ip)
if (breg != 0)
macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT);
- /* Set mips_optimize to 2 to avoid inserting an undesired
- nop. */
- hold_mips_optimize = mips_optimize;
- mips_optimize = 2;
-
/* Itbl support may require additional care here. */
relax_start (offset_expr.X_add_symbol);
macro_build (&expr1, s, fmt, coproc ? treg + 1 : treg,
BFD_RELOC_LO16, AT);
expr1.X_add_number += 4;
+
+ /* Set mips_optimize to 2 to avoid inserting an undesired
+ nop. */
+ hold_mips_optimize = mips_optimize;
+ mips_optimize = 2;
macro_build (&expr1, s, fmt, coproc ? treg : treg + 1,
BFD_RELOC_LO16, AT);
+ mips_optimize = hold_mips_optimize;
+
relax_switch ();
macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg,
BFD_RELOC_LO16, AT);
- offset_expr.X_add_number += 4;
+ expr1.X_add_number = 4;
+ macro_build (&expr1, "addiu", "t,r,j", AT, AT, BFD_RELOC_LO16);
macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1,
BFD_RELOC_LO16, AT);
relax_end ();
-
- mips_optimize = hold_mips_optimize;
}
else if (mips_pic == SVR4_PIC)
{
@@ -6587,7 +6611,8 @@ macro (struct mips_cl_insn *ip)
lw $at,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
nop
<op> $treg,<sym>($at) (BFD_RELOC_LO16)
- <op> $treg+1,<sym>+4($at) (BFD_RELOC_LO16)
+ addiu $at,$at,4
+ <op> $treg+1,<sym>($at) (BFD_RELOC_LO16)
If there is a base register we add it to $at before the
lwc1 instructions. If there is a constant we include it
in the lwc1 instructions. */
@@ -6635,16 +6660,11 @@ macro (struct mips_cl_insn *ip)
/* Itbl support may require additional care here. */
macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg,
BFD_RELOC_LO16, AT);
- offset_expr.X_add_number += 4;
-
- /* Set mips_optimize to 2 to avoid inserting an undesired
- nop. */
- hold_mips_optimize = mips_optimize;
- mips_optimize = 2;
+ expr1.X_add_number = 4;
+ macro_build (&expr1, "addiu", "t,r,j", AT, AT, BFD_RELOC_LO16);
/* Itbl support may require additional care here. */
macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1,
BFD_RELOC_LO16, AT);
- mips_optimize = hold_mips_optimize;
relax_end ();
}
else
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld-svr4pic.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld-svr4pic.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld-svr4pic.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld-svr4pic.d 2004-06-28 00:08:20.000000000 +0000
@@ -45,181 +45,193 @@ Disassembly of section .text:
0+0088 <[^>]*> lw a0,-23131\(at\)
0+008c <[^>]*> lw a1,-23127\(at\)
0+0090 <[^>]*> lw at,0\(gp\)
-[ ]*90: R_MIPS_GOT16 .data
+[ ]*90: R_MIPS_GOT16 \.data
0+0094 <[^>]*> nop
0+0098 <[^>]*> lw a0,0\(at\)
-[ ]*98: R_MIPS_LO16 .data
-0+009c <[^>]*> lw a1,4\(at\)
-[ ]*9c: R_MIPS_LO16 .data
-0+00a0 <[^>]*> lw at,0\(gp\)
-[ ]*a0: R_MIPS_GOT16 big_external_data_label
-0+00a4 <[^>]*> nop
-0+00a8 <[^>]*> lw a0,0\(at\)
-0+00ac <[^>]*> lw a1,4\(at\)
-0+00b0 <[^>]*> lw at,0\(gp\)
-[ ]*b0: R_MIPS_GOT16 small_external_data_label
-0+00b4 <[^>]*> nop
-0+00b8 <[^>]*> lw a0,0\(at\)
-0+00bc <[^>]*> lw a1,4\(at\)
-0+00c0 <[^>]*> lw at,0\(gp\)
-[ ]*c0: R_MIPS_GOT16 big_external_common
-0+00c4 <[^>]*> nop
-0+00c8 <[^>]*> lw a0,0\(at\)
-0+00cc <[^>]*> lw a1,4\(at\)
-0+00d0 <[^>]*> lw at,0\(gp\)
-[ ]*d0: R_MIPS_GOT16 small_external_common
-0+00d4 <[^>]*> nop
-0+00d8 <[^>]*> lw a0,0\(at\)
-0+00dc <[^>]*> lw a1,4\(at\)
-0+00e0 <[^>]*> lw at,0\(gp\)
-[ ]*e0: R_MIPS_GOT16 .bss
-0+00e4 <[^>]*> nop
-0+00e8 <[^>]*> lw a0,0\(at\)
-[ ]*e8: R_MIPS_LO16 .bss
-0+00ec <[^>]*> lw a1,4\(at\)
-[ ]*ec: R_MIPS_LO16 .bss
-0+00f0 <[^>]*> lw at,0\(gp\)
-[ ]*f0: R_MIPS_GOT16 .bss
-0+00f4 <[^>]*> nop
-0+00f8 <[^>]*> lw a0,1000\(at\)
-[ ]*f8: R_MIPS_LO16 .bss
-0+00fc <[^>]*> lw a1,1004\(at\)
-[ ]*fc: R_MIPS_LO16 .bss
-0+0100 <[^>]*> lw at,0\(gp\)
-[ ]*100: R_MIPS_GOT16 .data
-0+0104 <[^>]*> nop
-0+0108 <[^>]*> lw a0,1\(at\)
-[ ]*108: R_MIPS_LO16 .data
-0+010c <[^>]*> lw a1,5\(at\)
-[ ]*10c: R_MIPS_LO16 .data
-0+0110 <[^>]*> lw at,0\(gp\)
-[ ]*110: R_MIPS_GOT16 big_external_data_label
-0+0114 <[^>]*> nop
-0+0118 <[^>]*> lw a0,1\(at\)
-0+011c <[^>]*> lw a1,5\(at\)
+[ ]*98: R_MIPS_LO16 \.data
+0+009c <[^>]*> addiu at,at,4
+0+00a0 <[^>]*> lw a1,0\(at\)
+[ ]*a0: R_MIPS_LO16 \.data
+0+00a4 <[^>]*> lw at,0\(gp\)
+[ ]*a4: R_MIPS_GOT16 big_external_data_label
+0+00a8 <[^>]*> nop
+0+00ac <[^>]*> lw a0,0\(at\)
+0+00b0 <[^>]*> lw a1,4\(at\)
+0+00b4 <[^>]*> lw at,0\(gp\)
+[ ]*b4: R_MIPS_GOT16 small_external_data_label
+0+00b8 <[^>]*> nop
+0+00bc <[^>]*> lw a0,0\(at\)
+0+00c0 <[^>]*> lw a1,4\(at\)
+0+00c4 <[^>]*> lw at,0\(gp\)
+[ ]*c4: R_MIPS_GOT16 big_external_common
+0+00c8 <[^>]*> nop
+0+00cc <[^>]*> lw a0,0\(at\)
+0+00d0 <[^>]*> lw a1,4\(at\)
+0+00d4 <[^>]*> lw at,0\(gp\)
+[ ]*d4: R_MIPS_GOT16 small_external_common
+0+00d8 <[^>]*> nop
+0+00dc <[^>]*> lw a0,0\(at\)
+0+00e0 <[^>]*> lw a1,4\(at\)
+0+00e4 <[^>]*> lw at,0\(gp\)
+[ ]*e4: R_MIPS_GOT16 \.bss
+0+00e8 <[^>]*> nop
+0+00ec <[^>]*> lw a0,0\(at\)
+[ ]*ec: R_MIPS_LO16 \.bss
+0+00f0 <[^>]*> addiu at,at,4
+0+00f4 <[^>]*> lw a1,0\(at\)
+[ ]*f4: R_MIPS_LO16 \.bss
+0+00f8 <[^>]*> lw at,0\(gp\)
+[ ]*f8: R_MIPS_GOT16 \.bss
+0+00fc <[^>]*> nop
+0+0100 <[^>]*> lw a0,1000\(at\)
+[ ]*100: R_MIPS_LO16 \.bss
+0+0104 <[^>]*> addiu at,at,4
+0+0108 <[^>]*> lw a1,1000\(at\)
+[ ]*108: R_MIPS_LO16 \.bss
+0+010c <[^>]*> lw at,0\(gp\)
+[ ]*10c: R_MIPS_GOT16 \.data
+0+0110 <[^>]*> nop
+0+0114 <[^>]*> lw a0,1\(at\)
+[ ]*114: R_MIPS_LO16 \.data
+0+0118 <[^>]*> addiu at,at,4
+0+011c <[^>]*> lw a1,1\(at\)
+[ ]*11c: R_MIPS_LO16 \.data
0+0120 <[^>]*> lw at,0\(gp\)
-[ ]*120: R_MIPS_GOT16 small_external_data_label
+[ ]*120: R_MIPS_GOT16 big_external_data_label
0+0124 <[^>]*> nop
0+0128 <[^>]*> lw a0,1\(at\)
0+012c <[^>]*> lw a1,5\(at\)
0+0130 <[^>]*> lw at,0\(gp\)
-[ ]*130: R_MIPS_GOT16 big_external_common
+[ ]*130: R_MIPS_GOT16 small_external_data_label
0+0134 <[^>]*> nop
0+0138 <[^>]*> lw a0,1\(at\)
0+013c <[^>]*> lw a1,5\(at\)
0+0140 <[^>]*> lw at,0\(gp\)
-[ ]*140: R_MIPS_GOT16 small_external_common
+[ ]*140: R_MIPS_GOT16 big_external_common
0+0144 <[^>]*> nop
0+0148 <[^>]*> lw a0,1\(at\)
0+014c <[^>]*> lw a1,5\(at\)
0+0150 <[^>]*> lw at,0\(gp\)
-[ ]*150: R_MIPS_GOT16 .bss
+[ ]*150: R_MIPS_GOT16 small_external_common
0+0154 <[^>]*> nop
0+0158 <[^>]*> lw a0,1\(at\)
-[ ]*158: R_MIPS_LO16 .bss
0+015c <[^>]*> lw a1,5\(at\)
-[ ]*15c: R_MIPS_LO16 .bss
0+0160 <[^>]*> lw at,0\(gp\)
-[ ]*160: R_MIPS_GOT16 .bss
+[ ]*160: R_MIPS_GOT16 \.bss
0+0164 <[^>]*> nop
-0+0168 <[^>]*> lw a0,1001\(at\)
-[ ]*168: R_MIPS_LO16 .bss
-0+016c <[^>]*> lw a1,1005\(at\)
-[ ]*16c: R_MIPS_LO16 .bss
-0+0170 <[^>]*> lw at,0\(gp\)
-[ ]*170: R_MIPS_GOT16 .data
-0+0174 <[^>]*> nop
-0+0178 <[^>]*> addu at,a1,at
-0+017c <[^>]*> lw a0,0\(at\)
-[ ]*17c: R_MIPS_LO16 .data
-0+0180 <[^>]*> lw a1,4\(at\)
-[ ]*180: R_MIPS_LO16 .data
-0+0184 <[^>]*> lw at,0\(gp\)
-[ ]*184: R_MIPS_GOT16 big_external_data_label
-0+0188 <[^>]*> nop
-0+018c <[^>]*> addu at,a1,at
-0+0190 <[^>]*> lw a0,0\(at\)
-0+0194 <[^>]*> lw a1,4\(at\)
-0+0198 <[^>]*> lw at,0\(gp\)
-[ ]*198: R_MIPS_GOT16 small_external_data_label
-0+019c <[^>]*> nop
-0+01a0 <[^>]*> addu at,a1,at
-0+01a4 <[^>]*> lw a0,0\(at\)
-0+01a8 <[^>]*> lw a1,4\(at\)
-0+01ac <[^>]*> lw at,0\(gp\)
-[ ]*1ac: R_MIPS_GOT16 big_external_common
-0+01b0 <[^>]*> nop
-0+01b4 <[^>]*> addu at,a1,at
-0+01b8 <[^>]*> lw a0,0\(at\)
-0+01bc <[^>]*> lw a1,4\(at\)
-0+01c0 <[^>]*> lw at,0\(gp\)
-[ ]*1c0: R_MIPS_GOT16 small_external_common
-0+01c4 <[^>]*> nop
-0+01c8 <[^>]*> addu at,a1,at
-0+01cc <[^>]*> lw a0,0\(at\)
-0+01d0 <[^>]*> lw a1,4\(at\)
-0+01d4 <[^>]*> lw at,0\(gp\)
-[ ]*1d4: R_MIPS_GOT16 .bss
-0+01d8 <[^>]*> nop
-0+01dc <[^>]*> addu at,a1,at
-0+01e0 <[^>]*> lw a0,0\(at\)
-[ ]*1e0: R_MIPS_LO16 .bss
-0+01e4 <[^>]*> lw a1,4\(at\)
-[ ]*1e4: R_MIPS_LO16 .bss
-0+01e8 <[^>]*> lw at,0\(gp\)
-[ ]*1e8: R_MIPS_GOT16 .bss
-0+01ec <[^>]*> nop
-0+01f0 <[^>]*> addu at,a1,at
-0+01f4 <[^>]*> lw a0,1000\(at\)
-[ ]*1f4: R_MIPS_LO16 .bss
-0+01f8 <[^>]*> lw a1,1004\(at\)
-[ ]*1f8: R_MIPS_LO16 .bss
-0+01fc <[^>]*> lw at,0\(gp\)
-[ ]*1fc: R_MIPS_GOT16 .data
-0+0200 <[^>]*> nop
-0+0204 <[^>]*> addu at,a1,at
-0+0208 <[^>]*> lw a0,1\(at\)
-[ ]*208: R_MIPS_LO16 .data
-0+020c <[^>]*> lw a1,5\(at\)
-[ ]*20c: R_MIPS_LO16 .data
-0+0210 <[^>]*> lw at,0\(gp\)
-[ ]*210: R_MIPS_GOT16 big_external_data_label
-0+0214 <[^>]*> nop
-0+0218 <[^>]*> addu at,a1,at
-0+021c <[^>]*> lw a0,1\(at\)
-0+0220 <[^>]*> lw a1,5\(at\)
-0+0224 <[^>]*> lw at,0\(gp\)
-[ ]*224: R_MIPS_GOT16 small_external_data_label
-0+0228 <[^>]*> nop
-0+022c <[^>]*> addu at,a1,at
-0+0230 <[^>]*> lw a0,1\(at\)
-0+0234 <[^>]*> lw a1,5\(at\)
+0+0168 <[^>]*> lw a0,1\(at\)
+[ ]*168: R_MIPS_LO16 \.bss
+0+016c <[^>]*> addiu at,at,4
+0+0170 <[^>]*> lw a1,1\(at\)
+[ ]*170: R_MIPS_LO16 \.bss
+0+0174 <[^>]*> lw at,0\(gp\)
+[ ]*174: R_MIPS_GOT16 \.bss
+0+0178 <[^>]*> nop
+0+017c <[^>]*> lw a0,1001\(at\)
+[ ]*17c: R_MIPS_LO16 \.bss
+0+0180 <[^>]*> addiu at,at,4
+0+0184 <[^>]*> lw a1,1001\(at\)
+[ ]*184: R_MIPS_LO16 \.bss
+0+0188 <[^>]*> lw at,0\(gp\)
+[ ]*188: R_MIPS_GOT16 \.data
+0+018c <[^>]*> nop
+0+0190 <[^>]*> addu at,a1,at
+0+0194 <[^>]*> lw a0,0\(at\)
+[ ]*194: R_MIPS_LO16 \.data
+0+0198 <[^>]*> addiu at,at,4
+0+019c <[^>]*> lw a1,0\(at\)
+[ ]*19c: R_MIPS_LO16 \.data
+0+01a0 <[^>]*> lw at,0\(gp\)
+[ ]*1a0: R_MIPS_GOT16 big_external_data_label
+0+01a4 <[^>]*> nop
+0+01a8 <[^>]*> addu at,a1,at
+0+01ac <[^>]*> lw a0,0\(at\)
+0+01b0 <[^>]*> lw a1,4\(at\)
+0+01b4 <[^>]*> lw at,0\(gp\)
+[ ]*1b4: R_MIPS_GOT16 small_external_data_label
+0+01b8 <[^>]*> nop
+0+01bc <[^>]*> addu at,a1,at
+0+01c0 <[^>]*> lw a0,0\(at\)
+0+01c4 <[^>]*> lw a1,4\(at\)
+0+01c8 <[^>]*> lw at,0\(gp\)
+[ ]*1c8: R_MIPS_GOT16 big_external_common
+0+01cc <[^>]*> nop
+0+01d0 <[^>]*> addu at,a1,at
+0+01d4 <[^>]*> lw a0,0\(at\)
+0+01d8 <[^>]*> lw a1,4\(at\)
+0+01dc <[^>]*> lw at,0\(gp\)
+[ ]*1dc: R_MIPS_GOT16 small_external_common
+0+01e0 <[^>]*> nop
+0+01e4 <[^>]*> addu at,a1,at
+0+01e8 <[^>]*> lw a0,0\(at\)
+0+01ec <[^>]*> lw a1,4\(at\)
+0+01f0 <[^>]*> lw at,0\(gp\)
+[ ]*1f0: R_MIPS_GOT16 \.bss
+0+01f4 <[^>]*> nop
+0+01f8 <[^>]*> addu at,a1,at
+0+01fc <[^>]*> lw a0,0\(at\)
+[ ]*1fc: R_MIPS_LO16 \.bss
+0+0200 <[^>]*> addiu at,at,4
+0+0204 <[^>]*> lw a1,0\(at\)
+[ ]*204: R_MIPS_LO16 \.bss
+0+0208 <[^>]*> lw at,0\(gp\)
+[ ]*208: R_MIPS_GOT16 \.bss
+0+020c <[^>]*> nop
+0+0210 <[^>]*> addu at,a1,at
+0+0214 <[^>]*> lw a0,1000\(at\)
+[ ]*214: R_MIPS_LO16 \.bss
+0+0218 <[^>]*> addiu at,at,4
+0+021c <[^>]*> lw a1,1000\(at\)
+[ ]*21c: R_MIPS_LO16 \.bss
+0+0220 <[^>]*> lw at,0\(gp\)
+[ ]*220: R_MIPS_GOT16 \.data
+0+0224 <[^>]*> nop
+0+0228 <[^>]*> addu at,a1,at
+0+022c <[^>]*> lw a0,1\(at\)
+[ ]*22c: R_MIPS_LO16 \.data
+0+0230 <[^>]*> addiu at,at,4
+0+0234 <[^>]*> lw a1,1\(at\)
+[ ]*234: R_MIPS_LO16 \.data
0+0238 <[^>]*> lw at,0\(gp\)
-[ ]*238: R_MIPS_GOT16 big_external_common
+[ ]*238: R_MIPS_GOT16 big_external_data_label
0+023c <[^>]*> nop
0+0240 <[^>]*> addu at,a1,at
0+0244 <[^>]*> lw a0,1\(at\)
0+0248 <[^>]*> lw a1,5\(at\)
0+024c <[^>]*> lw at,0\(gp\)
-[ ]*24c: R_MIPS_GOT16 small_external_common
+[ ]*24c: R_MIPS_GOT16 small_external_data_label
0+0250 <[^>]*> nop
0+0254 <[^>]*> addu at,a1,at
0+0258 <[^>]*> lw a0,1\(at\)
0+025c <[^>]*> lw a1,5\(at\)
0+0260 <[^>]*> lw at,0\(gp\)
-[ ]*260: R_MIPS_GOT16 .bss
+[ ]*260: R_MIPS_GOT16 big_external_common
0+0264 <[^>]*> nop
0+0268 <[^>]*> addu at,a1,at
0+026c <[^>]*> lw a0,1\(at\)
-[ ]*26c: R_MIPS_LO16 .bss
0+0270 <[^>]*> lw a1,5\(at\)
-[ ]*270: R_MIPS_LO16 .bss
0+0274 <[^>]*> lw at,0\(gp\)
-[ ]*274: R_MIPS_GOT16 .bss
+[ ]*274: R_MIPS_GOT16 small_external_common
0+0278 <[^>]*> nop
0+027c <[^>]*> addu at,a1,at
-0+0280 <[^>]*> lw a0,1001\(at\)
-[ ]*280: R_MIPS_LO16 .bss
-0+0284 <[^>]*> lw a1,1005\(at\)
-[ ]*284: R_MIPS_LO16 .bss
- ...
+0+0280 <[^>]*> lw a0,1\(at\)
+0+0284 <[^>]*> lw a1,5\(at\)
+0+0288 <[^>]*> lw at,0\(gp\)
+[ ]*288: R_MIPS_GOT16 \.bss
+0+028c <[^>]*> nop
+0+0290 <[^>]*> addu at,a1,at
+0+0294 <[^>]*> lw a0,1\(at\)
+[ ]*294: R_MIPS_LO16 \.bss
+0+0298 <[^>]*> addiu at,at,4
+0+029c <[^>]*> lw a1,1\(at\)
+[ ]*29c: R_MIPS_LO16 \.bss
+0+02a0 <[^>]*> lw at,0\(gp\)
+[ ]*2a0: R_MIPS_GOT16 \.bss
+0+02a4 <[^>]*> nop
+0+02a8 <[^>]*> addu at,a1,at
+0+02ac <[^>]*> lw a0,1001\(at\)
+[ ]*2ac: R_MIPS_LO16 \.bss
+0+02b0 <[^>]*> addiu at,at,4
+0+02b4 <[^>]*> lw a1,1001\(at\)
+[ ]*2b4: R_MIPS_LO16 \.bss
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld-xgot.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld-xgot.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld-xgot.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld-xgot.d 2004-06-28 00:08:50.000000000 +0000
@@ -45,229 +45,241 @@ Disassembly of section .text:
0+0088 <[^>]*> lw a0,-23131\(at\)
0+008c <[^>]*> lw a1,-23127\(at\)
0+0090 <[^>]*> lw at,0\(gp\)
-[ ]*90: R_MIPS_GOT16 .data
+[ ]*90: R_MIPS_GOT16 \.data
0+0094 <[^>]*> nop
0+0098 <[^>]*> lw a0,0\(at\)
-[ ]*98: R_MIPS_LO16 .data
-0+009c <[^>]*> lw a1,4\(at\)
-[ ]*9c: R_MIPS_LO16 .data
-0+00a0 <[^>]*> lui at,0x0
-[ ]*a0: R_MIPS_GOT_HI16 big_external_data_label
-0+00a4 <[^>]*> addu at,at,gp
-0+00a8 <[^>]*> lw at,0\(at\)
-[ ]*a8: R_MIPS_GOT_LO16 big_external_data_label
-0+00ac <[^>]*> nop
-0+00b0 <[^>]*> lw a0,0\(at\)
-0+00b4 <[^>]*> lw a1,4\(at\)
-0+00b8 <[^>]*> lui at,0x0
-[ ]*b8: R_MIPS_GOT_HI16 small_external_data_label
-0+00bc <[^>]*> addu at,at,gp
-0+00c0 <[^>]*> lw at,0\(at\)
-[ ]*c0: R_MIPS_GOT_LO16 small_external_data_label
-0+00c4 <[^>]*> nop
-0+00c8 <[^>]*> lw a0,0\(at\)
-0+00cc <[^>]*> lw a1,4\(at\)
-0+00d0 <[^>]*> lui at,0x0
-[ ]*d0: R_MIPS_GOT_HI16 big_external_common
-0+00d4 <[^>]*> addu at,at,gp
-0+00d8 <[^>]*> lw at,0\(at\)
-[ ]*d8: R_MIPS_GOT_LO16 big_external_common
-0+00dc <[^>]*> nop
-0+00e0 <[^>]*> lw a0,0\(at\)
-0+00e4 <[^>]*> lw a1,4\(at\)
-0+00e8 <[^>]*> lui at,0x0
-[ ]*e8: R_MIPS_GOT_HI16 small_external_common
-0+00ec <[^>]*> addu at,at,gp
-0+00f0 <[^>]*> lw at,0\(at\)
-[ ]*f0: R_MIPS_GOT_LO16 small_external_common
-0+00f4 <[^>]*> nop
-0+00f8 <[^>]*> lw a0,0\(at\)
-0+00fc <[^>]*> lw a1,4\(at\)
-0+0100 <[^>]*> lw at,0\(gp\)
-[ ]*100: R_MIPS_GOT16 .bss
-0+0104 <[^>]*> nop
-0+0108 <[^>]*> lw a0,0\(at\)
-[ ]*108: R_MIPS_LO16 .bss
-0+010c <[^>]*> lw a1,4\(at\)
-[ ]*10c: R_MIPS_LO16 .bss
-0+0110 <[^>]*> lw at,0\(gp\)
-[ ]*110: R_MIPS_GOT16 .bss
-0+0114 <[^>]*> nop
-0+0118 <[^>]*> lw a0,1000\(at\)
-[ ]*118: R_MIPS_LO16 .bss
-0+011c <[^>]*> lw a1,1004\(at\)
-[ ]*11c: R_MIPS_LO16 .bss
-0+0120 <[^>]*> lw at,0\(gp\)
-[ ]*120: R_MIPS_GOT16 .data
-0+0124 <[^>]*> nop
-0+0128 <[^>]*> lw a0,1\(at\)
-[ ]*128: R_MIPS_LO16 .data
-0+012c <[^>]*> lw a1,5\(at\)
-[ ]*12c: R_MIPS_LO16 .data
-0+0130 <[^>]*> lui at,0x0
-[ ]*130: R_MIPS_GOT_HI16 big_external_data_label
-0+0134 <[^>]*> addu at,at,gp
-0+0138 <[^>]*> lw at,0\(at\)
-[ ]*138: R_MIPS_GOT_LO16 big_external_data_label
-0+013c <[^>]*> nop
-0+0140 <[^>]*> lw a0,1\(at\)
-0+0144 <[^>]*> lw a1,5\(at\)
-0+0148 <[^>]*> lui at,0x0
-[ ]*148: R_MIPS_GOT_HI16 small_external_data_label
-0+014c <[^>]*> addu at,at,gp
-0+0150 <[^>]*> lw at,0\(at\)
-[ ]*150: R_MIPS_GOT_LO16 small_external_data_label
-0+0154 <[^>]*> nop
-0+0158 <[^>]*> lw a0,1\(at\)
-0+015c <[^>]*> lw a1,5\(at\)
-0+0160 <[^>]*> lui at,0x0
-[ ]*160: R_MIPS_GOT_HI16 big_external_common
-0+0164 <[^>]*> addu at,at,gp
-0+0168 <[^>]*> lw at,0\(at\)
-[ ]*168: R_MIPS_GOT_LO16 big_external_common
-0+016c <[^>]*> nop
-0+0170 <[^>]*> lw a0,1\(at\)
-0+0174 <[^>]*> lw a1,5\(at\)
-0+0178 <[^>]*> lui at,0x0
-[ ]*178: R_MIPS_GOT_HI16 small_external_common
-0+017c <[^>]*> addu at,at,gp
-0+0180 <[^>]*> lw at,0\(at\)
-[ ]*180: R_MIPS_GOT_LO16 small_external_common
-0+0184 <[^>]*> nop
-0+0188 <[^>]*> lw a0,1\(at\)
-0+018c <[^>]*> lw a1,5\(at\)
-0+0190 <[^>]*> lw at,0\(gp\)
-[ ]*190: R_MIPS_GOT16 .bss
+[ ]*98: R_MIPS_LO16 \.data
+0+009c <[^>]*> addiu at,at,4
+0+00a0 <[^>]*> lw a1,0\(at\)
+[ ]*a0: R_MIPS_LO16 \.data
+0+00a4 <[^>]*> lui at,0x0
+[ ]*a4: R_MIPS_GOT_HI16 big_external_data_label
+0+00a8 <[^>]*> addu at,at,gp
+0+00ac <[^>]*> lw at,0\(at\)
+[ ]*ac: R_MIPS_GOT_LO16 big_external_data_label
+0+00b0 <[^>]*> nop
+0+00b4 <[^>]*> lw a0,0\(at\)
+0+00b8 <[^>]*> lw a1,4\(at\)
+0+00bc <[^>]*> lui at,0x0
+[ ]*bc: R_MIPS_GOT_HI16 small_external_data_label
+0+00c0 <[^>]*> addu at,at,gp
+0+00c4 <[^>]*> lw at,0\(at\)
+[ ]*c4: R_MIPS_GOT_LO16 small_external_data_label
+0+00c8 <[^>]*> nop
+0+00cc <[^>]*> lw a0,0\(at\)
+0+00d0 <[^>]*> lw a1,4\(at\)
+0+00d4 <[^>]*> lui at,0x0
+[ ]*d4: R_MIPS_GOT_HI16 big_external_common
+0+00d8 <[^>]*> addu at,at,gp
+0+00dc <[^>]*> lw at,0\(at\)
+[ ]*dc: R_MIPS_GOT_LO16 big_external_common
+0+00e0 <[^>]*> nop
+0+00e4 <[^>]*> lw a0,0\(at\)
+0+00e8 <[^>]*> lw a1,4\(at\)
+0+00ec <[^>]*> lui at,0x0
+[ ]*ec: R_MIPS_GOT_HI16 small_external_common
+0+00f0 <[^>]*> addu at,at,gp
+0+00f4 <[^>]*> lw at,0\(at\)
+[ ]*f4: R_MIPS_GOT_LO16 small_external_common
+0+00f8 <[^>]*> nop
+0+00fc <[^>]*> lw a0,0\(at\)
+0+0100 <[^>]*> lw a1,4\(at\)
+0+0104 <[^>]*> lw at,0\(gp\)
+[ ]*104: R_MIPS_GOT16 \.bss
+0+0108 <[^>]*> nop
+0+010c <[^>]*> lw a0,0\(at\)
+[ ]*10c: R_MIPS_LO16 \.bss
+0+0110 <[^>]*> addiu at,at,4
+0+0114 <[^>]*> lw a1,0\(at\)
+[ ]*114: R_MIPS_LO16 \.bss
+0+0118 <[^>]*> lw at,0\(gp\)
+[ ]*118: R_MIPS_GOT16 \.bss
+0+011c <[^>]*> nop
+0+0120 <[^>]*> lw a0,1000\(at\)
+[ ]*120: R_MIPS_LO16 \.bss
+0+0124 <[^>]*> addiu at,at,4
+0+0128 <[^>]*> lw a1,1000\(at\)
+[ ]*128: R_MIPS_LO16 \.bss
+0+012c <[^>]*> lw at,0\(gp\)
+[ ]*12c: R_MIPS_GOT16 \.data
+0+0130 <[^>]*> nop
+0+0134 <[^>]*> lw a0,1\(at\)
+[ ]*134: R_MIPS_LO16 \.data
+0+0138 <[^>]*> addiu at,at,4
+0+013c <[^>]*> lw a1,1\(at\)
+[ ]*13c: R_MIPS_LO16 \.data
+0+0140 <[^>]*> lui at,0x0
+[ ]*140: R_MIPS_GOT_HI16 big_external_data_label
+0+0144 <[^>]*> addu at,at,gp
+0+0148 <[^>]*> lw at,0\(at\)
+[ ]*148: R_MIPS_GOT_LO16 big_external_data_label
+0+014c <[^>]*> nop
+0+0150 <[^>]*> lw a0,1\(at\)
+0+0154 <[^>]*> lw a1,5\(at\)
+0+0158 <[^>]*> lui at,0x0
+[ ]*158: R_MIPS_GOT_HI16 small_external_data_label
+0+015c <[^>]*> addu at,at,gp
+0+0160 <[^>]*> lw at,0\(at\)
+[ ]*160: R_MIPS_GOT_LO16 small_external_data_label
+0+0164 <[^>]*> nop
+0+0168 <[^>]*> lw a0,1\(at\)
+0+016c <[^>]*> lw a1,5\(at\)
+0+0170 <[^>]*> lui at,0x0
+[ ]*170: R_MIPS_GOT_HI16 big_external_common
+0+0174 <[^>]*> addu at,at,gp
+0+0178 <[^>]*> lw at,0\(at\)
+[ ]*178: R_MIPS_GOT_LO16 big_external_common
+0+017c <[^>]*> nop
+0+0180 <[^>]*> lw a0,1\(at\)
+0+0184 <[^>]*> lw a1,5\(at\)
+0+0188 <[^>]*> lui at,0x0
+[ ]*188: R_MIPS_GOT_HI16 small_external_common
+0+018c <[^>]*> addu at,at,gp
+0+0190 <[^>]*> lw at,0\(at\)
+[ ]*190: R_MIPS_GOT_LO16 small_external_common
0+0194 <[^>]*> nop
0+0198 <[^>]*> lw a0,1\(at\)
-[ ]*198: R_MIPS_LO16 .bss
0+019c <[^>]*> lw a1,5\(at\)
-[ ]*19c: R_MIPS_LO16 .bss
0+01a0 <[^>]*> lw at,0\(gp\)
-[ ]*1a0: R_MIPS_GOT16 .bss
+[ ]*1a0: R_MIPS_GOT16 \.bss
0+01a4 <[^>]*> nop
-0+01a8 <[^>]*> lw a0,1001\(at\)
-[ ]*1a8: R_MIPS_LO16 .bss
-0+01ac <[^>]*> lw a1,1005\(at\)
-[ ]*1ac: R_MIPS_LO16 .bss
-0+01b0 <[^>]*> lw at,0\(gp\)
-[ ]*1b0: R_MIPS_GOT16 .data
-0+01b4 <[^>]*> nop
-0+01b8 <[^>]*> addu at,a1,at
-0+01bc <[^>]*> lw a0,0\(at\)
-[ ]*1bc: R_MIPS_LO16 .data
-0+01c0 <[^>]*> lw a1,4\(at\)
-[ ]*1c0: R_MIPS_LO16 .data
-0+01c4 <[^>]*> lui at,0x0
-[ ]*1c4: R_MIPS_GOT_HI16 big_external_data_label
-0+01c8 <[^>]*> addu at,at,gp
-0+01cc <[^>]*> lw at,0\(at\)
-[ ]*1cc: R_MIPS_GOT_LO16 big_external_data_label
-0+01d0 <[^>]*> nop
-0+01d4 <[^>]*> addu at,a1,at
-0+01d8 <[^>]*> lw a0,0\(at\)
-0+01dc <[^>]*> lw a1,4\(at\)
+0+01a8 <[^>]*> lw a0,1\(at\)
+[ ]*1a8: R_MIPS_LO16 \.bss
+0+01ac <[^>]*> addiu at,at,4
+0+01b0 <[^>]*> lw a1,1\(at\)
+[ ]*1b0: R_MIPS_LO16 \.bss
+0+01b4 <[^>]*> lw at,0\(gp\)
+[ ]*1b4: R_MIPS_GOT16 \.bss
+0+01b8 <[^>]*> nop
+0+01bc <[^>]*> lw a0,1001\(at\)
+[ ]*1bc: R_MIPS_LO16 \.bss
+0+01c0 <[^>]*> addiu at,at,4
+0+01c4 <[^>]*> lw a1,1001\(at\)
+[ ]*1c4: R_MIPS_LO16 \.bss
+0+01c8 <[^>]*> lw at,0\(gp\)
+[ ]*1c8: R_MIPS_GOT16 \.data
+0+01cc <[^>]*> nop
+0+01d0 <[^>]*> addu at,a1,at
+0+01d4 <[^>]*> lw a0,0\(at\)
+[ ]*1d4: R_MIPS_LO16 \.data
+0+01d8 <[^>]*> addiu at,at,4
+0+01dc <[^>]*> lw a1,0\(at\)
+[ ]*1dc: R_MIPS_LO16 \.data
0+01e0 <[^>]*> lui at,0x0
-[ ]*1e0: R_MIPS_GOT_HI16 small_external_data_label
+[ ]*1e0: R_MIPS_GOT_HI16 big_external_data_label
0+01e4 <[^>]*> addu at,at,gp
0+01e8 <[^>]*> lw at,0\(at\)
-[ ]*1e8: R_MIPS_GOT_LO16 small_external_data_label
+[ ]*1e8: R_MIPS_GOT_LO16 big_external_data_label
0+01ec <[^>]*> nop
0+01f0 <[^>]*> addu at,a1,at
0+01f4 <[^>]*> lw a0,0\(at\)
0+01f8 <[^>]*> lw a1,4\(at\)
0+01fc <[^>]*> lui at,0x0
-[ ]*1fc: R_MIPS_GOT_HI16 big_external_common
+[ ]*1fc: R_MIPS_GOT_HI16 small_external_data_label
0+0200 <[^>]*> addu at,at,gp
0+0204 <[^>]*> lw at,0\(at\)
-[ ]*204: R_MIPS_GOT_LO16 big_external_common
+[ ]*204: R_MIPS_GOT_LO16 small_external_data_label
0+0208 <[^>]*> nop
0+020c <[^>]*> addu at,a1,at
0+0210 <[^>]*> lw a0,0\(at\)
0+0214 <[^>]*> lw a1,4\(at\)
0+0218 <[^>]*> lui at,0x0
-[ ]*218: R_MIPS_GOT_HI16 small_external_common
+[ ]*218: R_MIPS_GOT_HI16 big_external_common
0+021c <[^>]*> addu at,at,gp
0+0220 <[^>]*> lw at,0\(at\)
-[ ]*220: R_MIPS_GOT_LO16 small_external_common
+[ ]*220: R_MIPS_GOT_LO16 big_external_common
0+0224 <[^>]*> nop
0+0228 <[^>]*> addu at,a1,at
0+022c <[^>]*> lw a0,0\(at\)
0+0230 <[^>]*> lw a1,4\(at\)
-0+0234 <[^>]*> lw at,0\(gp\)
-[ ]*234: R_MIPS_GOT16 .bss
-0+0238 <[^>]*> nop
-0+023c <[^>]*> addu at,a1,at
-0+0240 <[^>]*> lw a0,0\(at\)
-[ ]*240: R_MIPS_LO16 .bss
-0+0244 <[^>]*> lw a1,4\(at\)
-[ ]*244: R_MIPS_LO16 .bss
-0+0248 <[^>]*> lw at,0\(gp\)
-[ ]*248: R_MIPS_GOT16 .bss
-0+024c <[^>]*> nop
-0+0250 <[^>]*> addu at,a1,at
-0+0254 <[^>]*> lw a0,1000\(at\)
-[ ]*254: R_MIPS_LO16 .bss
-0+0258 <[^>]*> lw a1,1004\(at\)
-[ ]*258: R_MIPS_LO16 .bss
-0+025c <[^>]*> lw at,0\(gp\)
-[ ]*25c: R_MIPS_GOT16 .data
-0+0260 <[^>]*> nop
-0+0264 <[^>]*> addu at,a1,at
-0+0268 <[^>]*> lw a0,1\(at\)
-[ ]*268: R_MIPS_LO16 .data
-0+026c <[^>]*> lw a1,5\(at\)
-[ ]*26c: R_MIPS_LO16 .data
-0+0270 <[^>]*> lui at,0x0
-[ ]*270: R_MIPS_GOT_HI16 big_external_data_label
-0+0274 <[^>]*> addu at,at,gp
-0+0278 <[^>]*> lw at,0\(at\)
-[ ]*278: R_MIPS_GOT_LO16 big_external_data_label
-0+027c <[^>]*> nop
-0+0280 <[^>]*> addu at,a1,at
-0+0284 <[^>]*> lw a0,1\(at\)
-0+0288 <[^>]*> lw a1,5\(at\)
-0+028c <[^>]*> lui at,0x0
-[ ]*28c: R_MIPS_GOT_HI16 small_external_data_label
-0+0290 <[^>]*> addu at,at,gp
-0+0294 <[^>]*> lw at,0\(at\)
-[ ]*294: R_MIPS_GOT_LO16 small_external_data_label
-0+0298 <[^>]*> nop
-0+029c <[^>]*> addu at,a1,at
-0+02a0 <[^>]*> lw a0,1\(at\)
-0+02a4 <[^>]*> lw a1,5\(at\)
-0+02a8 <[^>]*> lui at,0x0
-[ ]*2a8: R_MIPS_GOT_HI16 big_external_common
-0+02ac <[^>]*> addu at,at,gp
-0+02b0 <[^>]*> lw at,0\(at\)
-[ ]*2b0: R_MIPS_GOT_LO16 big_external_common
-0+02b4 <[^>]*> nop
-0+02b8 <[^>]*> addu at,a1,at
-0+02bc <[^>]*> lw a0,1\(at\)
-0+02c0 <[^>]*> lw a1,5\(at\)
-0+02c4 <[^>]*> lui at,0x0
-[ ]*2c4: R_MIPS_GOT_HI16 small_external_common
-0+02c8 <[^>]*> addu at,at,gp
-0+02cc <[^>]*> lw at,0\(at\)
-[ ]*2cc: R_MIPS_GOT_LO16 small_external_common
-0+02d0 <[^>]*> nop
-0+02d4 <[^>]*> addu at,a1,at
-0+02d8 <[^>]*> lw a0,1\(at\)
-0+02dc <[^>]*> lw a1,5\(at\)
-0+02e0 <[^>]*> lw at,0\(gp\)
-[ ]*2e0: R_MIPS_GOT16 .bss
-0+02e4 <[^>]*> nop
-0+02e8 <[^>]*> addu at,a1,at
-0+02ec <[^>]*> lw a0,1\(at\)
-[ ]*2ec: R_MIPS_LO16 .bss
-0+02f0 <[^>]*> lw a1,5\(at\)
-[ ]*2f0: R_MIPS_LO16 .bss
-0+02f4 <[^>]*> lw at,0\(gp\)
-[ ]*2f4: R_MIPS_GOT16 .bss
+0+0234 <[^>]*> lui at,0x0
+[ ]*234: R_MIPS_GOT_HI16 small_external_common
+0+0238 <[^>]*> addu at,at,gp
+0+023c <[^>]*> lw at,0\(at\)
+[ ]*23c: R_MIPS_GOT_LO16 small_external_common
+0+0240 <[^>]*> nop
+0+0244 <[^>]*> addu at,a1,at
+0+0248 <[^>]*> lw a0,0\(at\)
+0+024c <[^>]*> lw a1,4\(at\)
+0+0250 <[^>]*> lw at,0\(gp\)
+[ ]*250: R_MIPS_GOT16 \.bss
+0+0254 <[^>]*> nop
+0+0258 <[^>]*> addu at,a1,at
+0+025c <[^>]*> lw a0,0\(at\)
+[ ]*25c: R_MIPS_LO16 \.bss
+0+0260 <[^>]*> addiu at,at,4
+0+0264 <[^>]*> lw a1,0\(at\)
+[ ]*264: R_MIPS_LO16 \.bss
+0+0268 <[^>]*> lw at,0\(gp\)
+[ ]*268: R_MIPS_GOT16 \.bss
+0+026c <[^>]*> nop
+0+0270 <[^>]*> addu at,a1,at
+0+0274 <[^>]*> lw a0,1000\(at\)
+[ ]*274: R_MIPS_LO16 \.bss
+0+0278 <[^>]*> addiu at,at,4
+0+027c <[^>]*> lw a1,1000\(at\)
+[ ]*27c: R_MIPS_LO16 \.bss
+0+0280 <[^>]*> lw at,0\(gp\)
+[ ]*280: R_MIPS_GOT16 \.data
+0+0284 <[^>]*> nop
+0+0288 <[^>]*> addu at,a1,at
+0+028c <[^>]*> lw a0,1\(at\)
+[ ]*28c: R_MIPS_LO16 \.data
+0+0290 <[^>]*> addiu at,at,4
+0+0294 <[^>]*> lw a1,1\(at\)
+[ ]*294: R_MIPS_LO16 \.data
+0+0298 <[^>]*> lui at,0x0
+[ ]*298: R_MIPS_GOT_HI16 big_external_data_label
+0+029c <[^>]*> addu at,at,gp
+0+02a0 <[^>]*> lw at,0\(at\)
+[ ]*2a0: R_MIPS_GOT_LO16 big_external_data_label
+0+02a4 <[^>]*> nop
+0+02a8 <[^>]*> addu at,a1,at
+0+02ac <[^>]*> lw a0,1\(at\)
+0+02b0 <[^>]*> lw a1,5\(at\)
+0+02b4 <[^>]*> lui at,0x0
+[ ]*2b4: R_MIPS_GOT_HI16 small_external_data_label
+0+02b8 <[^>]*> addu at,at,gp
+0+02bc <[^>]*> lw at,0\(at\)
+[ ]*2bc: R_MIPS_GOT_LO16 small_external_data_label
+0+02c0 <[^>]*> nop
+0+02c4 <[^>]*> addu at,a1,at
+0+02c8 <[^>]*> lw a0,1\(at\)
+0+02cc <[^>]*> lw a1,5\(at\)
+0+02d0 <[^>]*> lui at,0x0
+[ ]*2d0: R_MIPS_GOT_HI16 big_external_common
+0+02d4 <[^>]*> addu at,at,gp
+0+02d8 <[^>]*> lw at,0\(at\)
+[ ]*2d8: R_MIPS_GOT_LO16 big_external_common
+0+02dc <[^>]*> nop
+0+02e0 <[^>]*> addu at,a1,at
+0+02e4 <[^>]*> lw a0,1\(at\)
+0+02e8 <[^>]*> lw a1,5\(at\)
+0+02ec <[^>]*> lui at,0x0
+[ ]*2ec: R_MIPS_GOT_HI16 small_external_common
+0+02f0 <[^>]*> addu at,at,gp
+0+02f4 <[^>]*> lw at,0\(at\)
+[ ]*2f4: R_MIPS_GOT_LO16 small_external_common
0+02f8 <[^>]*> nop
0+02fc <[^>]*> addu at,a1,at
-0+0300 <[^>]*> lw a0,1001\(at\)
-[ ]*300: R_MIPS_LO16 .bss
-0+0304 <[^>]*> lw a1,1005\(at\)
-[ ]*304: R_MIPS_LO16 .bss
- ...
+0+0300 <[^>]*> lw a0,1\(at\)
+0+0304 <[^>]*> lw a1,5\(at\)
+0+0308 <[^>]*> lw at,0\(gp\)
+[ ]*308: R_MIPS_GOT16 \.bss
+0+030c <[^>]*> nop
+0+0310 <[^>]*> addu at,a1,at
+0+0314 <[^>]*> lw a0,1\(at\)
+[ ]*314: R_MIPS_LO16 \.bss
+0+0318 <[^>]*> addiu at,at,4
+0+031c <[^>]*> lw a1,1\(at\)
+[ ]*31c: R_MIPS_LO16 \.bss
+0+0320 <[^>]*> lw at,0\(gp\)
+[ ]*320: R_MIPS_GOT16 \.bss
+0+0324 <[^>]*> nop
+0+0328 <[^>]*> addu at,a1,at
+0+032c <[^>]*> lw a0,1001\(at\)
+[ ]*32c: R_MIPS_LO16 \.bss
+0+0330 <[^>]*> addiu at,at,4
+0+0334 <[^>]*> lw a1,1001\(at\)
+[ ]*334: R_MIPS_LO16 \.bss
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld.d 2004-06-27 23:44:48.000000000 +0000
@@ -44,596 +44,670 @@ Disassembly of section .text:
0+0088 <[^>]*> lw a0,-23131\(at\)
0+008c <[^>]*> lw a1,-23127\(at\)
0+0090 <[^>]*> lui at,0x0
-[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0094 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0098 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*98: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+009c <[^>]*> lui at,0x0
-[ ]*9c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+00a0 <[^>]*> lw a0,0\(at\)
-[ ]*a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+00a4 <[^>]*> lw a1,[-0-9]+\(at\)
+[ ]*90: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0094 <[^>]*> lw a0,0\(at\)
+[ ]*94: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0098 <[^>]*> addiu at,at,4
+0+009c <[^>]*> lw a1,0\(at\)
+[ ]*9c: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+00a0 <[^>]*> lui at,0x0
+[ ]*a0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+00a4 <[^>]*> lw a0,0\(at\)
[ ]*a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+00a8 <[^>]*> lw a0,0\(gp\)
-[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+00ac <[^>]*> lw a1,[-0-9]+\(gp\)
-[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+00b0 <[^>]*> lui at,0x0
-[ ]*b0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+00b4 <[^>]*> lw a0,0\(at\)
-[ ]*b4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+00b8 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+00bc <[^>]*> lw a0,0\(gp\)
-[ ]*bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+00c0 <[^>]*> lw a1,[-0-9]+\(gp\)
-[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+00c4 <[^>]*> lui at,0x0
-[ ]*c4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+00c8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+00cc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*cc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+00d0 <[^>]*> lw a0,[-0-9]+\(gp\)
-[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+00d4 <[^>]*> lw a1,[-0-9]+\(gp\)
-[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+00d8 <[^>]*> lui at,0x0
-[ ]*d8: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+00dc <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+00e0 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*e0: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+00e4 <[^>]*> lui at,0x0
-[ ]*e4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+00e8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+00ec <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*ec: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+00f0 <[^>]*> lw a0,1\(gp\)
-[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+00f4 <[^>]*> lw a1,5\(gp\)
-[ ]*f4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+00a8 <[^>]*> addiu at,at,4
+0+00ac <[^>]*> lw a1,0\(at\)
+[ ]*ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+00b0 <[^>]*> lw a0,0\(gp\)
+[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+00b4 <[^>]*> lw a1,4\(gp\)
+[ ]*b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+00b8 <[^>]*> lui at,0x0
+[ ]*b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+00bc <[^>]*> lw a0,0\(at\)
+[ ]*bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+00c0 <[^>]*> addiu at,at,4
+0+00c4 <[^>]*> lw a1,0\(at\)
+[ ]*c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+00c8 <[^>]*> lw a0,0\(gp\)
+[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+00cc <[^>]*> lw a1,4\(gp\)
+[ ]*cc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+00d0 <[^>]*> lui at,0x0
+[ ]*d0: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+00d4 <[^>]*> lw a0,0\(at\)
+[ ]*d4: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+00d8 <[^>]*> addiu at,at,4
+0+00dc <[^>]*> lw a1,0\(at\)
+[ ]*dc: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+00e0 <[^>]*> lw a0,[-0-9]+\(gp\)
+[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+00e4 <[^>]*> lw a1,[-0-9]+\(gp\)
+[ ]*e4: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+00e8 <[^>]*> lui at,0x0
+[ ]*e8: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+00ec <[^>]*> lw a0,1\(at\)
+[ ]*ec: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+00f0 <[^>]*> addiu at,at,4
+0+00f4 <[^>]*> lw a1,1\(at\)
+[ ]*f4: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
0+00f8 <[^>]*> lui at,0x0
-[ ]*f8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+00fc <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0100 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*100: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0104 <[^>]*> lw a0,1\(gp\)
-[ ]*104: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+0108 <[^>]*> lw a1,5\(gp\)
-[ ]*108: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+010c <[^>]*> lui at,0x0
-[ ]*10c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0110 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*110: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0114 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*114: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0118 <[^>]*> lw a0,[-0-9]+\(gp\)
-[ ]*118: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+011c <[^>]*> lw a1,[-0-9]+\(gp\)
-[ ]*11c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+0120 <[^>]*> lui at,[-0-9x]+
-[ ]*120: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0124 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*124: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0128 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*128: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+012c <[^>]*> lui at,[-0-9x]+
-[ ]*12c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+0130 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*130: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0134 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0138 <[^>]*> lui at,[-0-9x]+
-[ ]*138: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+013c <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*13c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0140 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*140: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0144 <[^>]*> lui at,[-0-9x]+
-[ ]*144: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+0148 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*148: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+014c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+[ ]*f8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+00fc <[^>]*> lw a0,1\(at\)
+[ ]*fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0100 <[^>]*> addiu at,at,4
+0+0104 <[^>]*> lw a1,1\(at\)
+[ ]*104: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0108 <[^>]*> lw a0,1\(gp\)
+[ ]*108: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+010c <[^>]*> lw a1,5\(gp\)
+[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+0110 <[^>]*> lui at,0x0
+[ ]*110: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+0114 <[^>]*> lw a0,1\(at\)
+[ ]*114: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0118 <[^>]*> addiu at,at,4
+0+011c <[^>]*> lw a1,1\(at\)
+[ ]*11c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0120 <[^>]*> lw a0,1\(gp\)
+[ ]*120: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+0124 <[^>]*> lw a1,5\(gp\)
+[ ]*124: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+0128 <[^>]*> lui at,0x0
+[ ]*128: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+012c <[^>]*> lw a0,1\(at\)
+[ ]*12c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0130 <[^>]*> addiu at,at,4
+0+0134 <[^>]*> lw a1,1\(at\)
+[ ]*134: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0138 <[^>]*> lw a0,[-0-9]+\(gp\)
+[ ]*138: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+013c <[^>]*> lw a1,[-0-9]+\(gp\)
+[ ]*13c: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+0140 <[^>]*> lui at,[-0-9x]+
+[ ]*140: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0144 <[^>]*> lw a0,-32768\(at\)
+[ ]*144: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0148 <[^>]*> addiu at,at,4
+0+014c <[^>]*> lw a1,-32768\(at\)
+[ ]*14c: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
0+0150 <[^>]*> lui at,[-0-9x]+
-[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+0154 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0158 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*158: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+015c <[^>]*> lui at,[-0-9x]+
-[ ]*15c: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0160 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*160: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0164 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0168 <[^>]*> lui at,[-0-9x]+
-[ ]*168: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+016c <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0170 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*170: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0174 <[^>]*> lui at,0x0
-[ ]*174: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0178 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*178: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+017c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0180 <[^>]*> lui at,0x0
-[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+0184 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0188 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*188: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+018c <[^>]*> lui at,0x0
-[ ]*18c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+0190 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*190: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0194 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0198 <[^>]*> lui at,0x0
-[ ]*198: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+019c <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+01a0 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1a0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+01a4 <[^>]*> lui at,0x0
-[ ]*1a4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+01a8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*1a8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+01ac <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+[ ]*150: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0154 <[^>]*> lw a0,-32768\(at\)
+[ ]*154: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0158 <[^>]*> addiu at,at,4
+0+015c <[^>]*> lw a1,-32768\(at\)
+[ ]*15c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0160 <[^>]*> lui at,[-0-9x]+
+[ ]*160: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+0164 <[^>]*> lw a0,-32768\(at\)
+[ ]*164: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0168 <[^>]*> addiu at,at,4
+0+016c <[^>]*> lw a1,-32768\(at\)
+[ ]*16c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0170 <[^>]*> lui at,[-0-9x]+
+[ ]*170: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+0174 <[^>]*> lw a0,-32768\(at\)
+[ ]*174: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0178 <[^>]*> addiu at,at,4
+0+017c <[^>]*> lw a1,-32768\(at\)
+[ ]*17c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0180 <[^>]*> lui at,[-0-9x]+
+[ ]*180: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+0184 <[^>]*> lw a0,-32768\(at\)
+[ ]*184: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0188 <[^>]*> addiu at,at,4
+0+018c <[^>]*> lw a1,-32768\(at\)
+[ ]*18c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0190 <[^>]*> lui at,[-0-9x]+
+[ ]*190: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0194 <[^>]*> lw a0,-32768\(at\)
+[ ]*194: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0198 <[^>]*> addiu at,at,4
+0+019c <[^>]*> lw a1,-32768\(at\)
+[ ]*19c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+01a0 <[^>]*> lui at,[-0-9x]+
+[ ]*1a0: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+01a4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1a4: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+01a8 <[^>]*> addiu at,at,4
+0+01ac <[^>]*> lw a1,-32768\(at\)
+[ ]*1ac: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
0+01b0 <[^>]*> lui at,0x0
-[ ]*1b0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+01b4 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+01b8 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1b8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+01bc <[^>]*> lui at,0x0
-[ ]*1bc: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+01c0 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*1c0: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+01c4 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1c4: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+01c8 <[^>]*> lui at,[-0-9x]+
-[ ]*1c8: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+01cc <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+01d0 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1d0: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+01d4 <[^>]*> lui at,[-0-9x]+
-[ ]*1d4: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+01d8 <[^>]*> lw a0,0\(at\)
-[ ]*1d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+01dc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+01e0 <[^>]*> lui at,[-0-9x]+
-[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+01e4 <[^>]*> lw a0,0\(at\)
-[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+01e8 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+01ec <[^>]*> lui at,[-0-9x]+
-[ ]*1ec: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+01f0 <[^>]*> lw a0,0\(at\)
-[ ]*1f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+01f4 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+01f8 <[^>]*> lui at,[-0-9x]+
-[ ]*1f8: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+01fc <[^>]*> lw a0,0\(at\)
+[ ]*1b0: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+01b4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1b4: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+01b8 <[^>]*> addiu at,at,4
+0+01bc <[^>]*> lw a1,-32768\(at\)
+[ ]*1bc: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+01c0 <[^>]*> lui at,0x0
+[ ]*1c0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+01c4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+01c8 <[^>]*> addiu at,at,4
+0+01cc <[^>]*> lw a1,-32768\(at\)
+[ ]*1cc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+01d0 <[^>]*> lui at,0x0
+[ ]*1d0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+01d4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1d4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+01d8 <[^>]*> addiu at,at,4
+0+01dc <[^>]*> lw a1,-32768\(at\)
+[ ]*1dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+01e0 <[^>]*> lui at,0x0
+[ ]*1e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+01e4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1e4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+01e8 <[^>]*> addiu at,at,4
+0+01ec <[^>]*> lw a1,-32768\(at\)
+[ ]*1ec: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+01f0 <[^>]*> lui at,0x0
+[ ]*1f0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+01f4 <[^>]*> lw a0,-32768\(at\)
+[ ]*1f4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+01f8 <[^>]*> addiu at,at,4
+0+01fc <[^>]*> lw a1,-32768\(at\)
[ ]*1fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0200 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*200: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0204 <[^>]*> lui at,[-0-9x]+
-[ ]*204: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0208 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*208: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+020c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0210 <[^>]*> lui at,[-0-9x]+
-[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+0214 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0218 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*218: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+021c <[^>]*> lui at,[-0-9x]+
-[ ]*21c: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0220 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*220: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0224 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0228 <[^>]*> lui at,[-0-9x]+
-[ ]*228: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+022c <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0230 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*230: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0234 <[^>]*> lui at,[-0-9x]+
-[ ]*234: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+0238 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*238: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+023c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0200 <[^>]*> lui at,0x0
+[ ]*200: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0204 <[^>]*> lw a0,-32768\(at\)
+[ ]*204: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0208 <[^>]*> addiu at,at,4
+0+020c <[^>]*> lw a1,-32768\(at\)
+[ ]*20c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0210 <[^>]*> lui at,0x0
+[ ]*210: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+0214 <[^>]*> lw a0,-32768\(at\)
+[ ]*214: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0218 <[^>]*> addiu at,at,4
+0+021c <[^>]*> lw a1,-32768\(at\)
+[ ]*21c: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0220 <[^>]*> lui at,[-0-9x]+
+[ ]*220: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0224 <[^>]*> lw a0,0\(at\)
+[ ]*224: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0228 <[^>]*> addiu at,at,4
+0+022c <[^>]*> lw a1,0\(at\)
+[ ]*22c: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0230 <[^>]*> lui at,[-0-9x]+
+[ ]*230: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0234 <[^>]*> lw a0,0\(at\)
+[ ]*234: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0238 <[^>]*> addiu at,at,4
+0+023c <[^>]*> lw a1,0\(at\)
+[ ]*23c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
0+0240 <[^>]*> lui at,[-0-9x]+
-[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+0244 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0248 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*248: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+024c <[^>]*> lui at,[-0-9x]+
-[ ]*24c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+0250 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*250: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0254 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0258 <[^>]*> lui at,[-0-9x]+
-[ ]*258: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+025c <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0260 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*260: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0264 <[^>]*> lui at,[-0-9x]+
-[ ]*264: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+0268 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*268: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+026c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0270 <[^>]*> lui at,0x0
-[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0274 <[^>]*> addu at,a1,at
-0+0278 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*278: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+027c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0280 <[^>]*> lui at,0x0
-[ ]*280: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+0284 <[^>]*> addu at,a1,at
-0+0288 <[^>]*> lw a0,0\(at\)
-[ ]*288: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+028c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0290 <[^>]*> nop
-0+0294 <[^>]*> addu at,a1,gp
-0+0298 <[^>]*> lw a0,0\(at\)
-[ ]*298: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+029c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*29c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+02a0 <[^>]*> lui at,0x0
-[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+02a4 <[^>]*> addu at,a1,at
-0+02a8 <[^>]*> lw a0,0\(at\)
-[ ]*2a8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+02ac <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+02b0 <[^>]*> nop
-0+02b4 <[^>]*> addu at,a1,gp
-0+02b8 <[^>]*> lw a0,0\(at\)
-[ ]*2b8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+02bc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+02c0 <[^>]*> lui at,0x0
-[ ]*2c0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+02c4 <[^>]*> addu at,a1,at
-0+02c8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*2c8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+02cc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+02d0 <[^>]*> nop
-0+02d4 <[^>]*> addu at,a1,gp
-0+02d8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*2d8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+02dc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2dc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+02e0 <[^>]*> lui at,0x0
-[ ]*2e0: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+02e4 <[^>]*> addu at,a1,at
-0+02e8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*2e8: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+02ec <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2ec: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+02f0 <[^>]*> lui at,0x0
-[ ]*2f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+02f4 <[^>]*> addu at,a1,at
-0+02f8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*2f8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+02fc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0300 <[^>]*> nop
-0+0304 <[^>]*> addu at,a1,gp
-0+0308 <[^>]*> lw a0,1\(at\)
-[ ]*308: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+030c <[^>]*> lw a1,5\(at\)
-[ ]*30c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
-0+0310 <[^>]*> lui at,0x0
-[ ]*310: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+0314 <[^>]*> addu at,a1,at
-0+0318 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*318: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+031c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0320 <[^>]*> nop
-0+0324 <[^>]*> addu at,a1,gp
-0+0328 <[^>]*> lw a0,1\(at\)
-[ ]*328: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+032c <[^>]*> lw a1,5\(at\)
-[ ]*32c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
-0+0330 <[^>]*> lui at,0x0
-[ ]*330: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0334 <[^>]*> addu at,a1,at
-0+0338 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*338: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+033c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*33c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0340 <[^>]*> nop
-0+0344 <[^>]*> addu at,a1,gp
-0+0348 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*348: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+034c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*34c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.*
-0+0350 <[^>]*> lui at,[-0-9x]+
-[ ]*350: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0354 <[^>]*> addu at,a1,at
-0+0358 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*358: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+035c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*35c: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0360 <[^>]*> lui at,[-0-9x]+
-[ ]*360: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+0364 <[^>]*> addu at,a1,at
-0+0368 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*368: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+036c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*36c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+0370 <[^>]*> lui at,[-0-9x]+
-[ ]*370: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+0374 <[^>]*> addu at,a1,at
+[ ]*240: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+0244 <[^>]*> lw a0,0\(at\)
+[ ]*244: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0248 <[^>]*> addiu at,at,4
+0+024c <[^>]*> lw a1,0\(at\)
+[ ]*24c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0250 <[^>]*> lui at,[-0-9x]+
+[ ]*250: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+0254 <[^>]*> lw a0,0\(at\)
+[ ]*254: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0258 <[^>]*> addiu at,at,4
+0+025c <[^>]*> lw a1,0\(at\)
+[ ]*25c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0260 <[^>]*> lui at,[-0-9x]+
+[ ]*260: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+0264 <[^>]*> lw a0,0\(at\)
+[ ]*264: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0268 <[^>]*> addiu at,at,4
+0+026c <[^>]*> lw a1,0\(at\)
+[ ]*26c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0270 <[^>]*> lui at,[-0-9x]+
+[ ]*270: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0274 <[^>]*> lw a0,0\(at\)
+[ ]*274: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0278 <[^>]*> addiu at,at,4
+0+027c <[^>]*> lw a1,0\(at\)
+[ ]*27c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0280 <[^>]*> lui at,[-0-9x]+
+[ ]*280: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+0284 <[^>]*> lw a0,0\(at\)
+[ ]*284: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0288 <[^>]*> addiu at,at,4
+0+028c <[^>]*> lw a1,0\(at\)
+[ ]*28c: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0290 <[^>]*> lui at,[-0-9x]+
+[ ]*290: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0294 <[^>]*> lw a0,-23131\(at\)
+[ ]*294: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0298 <[^>]*> addiu at,at,4
+0+029c <[^>]*> lw a1,-23131\(at\)
+[ ]*29c: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+02a0 <[^>]*> lui at,[-0-9x]+
+[ ]*2a0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+02a4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+02a8 <[^>]*> addiu at,at,4
+0+02ac <[^>]*> lw a1,-23131\(at\)
+[ ]*2ac: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+02b0 <[^>]*> lui at,[-0-9x]+
+[ ]*2b0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+02b4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2b4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+02b8 <[^>]*> addiu at,at,4
+0+02bc <[^>]*> lw a1,-23131\(at\)
+[ ]*2bc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+02c0 <[^>]*> lui at,[-0-9x]+
+[ ]*2c0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+02c4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+02c8 <[^>]*> addiu at,at,4
+0+02cc <[^>]*> lw a1,-23131\(at\)
+[ ]*2cc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+02d0 <[^>]*> lui at,[-0-9x]+
+[ ]*2d0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+02d4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2d4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+02d8 <[^>]*> addiu at,at,4
+0+02dc <[^>]*> lw a1,-23131\(at\)
+[ ]*2dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+02e0 <[^>]*> lui at,[-0-9x]+
+[ ]*2e0: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+02e4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2e4: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+02e8 <[^>]*> addiu at,at,4
+0+02ec <[^>]*> lw a1,-23131\(at\)
+[ ]*2ec: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+02f0 <[^>]*> lui at,[-0-9x]+
+[ ]*2f0: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+02f4 <[^>]*> lw a0,-23131\(at\)
+[ ]*2f4: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+02f8 <[^>]*> addiu at,at,4
+0+02fc <[^>]*> lw a1,-23131\(at\)
+[ ]*2fc: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0300 <[^>]*> lui at,0x0
+[ ]*300: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0304 <[^>]*> addu at,a1,at
+0+0308 <[^>]*> lw a0,0\(at\)
+[ ]*308: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+030c <[^>]*> addiu at,at,4
+0+0310 <[^>]*> lw a1,0\(at\)
+[ ]*310: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0314 <[^>]*> lui at,0x0
+[ ]*314: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0318 <[^>]*> addu at,a1,at
+0+031c <[^>]*> lw a0,0\(at\)
+[ ]*31c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0320 <[^>]*> addiu at,at,4
+0+0324 <[^>]*> lw a1,0\(at\)
+[ ]*324: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0328 <[^>]*> nop
+0+032c <[^>]*> addu at,a1,gp
+0+0330 <[^>]*> lw a0,0\(at\)
+[ ]*330: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+0334 <[^>]*> lw a1,4\(at\)
+[ ]*334: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+0338 <[^>]*> lui at,0x0
+[ ]*338: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+033c <[^>]*> addu at,a1,at
+0+0340 <[^>]*> lw a0,0\(at\)
+[ ]*340: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0344 <[^>]*> addiu at,at,4
+0+0348 <[^>]*> lw a1,0\(at\)
+[ ]*348: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+034c <[^>]*> nop
+0+0350 <[^>]*> addu at,a1,gp
+0+0354 <[^>]*> lw a0,0\(at\)
+[ ]*354: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+0358 <[^>]*> lw a1,4\(at\)
+[ ]*358: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+035c <[^>]*> lui at,0x0
+[ ]*35c: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0360 <[^>]*> addu at,a1,at
+0+0364 <[^>]*> lw a0,0\(at\)
+[ ]*364: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0368 <[^>]*> addiu at,at,4
+0+036c <[^>]*> lw a1,0\(at\)
+[ ]*36c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0370 <[^>]*> nop
+0+0374 <[^>]*> addu at,a1,gp
0+0378 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*378: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+[ ]*378: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
0+037c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*37c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0380 <[^>]*> lui at,[-0-9x]+
-[ ]*380: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+[ ]*37c: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+0380 <[^>]*> lui at,0x0
+[ ]*380: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
0+0384 <[^>]*> addu at,a1,at
-0+0388 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*388: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+038c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*38c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0390 <[^>]*> lui at,[-0-9x]+
-[ ]*390: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+0394 <[^>]*> addu at,a1,at
-0+0398 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*398: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+039c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*39c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+03a0 <[^>]*> lui at,[-0-9x]+
-[ ]*3a0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+03a4 <[^>]*> addu at,a1,at
-0+03a8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3a8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+03ac <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3ac: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+03b0 <[^>]*> lui at,[-0-9x]+
-[ ]*3b0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+03b4 <[^>]*> addu at,a1,at
-0+03b8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3b8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+03bc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3bc: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+03c0 <[^>]*> lui at,0x0
-[ ]*3c0: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+03c4 <[^>]*> addu at,a1,at
-0+03c8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3c8: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+03cc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3cc: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+03d0 <[^>]*> lui at,0x0
-[ ]*3d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+03d4 <[^>]*> addu at,a1,at
-0+03d8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+03dc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+03e0 <[^>]*> lui at,0x0
-[ ]*3e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+03e4 <[^>]*> addu at,a1,at
-0+03e8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+03ec <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3ec: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+03f0 <[^>]*> lui at,0x0
-[ ]*3f0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+03f4 <[^>]*> addu at,a1,at
+0+0388 <[^>]*> lw a0,1\(at\)
+[ ]*388: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+038c <[^>]*> addiu at,at,4
+0+0390 <[^>]*> lw a1,1\(at\)
+[ ]*390: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0394 <[^>]*> lui at,0x0
+[ ]*394: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0398 <[^>]*> addu at,a1,at
+0+039c <[^>]*> lw a0,1\(at\)
+[ ]*39c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+03a0 <[^>]*> addiu at,at,4
+0+03a4 <[^>]*> lw a1,1\(at\)
+[ ]*3a4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+03a8 <[^>]*> nop
+0+03ac <[^>]*> addu at,a1,gp
+0+03b0 <[^>]*> lw a0,1\(at\)
+[ ]*3b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+03b4 <[^>]*> lw a1,5\(at\)
+[ ]*3b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label
+0+03b8 <[^>]*> lui at,0x0
+[ ]*3b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+03bc <[^>]*> addu at,a1,at
+0+03c0 <[^>]*> lw a0,1\(at\)
+[ ]*3c0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+03c4 <[^>]*> addiu at,at,4
+0+03c8 <[^>]*> lw a1,1\(at\)
+[ ]*3c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+03cc <[^>]*> nop
+0+03d0 <[^>]*> addu at,a1,gp
+0+03d4 <[^>]*> lw a0,1\(at\)
+[ ]*3d4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+03d8 <[^>]*> lw a1,5\(at\)
+[ ]*3d8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common
+0+03dc <[^>]*> lui at,0x0
+[ ]*3dc: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+03e0 <[^>]*> addu at,a1,at
+0+03e4 <[^>]*> lw a0,1\(at\)
+[ ]*3e4: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+03e8 <[^>]*> addiu at,at,4
+0+03ec <[^>]*> lw a1,1\(at\)
+[ ]*3ec: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+03f0 <[^>]*> nop
+0+03f4 <[^>]*> addu at,a1,gp
0+03f8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*3f8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+[ ]*3f8: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
0+03fc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*3fc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0400 <[^>]*> lui at,0x0
-[ ]*400: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+[ ]*3fc: [A-Z0-9_]*GPREL[A-Z0-9_]* \.sbss.*
+0+0400 <[^>]*> lui at,[-0-9x]+
+[ ]*400: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
0+0404 <[^>]*> addu at,a1,at
-0+0408 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*408: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+040c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*40c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0410 <[^>]*> lui at,0x0
-[ ]*410: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0414 <[^>]*> addu at,a1,at
-0+0418 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*418: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+041c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*41c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0420 <[^>]*> lui at,0x0
-[ ]*420: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+0424 <[^>]*> addu at,a1,at
-0+0428 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*428: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+042c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*42c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0430 <[^>]*> lui at,[-0-9x]+
-[ ]*430: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
-0+0434 <[^>]*> addu at,a1,at
-0+0438 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*438: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+043c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*43c: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+0440 <[^>]*> lui at,[-0-9x]+
-[ ]*440: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+0444 <[^>]*> addu at,a1,at
-0+0448 <[^>]*> lw a0,0\(at\)
-[ ]*448: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+044c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*44c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0408 <[^>]*> lw a0,-32768\(at\)
+[ ]*408: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+040c <[^>]*> addiu at,at,4
+0+0410 <[^>]*> lw a1,-32768\(at\)
+[ ]*410: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0414 <[^>]*> lui at,[-0-9x]+
+[ ]*414: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0418 <[^>]*> addu at,a1,at
+0+041c <[^>]*> lw a0,-32768\(at\)
+[ ]*41c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0420 <[^>]*> addiu at,at,4
+0+0424 <[^>]*> lw a1,-32768\(at\)
+[ ]*424: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0428 <[^>]*> lui at,[-0-9x]+
+[ ]*428: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+042c <[^>]*> addu at,a1,at
+0+0430 <[^>]*> lw a0,-32768\(at\)
+[ ]*430: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0434 <[^>]*> addiu at,at,4
+0+0438 <[^>]*> lw a1,-32768\(at\)
+[ ]*438: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+043c <[^>]*> lui at,[-0-9x]+
+[ ]*43c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+0440 <[^>]*> addu at,a1,at
+0+0444 <[^>]*> lw a0,-32768\(at\)
+[ ]*444: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0448 <[^>]*> addiu at,at,4
+0+044c <[^>]*> lw a1,-32768\(at\)
+[ ]*44c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
0+0450 <[^>]*> lui at,[-0-9x]+
-[ ]*450: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+[ ]*450: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
0+0454 <[^>]*> addu at,a1,at
-0+0458 <[^>]*> lw a0,0\(at\)
-[ ]*458: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+045c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*45c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+0460 <[^>]*> lui at,[-0-9x]+
-[ ]*460: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+0464 <[^>]*> addu at,a1,at
-0+0468 <[^>]*> lw a0,0\(at\)
-[ ]*468: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+046c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*46c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+0470 <[^>]*> lui at,[-0-9x]+
-[ ]*470: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+0474 <[^>]*> addu at,a1,at
-0+0478 <[^>]*> lw a0,0\(at\)
-[ ]*478: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+047c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*47c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0480 <[^>]*> lui at,[-0-9x]+
-[ ]*480: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+0484 <[^>]*> addu at,a1,at
-0+0488 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*488: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+048c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*48c: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0490 <[^>]*> lui at,[-0-9x]+
-[ ]*490: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+0494 <[^>]*> addu at,a1,at
-0+0498 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*498: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+049c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*49c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+04a0 <[^>]*> lui at,[-0-9x]+
-[ ]*4a0: [A-Z0-9_]*HI[A-Z0-9_]* .data.*
+0+0458 <[^>]*> lw a0,-32768\(at\)
+[ ]*458: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+045c <[^>]*> addiu at,at,4
+0+0460 <[^>]*> lw a1,-32768\(at\)
+[ ]*460: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0464 <[^>]*> lui at,[-0-9x]+
+[ ]*464: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0468 <[^>]*> addu at,a1,at
+0+046c <[^>]*> lw a0,-32768\(at\)
+[ ]*46c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0470 <[^>]*> addiu at,at,4
+0+0474 <[^>]*> lw a1,-32768\(at\)
+[ ]*474: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0478 <[^>]*> lui at,[-0-9x]+
+[ ]*478: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+047c <[^>]*> addu at,a1,at
+0+0480 <[^>]*> lw a0,-32768\(at\)
+[ ]*480: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0484 <[^>]*> addiu at,at,4
+0+0488 <[^>]*> lw a1,-32768\(at\)
+[ ]*488: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+048c <[^>]*> lui at,0x0
+[ ]*48c: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+0490 <[^>]*> addu at,a1,at
+0+0494 <[^>]*> lw a0,-32768\(at\)
+[ ]*494: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0498 <[^>]*> addiu at,at,4
+0+049c <[^>]*> lw a1,-32768\(at\)
+[ ]*49c: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+04a0 <[^>]*> lui at,0x0
+[ ]*4a0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
0+04a4 <[^>]*> addu at,a1,at
-0+04a8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4a8: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+04ac <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*4ac: [A-Z0-9_]*LO[A-Z0-9_]* .data.*
-0+04b0 <[^>]*> lui at,[-0-9x]+
-[ ]*4b0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
-0+04b4 <[^>]*> addu at,a1,at
-0+04b8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4b8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+04bc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*4bc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
-0+04c0 <[^>]*> lui at,[-0-9x]+
-[ ]*4c0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
-0+04c4 <[^>]*> addu at,a1,at
-0+04c8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4c8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+04cc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*4cc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
-0+04d0 <[^>]*> lui at,[-0-9x]+
-[ ]*4d0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+04d4 <[^>]*> addu at,a1,at
-0+04d8 <[^>]*> lw a0,[-0-9]+\(at\)
+0+04a8 <[^>]*> lw a0,-32768\(at\)
+[ ]*4a8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+04ac <[^>]*> addiu at,at,4
+0+04b0 <[^>]*> lw a1,-32768\(at\)
+[ ]*4b0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+04b4 <[^>]*> lui at,0x0
+[ ]*4b4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+04b8 <[^>]*> addu at,a1,at
+0+04bc <[^>]*> lw a0,-32768\(at\)
+[ ]*4bc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+04c0 <[^>]*> addiu at,at,4
+0+04c4 <[^>]*> lw a1,-32768\(at\)
+[ ]*4c4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+04c8 <[^>]*> lui at,0x0
+[ ]*4c8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+04cc <[^>]*> addu at,a1,at
+0+04d0 <[^>]*> lw a0,-32768\(at\)
+[ ]*4d0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+04d4 <[^>]*> addiu at,at,4
+0+04d8 <[^>]*> lw a1,-32768\(at\)
[ ]*4d8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+04dc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*4dc: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+04e0 <[^>]*> lui at,[-0-9x]+
-[ ]*4e0: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+04e4 <[^>]*> addu at,a1,at
-0+04e8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4e8: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+04ec <[^>]*> lw a1,[-0-9]+\(at\)
+0+04dc <[^>]*> lui at,0x0
+[ ]*4dc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+04e0 <[^>]*> addu at,a1,at
+0+04e4 <[^>]*> lw a0,-32768\(at\)
+[ ]*4e4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+04e8 <[^>]*> addiu at,at,4
+0+04ec <[^>]*> lw a1,-32768\(at\)
[ ]*4ec: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+04f0 <[^>]*> lui at,[-0-9x]+
-[ ]*4f0: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
+0+04f0 <[^>]*> lui at,0x0
+[ ]*4f0: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
0+04f4 <[^>]*> addu at,a1,at
-0+04f8 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4f8: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+04fc <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*4fc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
-0+0500 <[^>]*> lui at,[-0-9x]+
-[ ]*500: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+0504 <[^>]*> addu at,a1,at
-0+0508 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*508: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+050c <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*50c: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+0510 <[^>]*> lwc1 \$f[45],0\(zero\)
-0+0514 <[^>]*> lwc1 \$f[45],4\(zero\)
-0+0518 <[^>]*> lwc1 \$f[45],1\(zero\)
-0+051c <[^>]*> lwc1 \$f[45],5\(zero\)
-0+0520 <[^>]*> lui at,0x1
-0+0524 <[^>]*> lwc1 \$f[45],-32768\(at\)
-0+0528 <[^>]*> lwc1 \$f[45],-32764\(at\)
-0+052c <[^>]*> lwc1 \$f[45],-32768\(zero\)
-0+0530 <[^>]*> lwc1 \$f[45],-32764\(zero\)
-0+0534 <[^>]*> lwc1 \$f[45],0\(a1\)
-0+0538 <[^>]*> lwc1 \$f[45],4\(a1\)
-0+053c <[^>]*> lwc1 \$f[45],1\(a1\)
-0+0540 <[^>]*> lwc1 \$f[45],5\(a1\)
-0+0544 <[^>]*> lui at,0x1
-0+0548 <[^>]*> addu at,a1,at
-0+054c <[^>]*> lwc1 \$f[45],-32768\(at\)
-0+0550 <[^>]*> lwc1 \$f[45],-32764\(at\)
-0+0554 <[^>]*> lwc1 \$f[45],-32768\(a1\)
-0+0558 <[^>]*> lwc1 \$f[45],-32764\(a1\)
-0+055c <[^>]*> lui at,[-0-9x]+
-[ ]*55c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
-0+0560 <[^>]*> addu at,a1,at
-0+0564 <[^>]*> lwc1 \$f[45],[-0-9]+\(at\)
-[ ]*564: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+0568 <[^>]*> lwc1 \$f[45],[-0-9]+\(at\)
-[ ]*568: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
-0+056c <[^>]*> nop
-0+0570 <[^>]*> swc1 \$f[45],0\(zero\)
-0+0574 <[^>]*> swc1 \$f[45],4\(zero\)
-0+0578 <[^>]*> swc1 \$f[45],1\(zero\)
-0+057c <[^>]*> swc1 \$f[45],5\(zero\)
-0+0580 <[^>]*> lui at,0x1
-0+0584 <[^>]*> swc1 \$f[45],-32768\(at\)
-0+0588 <[^>]*> swc1 \$f[45],-32764\(at\)
-0+058c <[^>]*> swc1 \$f[45],-32768\(zero\)
-0+0590 <[^>]*> swc1 \$f[45],-32764\(zero\)
-0+0594 <[^>]*> swc1 \$f[45],0\(a1\)
-0+0598 <[^>]*> swc1 \$f[45],4\(a1\)
-0+059c <[^>]*> swc1 \$f[45],1\(a1\)
-0+05a0 <[^>]*> swc1 \$f[45],5\(a1\)
-0+05a4 <[^>]*> lui at,0x1
+0+04f8 <[^>]*> lw a0,-32768\(at\)
+[ ]*4f8: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+04fc <[^>]*> addiu at,at,4
+0+0500 <[^>]*> lw a1,-32768\(at\)
+[ ]*500: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0504 <[^>]*> lui at,0x0
+[ ]*504: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+0508 <[^>]*> addu at,a1,at
+0+050c <[^>]*> lw a0,-32768\(at\)
+[ ]*50c: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0510 <[^>]*> addiu at,at,4
+0+0514 <[^>]*> lw a1,-32768\(at\)
+[ ]*514: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0518 <[^>]*> lui at,[-0-9x]+
+[ ]*518: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
+0+051c <[^>]*> addu at,a1,at
+0+0520 <[^>]*> lw a0,0\(at\)
+[ ]*520: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+0524 <[^>]*> addiu at,at,4
+0+0528 <[^>]*> lw a1,0\(at\)
+[ ]*528: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+052c <[^>]*> lui at,[-0-9x]+
+[ ]*52c: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+0530 <[^>]*> addu at,a1,at
+0+0534 <[^>]*> lw a0,0\(at\)
+[ ]*534: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0538 <[^>]*> addiu at,at,4
+0+053c <[^>]*> lw a1,0\(at\)
+[ ]*53c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+0540 <[^>]*> lui at,[-0-9x]+
+[ ]*540: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+0544 <[^>]*> addu at,a1,at
+0+0548 <[^>]*> lw a0,0\(at\)
+[ ]*548: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+054c <[^>]*> addiu at,at,4
+0+0550 <[^>]*> lw a1,0\(at\)
+[ ]*550: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+0554 <[^>]*> lui at,[-0-9x]+
+[ ]*554: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+0558 <[^>]*> addu at,a1,at
+0+055c <[^>]*> lw a0,0\(at\)
+[ ]*55c: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0560 <[^>]*> addiu at,at,4
+0+0564 <[^>]*> lw a1,0\(at\)
+[ ]*564: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+0568 <[^>]*> lui at,[-0-9x]+
+[ ]*568: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+056c <[^>]*> addu at,a1,at
+0+0570 <[^>]*> lw a0,0\(at\)
+[ ]*570: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0574 <[^>]*> addiu at,at,4
+0+0578 <[^>]*> lw a1,0\(at\)
+[ ]*578: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+057c <[^>]*> lui at,[-0-9x]+
+[ ]*57c: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0580 <[^>]*> addu at,a1,at
+0+0584 <[^>]*> lw a0,0\(at\)
+[ ]*584: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0588 <[^>]*> addiu at,at,4
+0+058c <[^>]*> lw a1,0\(at\)
+[ ]*58c: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0590 <[^>]*> lui at,[-0-9x]+
+[ ]*590: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+0594 <[^>]*> addu at,a1,at
+0+0598 <[^>]*> lw a0,0\(at\)
+[ ]*598: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+059c <[^>]*> addiu at,at,4
+0+05a0 <[^>]*> lw a1,0\(at\)
+[ ]*5a0: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+05a4 <[^>]*> lui at,[-0-9x]+
+[ ]*5a4: [A-Z0-9_]*HI[A-Z0-9_]* \.data.*
0+05a8 <[^>]*> addu at,a1,at
-0+05ac <[^>]*> swc1 \$f[45],-32768\(at\)
-0+05b0 <[^>]*> swc1 \$f[45],-32764\(at\)
-0+05b4 <[^>]*> swc1 \$f[45],-32768\(a1\)
-0+05b8 <[^>]*> swc1 \$f[45],-32764\(a1\)
-0+05bc <[^>]*> lui at,[-0-9x]+
-[ ]*5bc: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
-0+05c0 <[^>]*> addu at,a1,at
-0+05c4 <[^>]*> swc1 \$f[45],[-0-9]+\(at\)
-[ ]*5c4: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+05c8 <[^>]*> swc1 \$f[45],[-0-9]+\(at\)
-[ ]*5c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
-0+05cc <[^>]*> sw a0,0\(zero\)
-0+05d0 <[^>]*> sw a1,4\(zero\)
-0+05d4 <[^>]*> lui a0,[-0-9x]+
-[ ]*5d4: [A-Z0-9_]*HI[A-Z0-9_]* .bss.*
-0+05d8 <[^>]*> addu a0,a0,a1
-0+05dc <[^>]*> ld a0,[-0-9]+\(a0\)
-[ ]*5dc: [A-Z0-9_]*LO[A-Z0-9_]* .bss.*
+0+05ac <[^>]*> lw a0,-23131\(at\)
+[ ]*5ac: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+05b0 <[^>]*> addiu at,at,4
+0+05b4 <[^>]*> lw a1,-23131\(at\)
+[ ]*5b4: [A-Z0-9_]*LO[A-Z0-9_]* \.data.*
+0+05b8 <[^>]*> lui at,[-0-9x]+
+[ ]*5b8: [A-Z0-9_]*HI[A-Z0-9_]* big_external_data_label
+0+05bc <[^>]*> addu at,a1,at
+0+05c0 <[^>]*> lw a0,-23131\(at\)
+[ ]*5c0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+05c4 <[^>]*> addiu at,at,4
+0+05c8 <[^>]*> lw a1,-23131\(at\)
+[ ]*5c8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_data_label
+0+05cc <[^>]*> lui at,[-0-9x]+
+[ ]*5cc: [A-Z0-9_]*HI[A-Z0-9_]* small_external_data_label
+0+05d0 <[^>]*> addu at,a1,at
+0+05d4 <[^>]*> lw a0,-23131\(at\)
+[ ]*5d4: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
+0+05d8 <[^>]*> addiu at,at,4
+0+05dc <[^>]*> lw a1,-23131\(at\)
+[ ]*5dc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_data_label
0+05e0 <[^>]*> lui at,[-0-9x]+
-[ ]*5e0: [A-Z0-9_]*HI[A-Z0-9_]* .sbss.*
-0+05e4 <[^>]*> addu at,at,a1
-0+05e8 <[^>]*> sd a0,[-0-9]+\(at\)
-[ ]*5e8: [A-Z0-9_]*LO[A-Z0-9_]* .sbss.*
-0+05ec <[^>]*> nop
+[ ]*5e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+05e4 <[^>]*> addu at,a1,at
+0+05e8 <[^>]*> lw a0,-23131\(at\)
+[ ]*5e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+05ec <[^>]*> addiu at,at,4
+0+05f0 <[^>]*> lw a1,-23131\(at\)
+[ ]*5f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+05f4 <[^>]*> lui at,[-0-9x]+
+[ ]*5f4: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+05f8 <[^>]*> addu at,a1,at
+0+05fc <[^>]*> lw a0,-23131\(at\)
+[ ]*5fc: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0600 <[^>]*> addiu at,at,4
+0+0604 <[^>]*> lw a1,-23131\(at\)
+[ ]*604: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0608 <[^>]*> lui at,[-0-9x]+
+[ ]*608: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+060c <[^>]*> addu at,a1,at
+0+0610 <[^>]*> lw a0,-23131\(at\)
+[ ]*610: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0614 <[^>]*> addiu at,at,4
+0+0618 <[^>]*> lw a1,-23131\(at\)
+[ ]*618: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+061c <[^>]*> lui at,[-0-9x]+
+[ ]*61c: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+0620 <[^>]*> addu at,a1,at
+0+0624 <[^>]*> lw a0,-23131\(at\)
+[ ]*624: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0628 <[^>]*> addiu at,at,4
+0+062c <[^>]*> lw a1,-23131\(at\)
+[ ]*62c: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+0+0630 <[^>]*> lwc1 \$f[45],0\(zero\)
+0+0634 <[^>]*> lwc1 \$f[45],4\(zero\)
+0+0638 <[^>]*> lwc1 \$f[45],1\(zero\)
+0+063c <[^>]*> lwc1 \$f[45],5\(zero\)
+0+0640 <[^>]*> lui at,0x1
+0+0644 <[^>]*> lwc1 \$f[45],-32768\(at\)
+0+0648 <[^>]*> lwc1 \$f[45],-32764\(at\)
+0+064c <[^>]*> lwc1 \$f[45],-32768\(zero\)
+0+0650 <[^>]*> lwc1 \$f[45],-32764\(zero\)
+0+0654 <[^>]*> lwc1 \$f[45],0\(a1\)
+0+0658 <[^>]*> lwc1 \$f[45],4\(a1\)
+0+065c <[^>]*> lwc1 \$f[45],1\(a1\)
+0+0660 <[^>]*> lwc1 \$f[45],5\(a1\)
+0+0664 <[^>]*> lui at,0x1
+0+0668 <[^>]*> addu at,a1,at
+0+066c <[^>]*> lwc1 \$f[45],-32768\(at\)
+0+0670 <[^>]*> lwc1 \$f[45],-32764\(at\)
+0+0674 <[^>]*> lwc1 \$f[45],-32768\(a1\)
+0+0678 <[^>]*> lwc1 \$f[45],-32764\(a1\)
+0+067c <[^>]*> lui at,[-0-9x]+
+[ ]*67c: [A-Z0-9_]*HI[A-Z0-9_]* small_external_common
+0+0680 <[^>]*> addu at,a1,at
+0+0684 <[^>]*> lwc1 \$f[45],-23131\(at\)
+[ ]*684: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0688 <[^>]*> addiu at,at,4
+0+068c <[^>]*> lwc1 \$f[45],-23131\(at\)
+[ ]*68c: [A-Z0-9_]*LO[A-Z0-9_]* small_external_common
+0+0690 <[^>]*> nop
+0+0694 <[^>]*> swc1 \$f[45],0\(zero\)
+0+0698 <[^>]*> swc1 \$f[45],4\(zero\)
+0+069c <[^>]*> swc1 \$f[45],1\(zero\)
+0+06a0 <[^>]*> swc1 \$f[45],5\(zero\)
+0+06a4 <[^>]*> lui at,0x1
+0+06a8 <[^>]*> swc1 \$f[45],-32768\(at\)
+0+06ac <[^>]*> swc1 \$f[45],-32764\(at\)
+0+06b0 <[^>]*> swc1 \$f[45],-32768\(zero\)
+0+06b4 <[^>]*> swc1 \$f[45],-32764\(zero\)
+0+06b8 <[^>]*> swc1 \$f[45],0\(a1\)
+0+06bc <[^>]*> swc1 \$f[45],4\(a1\)
+0+06c0 <[^>]*> swc1 \$f[45],1\(a1\)
+0+06c4 <[^>]*> swc1 \$f[45],5\(a1\)
+0+06c8 <[^>]*> lui at,0x1
+0+06cc <[^>]*> addu at,a1,at
+0+06d0 <[^>]*> swc1 \$f[45],-32768\(at\)
+0+06d4 <[^>]*> swc1 \$f[45],-32764\(at\)
+0+06d8 <[^>]*> swc1 \$f[45],-32768\(a1\)
+0+06dc <[^>]*> swc1 \$f[45],-32764\(a1\)
+0+06e0 <[^>]*> lui at,[-0-9x]+
+[ ]*6e0: [A-Z0-9_]*HI[A-Z0-9_]* big_external_common
+0+06e4 <[^>]*> addu at,a1,at
+0+06e8 <[^>]*> swc1 \$f[45],-23131\(at\)
+[ ]*6e8: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+06ec <[^>]*> addiu at,at,4
+0+06f0 <[^>]*> swc1 \$f[45],-23131\(at\)
+[ ]*6f0: [A-Z0-9_]*LO[A-Z0-9_]* big_external_common
+0+06f4 <[^>]*> sw a0,0\(zero\)
+0+06f8 <[^>]*> sw a1,4\(zero\)
+0+06fc <[^>]*> lui a0,[-0-9x]+
+[ ]*6fc: [A-Z0-9_]*HI[A-Z0-9_]* \.bss.*
+0+0700 <[^>]*> addu a0,a0,a1
+0+0704 <[^>]*> ld a0,-23131\(a0\)
+[ ]*704: [A-Z0-9_]*LO[A-Z0-9_]* \.bss.*
+0+0708 <[^>]*> lui at,[-0-9x]+
+[ ]*708: [A-Z0-9_]*HI[A-Z0-9_]* \.sbss.*
+0+070c <[^>]*> addu at,at,a1
+0+0710 <[^>]*> sd a0,-23131\(at\)
+[ ]*710: [A-Z0-9_]*LO[A-Z0-9_]* \.sbss.*
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld.s binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld.s
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/ld.s 1999-08-10 14:25:20.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/ld.s 2004-06-27 23:19:05.000000000 +0000
@@ -140,5 +140,5 @@ data_label:
ld $4,big_local_common+0x1a5a5($5)
sd $4,small_local_common+0x1a5a5($5)
-# Round to a 16 byte boundary, for ease in testing multiple targets.
- nop
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 8
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lif-svr4pic.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/lif-svr4pic.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lif-svr4pic.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/lif-svr4pic.d 2004-06-28 00:28:31.000000000 +0000
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:3000
#name: MIPS lifloat-svr4pic
-#as: -32 -mips1 -mtune=r3000 -KPIC -EB --defsym SVR4=1
+#as: -32 -mips1 -mtune=r3000 -KPIC -EB
#source: lifloat.s
# Test the li.d and li.s macros with -KPIC.
@@ -9,22 +9,24 @@
Disassembly of section .text:
0+0000 <[^>]*> lw at,0\(gp\)
-[ ]*0: R_MIPS_GOT16 .rodata
+[ ]*0: R_MIPS_GOT16 \.rodata
0+0004 <[^>]*> nop
0+0008 <[^>]*> lw a0,0\(at\)
-[ ]*8: R_MIPS_LO16 .rodata
-0+000c <[^>]*> lw a1,4\(at\)
-[ ]*c: R_MIPS_LO16 .rodata
-0+0010 <[^>]*> lw at,0\(gp\)
-[ ]*10: R_MIPS_GOT16 .rodata
-0+0014 <[^>]*> nop
-0+0018 <[^>]*> lwc1 \$f5,8\(at\)
-[ ]*18: R_MIPS_LO16 .rodata
-0+001c <[^>]*> lwc1 \$f4,12\(at\)
-[ ]*1c: R_MIPS_LO16 .rodata
-0+0020 <[^>]*> lui a0,0x3f8f
-0+0024 <[^>]*> ori a0,a0,0xcd36
-0+0028 <[^>]*> lui at,0x3f8f
-0+002c <[^>]*> ori at,at,0xcd36
-0+0030 <[^>]*> mtc1 at,\$f4
- ...
+[ ]*8: R_MIPS_LO16 \.rodata
+0+000c <[^>]*> addiu at,at,4
+0+0010 <[^>]*> lw a1,0\(at\)
+[ ]*10: R_MIPS_LO16 \.rodata
+0+0014 <[^>]*> lw at,0\(gp\)
+[ ]*14: R_MIPS_GOT16 \.rodata
+0+0018 <[^>]*> nop
+0+001c <[^>]*> lwc1 \$f5,8\(at\)
+[ ]*1c: R_MIPS_LO16 \.rodata
+0+0020 <[^>]*> addiu at,at,4
+0+0024 <[^>]*> lwc1 \$f4,8\(at\)
+[ ]*24: R_MIPS_LO16 \.rodata
+0+0028 <[^>]*> lui a0,0x3f8f
+0+002c <[^>]*> ori a0,a0,0xcd36
+0+0030 <[^>]*> lui at,0x3f8f
+0+0034 <[^>]*> ori at,at,0xcd36
+0+0038 <[^>]*> mtc1 at,\$f4
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lif-xgot.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/lif-xgot.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lif-xgot.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/lif-xgot.d 2004-06-28 00:24:36.000000000 +0000
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:3000
#name: MIPS lifloat-xgot
-#as: -32 -mips1 -mtune=r3000 -KPIC -xgot -EB --defsym XGOT=1
+#as: -32 -mips1 -mtune=r3000 -KPIC -xgot -EB
#source: lifloat.s
# Test the li.d and li.s macros with -KPIC -xgot.
@@ -9,22 +9,24 @@
Disassembly of section .text:
0+0000 <[^>]*> lw at,0\(gp\)
-[ ]*0: R_MIPS_GOT16 .rodata
+[ ]*0: R_MIPS_GOT16 \.rodata
0+0004 <[^>]*> nop
0+0008 <[^>]*> lw a0,0\(at\)
-[ ]*8: R_MIPS_LO16 .rodata
-0+000c <[^>]*> lw a1,4\(at\)
-[ ]*c: R_MIPS_LO16 .rodata
-0+0010 <[^>]*> lw at,0\(gp\)
-[ ]*10: R_MIPS_GOT16 .rodata
-0+0014 <[^>]*> nop
-0+0018 <[^>]*> lwc1 \$f5,8\(at\)
-[ ]*18: R_MIPS_LO16 .rodata
-0+001c <[^>]*> lwc1 \$f4,12\(at\)
-[ ]*1c: R_MIPS_LO16 .rodata
-0+0020 <[^>]*> lui a0,0x3f8f
-0+0024 <[^>]*> ori a0,a0,0xcd36
-0+0028 <[^>]*> lui at,0x3f8f
-0+002c <[^>]*> ori at,at,0xcd36
-0+0030 <[^>]*> mtc1 at,\$f4
- ...
+[ ]*8: R_MIPS_LO16 \.rodata
+0+000c <[^>]*> addiu at,at,4
+0+0010 <[^>]*> lw a1,0\(at\)
+[ ]*10: R_MIPS_LO16 \.rodata
+0+0014 <[^>]*> lw at,0\(gp\)
+[ ]*14: R_MIPS_GOT16 \.rodata
+0+0018 <[^>]*> nop
+0+001c <[^>]*> lwc1 \$f5,8\(at\)
+[ ]*1c: R_MIPS_LO16 \.rodata
+0+0020 <[^>]*> addiu at,at,4
+0+0024 <[^>]*> lwc1 \$f4,8\(at\)
+[ ]*24: R_MIPS_LO16 \.rodata
+0+0028 <[^>]*> lui a0,0x3f8f
+0+002c <[^>]*> ori a0,a0,0xcd36
+0+0030 <[^>]*> lui at,0x3f8f
+0+0034 <[^>]*> ori at,at,0xcd36
+0+0038 <[^>]*> mtc1 at,\$f4
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lifloat.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/lifloat.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lifloat.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/lifloat.d 2004-06-28 00:17:37.000000000 +0000
@@ -8,16 +8,18 @@
Disassembly of section .text:
0+0000 <[^>]*> lui at,0x0
-[ ]*0: [A-Z0-9_]*HI[A-Z0-9_]* .ro?data.*
-0+0004 <[^>]*> lw a0,[-0-9]+\(at\)
-[ ]*4: [A-Z0-9_]*LO[A-Z0-9_]* .ro?data.*
-0+0008 <[^>]*> lw a1,[-0-9]+\(at\)
-[ ]*8: [A-Z0-9_]*LO[A-Z0-9_]* .ro?data.*
-0+000c <[^>]*> lwc1 \$f[45],[-0-9]+\(gp\)
-[ ]*c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.*
+[ ]*0: [A-Z0-9_]*HI[A-Z0-9_]* \.ro?data.*
+0+0004 <[^>]*> lw a0,0\(at\)
+[ ]*4: [A-Z0-9_]*LO[A-Z0-9_]* \.ro?data.*
+0+0008 <[^>]*> addiu at,at,4
+0+000c <[^>]*> lw a1,0\(at\)
+[ ]*c: [A-Z0-9_]*LO[A-Z0-9_]* \.ro?data.*
0+0010 <[^>]*> lwc1 \$f[45],[-0-9]+\(gp\)
-[ ]*10: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.*
-0+0014 <[^>]*> lui a0,0x3f8f
-0+0018 <[^>]*> ori a0,a0,0xcd36
-0+001c <[^>]*> lwc1 \$f4,[-0-9]+\(gp\)
-[ ]*1c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit4.*
+[ ]*10: [A-Z0-9_]*LITERAL[A-Z0-9_]* \.lit8.*
+0+0014 <[^>]*> lwc1 \$f[45],[-0-9]+\(gp\)
+[ ]*14: [A-Z0-9_]*LITERAL[A-Z0-9_]* \.lit8.*
+0+0018 <[^>]*> lui a0,0x3f8f
+0+001c <[^>]*> ori a0,a0,0xcd36
+0+0020 <[^>]*> lwc1 \$f4,[-0-9]+\(gp\)
+[ ]*20: [A-Z0-9_]*LITERAL[A-Z0-9_]* \.lit4.*
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lifloat.s binutils-2.15.91-20040625/gas/testsuite/gas/mips/lifloat.s
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/lifloat.s 2004-04-22 03:25:27.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/lifloat.s 2004-06-28 00:18:46.000000000 +0000
@@ -7,14 +7,5 @@ foo:
li.s $4,1.12345
li.s $f4,1.12345
-# Round to a 16 byte boundary, for ease in testing multiple targets.
- .ifdef SVR4
- nop
- nop
- nop
- .endif
- .ifdef XGOT
- nop
- nop
- nop
- .endif
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 8
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-abi32-pic.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-abi32-pic.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-abi32-pic.d 2004-04-23 03:25:52.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-abi32-pic.d 2004-06-28 01:11:47.000000000 +0000
@@ -19,11 +19,11 @@ Disassembly of section .text:
24: 8f840000 lw a0,0\(gp\)
28: 24840000 addiu a0,a0,0
2c: 8f840000 lw a0,0\(gp\)
- 30: 2484015c addiu a0,a0,348
- 34: 10000049 b 15c <[^>]*>
+ 30: 24840174 addiu a0,a0,372
+ 34: 1000004f b 174 <[^>]*>
38: 00000000 nop
3c: 8f990000 lw t9,0\(gp\)
- 40: 2739015c addiu t9,t9,348
+ 40: 27390174 addiu t9,t9,372
44: 0320f809 jalr t9
48: 00000000 nop
4c: 8fbc0008 lw gp,8\(sp\)
@@ -34,66 +34,72 @@ Disassembly of section .text:
60: 24840000 addiu a0,a0,0
64: 8c840000 lw a0,0\(a0\)
68: 8f840000 lw a0,0\(gp\)
- 6c: 2484015c addiu a0,a0,348
+ 6c: 24840174 addiu a0,a0,372
70: 8c840000 lw a0,0\(a0\)
74: 8f810000 lw at,0\(gp\)
78: 8c240000 lw a0,0\(at\)
- 7c: 8c250004 lw a1,4\(at\)
- 80: 8f810000 lw at,0\(gp\)
- 84: 8c240000 lw a0,0\(at\)
- 88: 8c250004 lw a1,4\(at\)
- 8c: 8f810000 lw at,0\(gp\)
- 90: 8c24015c lw a0,348\(at\)
- 94: 8c250160 lw a1,352\(at\)
- 98: 8f810000 lw at,0\(gp\)
- 9c: 24210000 addiu at,at,0
- a0: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: 8c250000 lw a1,0\(at\)
+ 84: 8f810000 lw at,0\(gp\)
+ 88: 8c240000 lw a0,0\(at\)
+ 8c: 24210004 addiu at,at,4
+ 90: 8c250000 lw a1,0\(at\)
+ 94: 8f810000 lw at,0\(gp\)
+ 98: 8c240174 lw a0,372\(at\)
+ 9c: 24210004 addiu at,at,4
+ a0: 8c250174 lw a1,372\(at\)
a4: 8f810000 lw at,0\(gp\)
a8: 24210000 addiu at,at,0
ac: ac240000 sw a0,0\(at\)
b0: 8f810000 lw at,0\(gp\)
- b4: ac240000 sw a0,0\(at\)
- b8: ac250004 sw a1,4\(at\)
+ b4: 24210000 addiu at,at,0
+ b8: ac240000 sw a0,0\(at\)
bc: 8f810000 lw at,0\(gp\)
c0: ac240000 sw a0,0\(at\)
- c4: ac250004 sw a1,4\(at\)
- c8: 8f810000 lw at,0\(gp\)
- cc: 24210000 addiu at,at,0
- d0: 80240000 lb a0,0\(at\)
- d4: 90210001 lbu at,1\(at\)
- d8: 00042200 sll a0,a0,0x8
- dc: 00812025 or a0,a0,at
- e0: 8f810000 lw at,0\(gp\)
- e4: 24210000 addiu at,at,0
- e8: a0240001 sb a0,1\(at\)
- ec: 00042202 srl a0,a0,0x8
- f0: a0240000 sb a0,0\(at\)
- f4: 90210001 lbu at,1\(at\)
- f8: 00042200 sll a0,a0,0x8
- fc: 00812025 or a0,a0,at
- 100: 8f810000 lw at,0\(gp\)
- 104: 24210000 addiu at,at,0
- 108: 88240000 lwl a0,0\(at\)
- 10c: 98240003 lwr a0,3\(at\)
- 110: 8f810000 lw at,0\(gp\)
- 114: 24210000 addiu at,at,0
- 118: a8240000 swl a0,0\(at\)
- 11c: b8240003 swr a0,3\(at\)
- 120: 3c043ff0 lui a0,0x3ff0
- 124: 00002821 move a1,zero
- 128: 8f810000 lw at,0\(gp\)
- 12c: 8c240000 lw a0,0\(at\)
- 130: 8c250004 lw a1,4\(at\)
- 134: 3c013ff0 lui at,0x3ff0
- 138: 44810800 mtc1 at,\$f1
- 13c: 44800000 mtc1 zero,\$f0
- 140: 8f810000 lw at,0\(gp\)
- 144: d4200008 ldc1 \$f0,8\(at\)
- 148: 24a40064 addiu a0,a1,100
- 14c: 2c840001 sltiu a0,a0,1
- 150: 24a40064 addiu a0,a1,100
- 154: 0004202b sltu a0,zero,a0
- 158: 00a02021 move a0,a1
+ c4: 24210004 addiu at,at,4
+ c8: ac250000 sw a1,0\(at\)
+ cc: 8f810000 lw at,0\(gp\)
+ d0: ac240000 sw a0,0\(at\)
+ d4: 24210004 addiu at,at,4
+ d8: ac250000 sw a1,0\(at\)
+ dc: 8f810000 lw at,0\(gp\)
+ e0: 24210000 addiu at,at,0
+ e4: 80240000 lb a0,0\(at\)
+ e8: 90210001 lbu at,1\(at\)
+ ec: 00042200 sll a0,a0,0x8
+ f0: 00812025 or a0,a0,at
+ f4: 8f810000 lw at,0\(gp\)
+ f8: 24210000 addiu at,at,0
+ fc: a0240001 sb a0,1\(at\)
+ 100: 00042202 srl a0,a0,0x8
+ 104: a0240000 sb a0,0\(at\)
+ 108: 90210001 lbu at,1\(at\)
+ 10c: 00042200 sll a0,a0,0x8
+ 110: 00812025 or a0,a0,at
+ 114: 8f810000 lw at,0\(gp\)
+ 118: 24210000 addiu at,at,0
+ 11c: 88240000 lwl a0,0\(at\)
+ 120: 98240003 lwr a0,3\(at\)
+ 124: 8f810000 lw at,0\(gp\)
+ 128: 24210000 addiu at,at,0
+ 12c: a8240000 swl a0,0\(at\)
+ 130: b8240003 swr a0,3\(at\)
+ 134: 3c043ff0 lui a0,0x3ff0
+ 138: 00002821 move a1,zero
+ 13c: 8f810000 lw at,0\(gp\)
+ 140: 8c240000 lw a0,0\(at\)
+ 144: 24210004 addiu at,at,4
+ 148: 8c250000 lw a1,0\(at\)
+ 14c: 3c013ff0 lui at,0x3ff0
+ 150: 44810800 mtc1 at,\$f1
+ 154: 44800000 mtc1 zero,\$f0
+ 158: 8f810000 lw at,0\(gp\)
+ 15c: d4200008 ldc1 \$f0,8\(at\)
+ 160: 24a40064 addiu a0,a1,100
+ 164: 2c840001 sltiu a0,a0,1
+ 168: 24a40064 addiu a0,a1,100
+ 16c: 0004202b sltu a0,zero,a0
+ 170: 00a02021 move a0,a1
-0+015c <[^>]*>:
- ...
+0+0174 <[^>]*>:
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-abi32.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-abi32.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-abi32.d 2001-08-11 03:25:47.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-abi32.d 2004-06-28 01:01:53.000000000 +0000
@@ -13,66 +13,70 @@ Disassembly of section .text:
c: 3c040000 lui a0,0x0
10: 24840000 addiu a0,a0,0
14: 3c040000 lui a0,0x0
- 18: 24840108 addiu a0,a0,264
- 1c: 08000042 j 108 <[^>]*>
- 20: 0c000042 jal 108 <[^>]*>
+ 18: 24840118 addiu a0,a0,280
+ 1c: 08000046 j 118 <[^>]*>
+ 20: 0c000046 jal 118 <[^>]*>
24: 8f84c000 lw a0,-16384\(gp\)
28: 3c040000 lui a0,0x0
2c: 8c840000 lw a0,0\(a0\)
30: 3c040000 lui a0,0x0
- 34: 8c840108 lw a0,264\(a0\)
+ 34: 8c840118 lw a0,280\(a0\)
38: 8f84c000 lw a0,-16384\(gp\)
3c: 8f85c004 lw a1,-16380\(gp\)
40: 3c010000 lui at,0x0
44: 8c240000 lw a0,0\(at\)
- 48: 8c250004 lw a1,4\(at\)
- 4c: 3c010000 lui at,0x0
- 50: 8c240108 lw a0,264\(at\)
- 54: 8c25010c lw a1,268\(at\)
- 58: af84c000 sw a0,-16384\(gp\)
- 5c: 3c010000 lui at,0x0
- 60: ac240000 sw a0,0\(at\)
- 64: af84c000 sw a0,-16384\(gp\)
- 68: af85c004 sw a1,-16380\(gp\)
- 6c: 3c010000 lui at,0x0
- 70: ac240000 sw a0,0\(at\)
- 74: ac250004 sw a1,4\(at\)
- 78: 3c010000 lui at,0x0
- 7c: 24210000 addiu at,at,0
- 80: 80240000 lb a0,0\(at\)
- 84: 90210001 lbu at,1\(at\)
- 88: 00042200 sll a0,a0,0x8
- 8c: 00812025 or a0,a0,at
- 90: 3c010000 lui at,0x0
- 94: 24210000 addiu at,at,0
- 98: a0240001 sb a0,1\(at\)
- 9c: 00042202 srl a0,a0,0x8
- a0: a0240000 sb a0,0\(at\)
- a4: 90210001 lbu at,1\(at\)
- a8: 00042200 sll a0,a0,0x8
- ac: 00812025 or a0,a0,at
- b0: 3c010000 lui at,0x0
- b4: 24210000 addiu at,at,0
- b8: 88240000 lwl a0,0\(at\)
- bc: 98240003 lwr a0,3\(at\)
- c0: 3c010000 lui at,0x0
- c4: 24210000 addiu at,at,0
- c8: a8240000 swl a0,0\(at\)
- cc: b8240003 swr a0,3\(at\)
- d0: 3c043ff0 lui a0,0x3ff0
- d4: 00002821 move a1,zero
- d8: 3c010000 lui at,0x0
- dc: 8c240000 lw a0,0\(at\)
- e0: 8c250004 lw a1,4\(at\)
- e4: 3c013ff0 lui at,0x3ff0
- e8: 44810800 mtc1 at,\$f1
- ec: 44800000 mtc1 zero,\$f0
- f0: d780c000 ldc1 \$f0,-16384\(gp\)
- f4: 24a40064 addiu a0,a1,100
- f8: 2c840001 sltiu a0,a0,1
- fc: 24a40064 addiu a0,a1,100
- 100: 0004202b sltu a0,zero,a0
- 104: 00a02021 move a0,a1
+ 48: 24210004 addiu at,at,4
+ 4c: 8c250000 lw a1,0\(at\)
+ 50: 3c010000 lui at,0x0
+ 54: 8c240118 lw a0,280\(at\)
+ 58: 24210004 addiu at,at,4
+ 5c: 8c250118 lw a1,280\(at\)
+ 60: af84c000 sw a0,-16384\(gp\)
+ 64: 3c010000 lui at,0x0
+ 68: ac240000 sw a0,0\(at\)
+ 6c: af84c000 sw a0,-16384\(gp\)
+ 70: af85c004 sw a1,-16380\(gp\)
+ 74: 3c010000 lui at,0x0
+ 78: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: ac250000 sw a1,0\(at\)
+ 84: 3c010000 lui at,0x0
+ 88: 24210000 addiu at,at,0
+ 8c: 80240000 lb a0,0\(at\)
+ 90: 90210001 lbu at,1\(at\)
+ 94: 00042200 sll a0,a0,0x8
+ 98: 00812025 or a0,a0,at
+ 9c: 3c010000 lui at,0x0
+ a0: 24210000 addiu at,at,0
+ a4: a0240001 sb a0,1\(at\)
+ a8: 00042202 srl a0,a0,0x8
+ ac: a0240000 sb a0,0\(at\)
+ b0: 90210001 lbu at,1\(at\)
+ b4: 00042200 sll a0,a0,0x8
+ b8: 00812025 or a0,a0,at
+ bc: 3c010000 lui at,0x0
+ c0: 24210000 addiu at,at,0
+ c4: 88240000 lwl a0,0\(at\)
+ c8: 98240003 lwr a0,3\(at\)
+ cc: 3c010000 lui at,0x0
+ d0: 24210000 addiu at,at,0
+ d4: a8240000 swl a0,0\(at\)
+ d8: b8240003 swr a0,3\(at\)
+ dc: 3c043ff0 lui a0,0x3ff0
+ e0: 00002821 move a1,zero
+ e4: 3c010000 lui at,0x0
+ e8: 8c240000 lw a0,0\(at\)
+ ec: 24210004 addiu at,at,4
+ f0: 8c250000 lw a1,0\(at\)
+ f4: 3c013ff0 lui at,0x3ff0
+ f8: 44810800 mtc1 at,\$f1
+ fc: 44800000 mtc1 zero,\$f0
+ 100: d780c000 ldc1 \$f0,-16384\(gp\)
+ 104: 24a40064 addiu a0,a1,100
+ 108: 2c840001 sltiu a0,a0,1
+ 10c: 24a40064 addiu a0,a1,100
+ 110: 0004202b sltu a0,zero,a0
+ 114: 00a02021 move a0,a1
-0+0108 <[^>]*>:
- ...
+0+0118 <[^>]*>:
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d 2004-04-23 03:25:52.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d 2004-06-28 00:50:35.000000000 +0000
@@ -19,11 +19,11 @@ Disassembly of section .text:
24: 8f840000 lw a0,0\(gp\)
28: 24840000 addiu a0,a0,0
2c: 8f840000 lw a0,0\(gp\)
- 30: 2484015c addiu a0,a0,348
- 34: 10000049 b 15c <[^>]*>
+ 30: 24840174 addiu a0,a0,372
+ 34: 1000004f b 174 <[^>]*>
38: 00000000 nop
3c: 8f990000 lw t9,0\(gp\)
- 40: 2739015c addiu t9,t9,348
+ 40: 27390174 addiu t9,t9,372
44: 0320f809 jalr t9
48: 00000000 nop
4c: 8fbc0008 lw gp,8\(sp\)
@@ -34,66 +34,72 @@ Disassembly of section .text:
60: 24840000 addiu a0,a0,0
64: 8c840000 lw a0,0\(a0\)
68: 8f840000 lw a0,0\(gp\)
- 6c: 2484015c addiu a0,a0,348
+ 6c: 24840174 addiu a0,a0,372
70: 8c840000 lw a0,0\(a0\)
74: 8f810000 lw at,0\(gp\)
78: 8c240000 lw a0,0\(at\)
- 7c: 8c250004 lw a1,4\(at\)
- 80: 8f810000 lw at,0\(gp\)
- 84: 8c240000 lw a0,0\(at\)
- 88: 8c250004 lw a1,4\(at\)
- 8c: 8f810000 lw at,0\(gp\)
- 90: 8c24015c lw a0,348\(at\)
- 94: 8c250160 lw a1,352\(at\)
- 98: 8f810000 lw at,0\(gp\)
- 9c: 24210000 addiu at,at,0
- a0: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: 8c250000 lw a1,0\(at\)
+ 84: 8f810000 lw at,0\(gp\)
+ 88: 8c240000 lw a0,0\(at\)
+ 8c: 24210004 addiu at,at,4
+ 90: 8c250000 lw a1,0\(at\)
+ 94: 8f810000 lw at,0\(gp\)
+ 98: 8c240174 lw a0,372\(at\)
+ 9c: 24210004 addiu at,at,4
+ a0: 8c250174 lw a1,372\(at\)
a4: 8f810000 lw at,0\(gp\)
a8: 24210000 addiu at,at,0
ac: ac240000 sw a0,0\(at\)
b0: 8f810000 lw at,0\(gp\)
- b4: ac240000 sw a0,0\(at\)
- b8: ac250004 sw a1,4\(at\)
+ b4: 24210000 addiu at,at,0
+ b8: ac240000 sw a0,0\(at\)
bc: 8f810000 lw at,0\(gp\)
c0: ac240000 sw a0,0\(at\)
- c4: ac250004 sw a1,4\(at\)
- c8: 8f810000 lw at,0\(gp\)
- cc: 24210000 addiu at,at,0
- d0: 80240000 lb a0,0\(at\)
- d4: 90210001 lbu at,1\(at\)
- d8: 00042200 sll a0,a0,0x8
- dc: 00812025 or a0,a0,at
- e0: 8f810000 lw at,0\(gp\)
- e4: 24210000 addiu at,at,0
- e8: a0240001 sb a0,1\(at\)
- ec: 00042202 srl a0,a0,0x8
- f0: a0240000 sb a0,0\(at\)
- f4: 90210001 lbu at,1\(at\)
- f8: 00042200 sll a0,a0,0x8
- fc: 00812025 or a0,a0,at
- 100: 8f810000 lw at,0\(gp\)
- 104: 24210000 addiu at,at,0
- 108: 88240000 lwl a0,0\(at\)
- 10c: 98240003 lwr a0,3\(at\)
- 110: 8f810000 lw at,0\(gp\)
- 114: 24210000 addiu at,at,0
- 118: a8240000 swl a0,0\(at\)
- 11c: b8240003 swr a0,3\(at\)
- 120: 3c043ff0 lui a0,0x3ff0
- 124: 00002821 move a1,zero
- 128: 8f810000 lw at,0\(gp\)
- 12c: 8c240000 lw a0,0\(at\)
- 130: 8c250004 lw a1,4\(at\)
- 134: 3c013ff0 lui at,0x3ff0
- 138: 44810800 mtc1 at,\$f1
- 13c: 44800000 mtc1 zero,\$f0
- 140: 8f810000 lw at,0\(gp\)
- 144: d4200008 ldc1 \$f0,8\(at\)
- 148: 24a40064 addiu a0,a1,100
- 14c: 2c840001 sltiu a0,a0,1
- 150: 24a40064 addiu a0,a1,100
- 154: 0004202b sltu a0,zero,a0
- 158: 00a02021 move a0,a1
+ c4: 24210004 addiu at,at,4
+ c8: ac250000 sw a1,0\(at\)
+ cc: 8f810000 lw at,0\(gp\)
+ d0: ac240000 sw a0,0\(at\)
+ d4: 24210004 addiu at,at,4
+ d8: ac250000 sw a1,0\(at\)
+ dc: 8f810000 lw at,0\(gp\)
+ e0: 24210000 addiu at,at,0
+ e4: 80240000 lb a0,0\(at\)
+ e8: 90210001 lbu at,1\(at\)
+ ec: 00042200 sll a0,a0,0x8
+ f0: 00812025 or a0,a0,at
+ f4: 8f810000 lw at,0\(gp\)
+ f8: 24210000 addiu at,at,0
+ fc: a0240001 sb a0,1\(at\)
+ 100: 00042202 srl a0,a0,0x8
+ 104: a0240000 sb a0,0\(at\)
+ 108: 90210001 lbu at,1\(at\)
+ 10c: 00042200 sll a0,a0,0x8
+ 110: 00812025 or a0,a0,at
+ 114: 8f810000 lw at,0\(gp\)
+ 118: 24210000 addiu at,at,0
+ 11c: 88240000 lwl a0,0\(at\)
+ 120: 98240003 lwr a0,3\(at\)
+ 124: 8f810000 lw at,0\(gp\)
+ 128: 24210000 addiu at,at,0
+ 12c: a8240000 swl a0,0\(at\)
+ 130: b8240003 swr a0,3\(at\)
+ 134: 3c043ff0 lui a0,0x3ff0
+ 138: 00002821 move a1,zero
+ 13c: 8f810000 lw at,0\(gp\)
+ 140: 8c240000 lw a0,0\(at\)
+ 144: 24210004 addiu at,at,4
+ 148: 8c250000 lw a1,0\(at\)
+ 14c: 3c013ff0 lui at,0x3ff0
+ 150: 44810800 mtc1 at,\$f1
+ 154: 44800000 mtc1 zero,\$f0
+ 158: 8f810000 lw at,0\(gp\)
+ 15c: d4200008 ldc1 \$f0,8\(at\)
+ 160: 24a40064 addiu a0,a1,100
+ 164: 2c840001 sltiu a0,a0,1
+ 168: 24a40064 addiu a0,a1,100
+ 16c: 0004202b sltu a0,zero,a0
+ 170: 00a02021 move a0,a1
-0+015c <[^>]*>:
- ...
+0+0174 <[^>]*>:
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp32.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp32.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp32.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp32.d 2004-06-28 00:43:10.000000000 +0000
@@ -13,66 +13,70 @@ Disassembly of section .text:
c: 3c040000 lui a0,0x0
10: 24840000 addiu a0,a0,0
14: 3c040000 lui a0,0x0
- 18: 24840108 addiu a0,a0,264
- 1c: 08000042 j 108 <[^>]*>
- 20: 0c000042 jal 108 <[^>]*>
+ 18: 24840118 addiu a0,a0,280
+ 1c: 08000046 j 118 <[^>]*>
+ 20: 0c000046 jal 118 <[^>]*>
24: 8f84c000 lw a0,-16384\(gp\)
28: 3c040000 lui a0,0x0
2c: 8c840000 lw a0,0\(a0\)
30: 3c040000 lui a0,0x0
- 34: 8c840108 lw a0,264\(a0\)
+ 34: 8c840118 lw a0,280\(a0\)
38: 8f84c000 lw a0,-16384\(gp\)
3c: 8f85c004 lw a1,-16380\(gp\)
40: 3c010000 lui at,0x0
44: 8c240000 lw a0,0\(at\)
- 48: 8c250004 lw a1,4\(at\)
- 4c: 3c010000 lui at,0x0
- 50: 8c240108 lw a0,264\(at\)
- 54: 8c25010c lw a1,268\(at\)
- 58: af84c000 sw a0,-16384\(gp\)
- 5c: 3c010000 lui at,0x0
- 60: ac240000 sw a0,0\(at\)
- 64: af84c000 sw a0,-16384\(gp\)
- 68: af85c004 sw a1,-16380\(gp\)
- 6c: 3c010000 lui at,0x0
- 70: ac240000 sw a0,0\(at\)
- 74: ac250004 sw a1,4\(at\)
- 78: 3c010000 lui at,0x0
- 7c: 24210000 addiu at,at,0
- 80: 80240000 lb a0,0\(at\)
- 84: 90210001 lbu at,1\(at\)
- 88: 00042200 sll a0,a0,0x8
- 8c: 00812025 or a0,a0,at
- 90: 3c010000 lui at,0x0
- 94: 24210000 addiu at,at,0
- 98: a0240001 sb a0,1\(at\)
- 9c: 00042202 srl a0,a0,0x8
- a0: a0240000 sb a0,0\(at\)
- a4: 90210001 lbu at,1\(at\)
- a8: 00042200 sll a0,a0,0x8
- ac: 00812025 or a0,a0,at
- b0: 3c010000 lui at,0x0
- b4: 24210000 addiu at,at,0
- b8: 88240000 lwl a0,0\(at\)
- bc: 98240003 lwr a0,3\(at\)
- c0: 3c010000 lui at,0x0
- c4: 24210000 addiu at,at,0
- c8: a8240000 swl a0,0\(at\)
- cc: b8240003 swr a0,3\(at\)
- d0: 3c043ff0 lui a0,0x3ff0
- d4: 00002821 move a1,zero
- d8: 3c010000 lui at,0x0
- dc: 8c240000 lw a0,0\(at\)
- e0: 8c250004 lw a1,4\(at\)
- e4: 3c013ff0 lui at,0x3ff0
- e8: 44810800 mtc1 at,\$f1
- ec: 44800000 mtc1 zero,\$f0
- f0: d780c000 ldc1 \$f0,-16384\(gp\)
- f4: 24a40064 addiu a0,a1,100
- f8: 2c840001 sltiu a0,a0,1
- fc: 24a40064 addiu a0,a1,100
- 100: 0004202b sltu a0,zero,a0
- 104: 00a02021 move a0,a1
+ 48: 24210004 addiu at,at,4
+ 4c: 8c250000 lw a1,0\(at\)
+ 50: 3c010000 lui at,0x0
+ 54: 8c240118 lw a0,280\(at\)
+ 58: 24210004 addiu at,at,4
+ 5c: 8c250118 lw a1,280\(at\)
+ 60: af84c000 sw a0,-16384\(gp\)
+ 64: 3c010000 lui at,0x0
+ 68: ac240000 sw a0,0\(at\)
+ 6c: af84c000 sw a0,-16384\(gp\)
+ 70: af85c004 sw a1,-16380\(gp\)
+ 74: 3c010000 lui at,0x0
+ 78: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: ac250000 sw a1,0\(at\)
+ 84: 3c010000 lui at,0x0
+ 88: 24210000 addiu at,at,0
+ 8c: 80240000 lb a0,0\(at\)
+ 90: 90210001 lbu at,1\(at\)
+ 94: 00042200 sll a0,a0,0x8
+ 98: 00812025 or a0,a0,at
+ 9c: 3c010000 lui at,0x0
+ a0: 24210000 addiu at,at,0
+ a4: a0240001 sb a0,1\(at\)
+ a8: 00042202 srl a0,a0,0x8
+ ac: a0240000 sb a0,0\(at\)
+ b0: 90210001 lbu at,1\(at\)
+ b4: 00042200 sll a0,a0,0x8
+ b8: 00812025 or a0,a0,at
+ bc: 3c010000 lui at,0x0
+ c0: 24210000 addiu at,at,0
+ c4: 88240000 lwl a0,0\(at\)
+ c8: 98240003 lwr a0,3\(at\)
+ cc: 3c010000 lui at,0x0
+ d0: 24210000 addiu at,at,0
+ d4: a8240000 swl a0,0\(at\)
+ d8: b8240003 swr a0,3\(at\)
+ dc: 3c043ff0 lui a0,0x3ff0
+ e0: 00002821 move a1,zero
+ e4: 3c010000 lui at,0x0
+ e8: 8c240000 lw a0,0\(at\)
+ ec: 24210004 addiu at,at,4
+ f0: 8c250000 lw a1,0\(at\)
+ f4: 3c013ff0 lui at,0x3ff0
+ f8: 44810800 mtc1 at,\$f1
+ fc: 44800000 mtc1 zero,\$f0
+ 100: d780c000 ldc1 \$f0,-16384\(gp\)
+ 104: 24a40064 addiu a0,a1,100
+ 108: 2c840001 sltiu a0,a0,1
+ 10c: 24a40064 addiu a0,a1,100
+ 110: 0004202b sltu a0,zero,a0
+ 114: 00a02021 move a0,a1
-0+0108 <[^>]*>:
- ...
+0+0118 <[^>]*>:
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d 2004-04-23 03:25:52.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d 2004-06-28 00:57:35.000000000 +0000
@@ -19,11 +19,11 @@ Disassembly of section .text:
24: 8f840000 lw a0,0\(gp\)
28: 24840000 addiu a0,a0,0
2c: 8f840000 lw a0,0\(gp\)
- 30: 2484015c addiu a0,a0,348
- 34: 10000049 b 15c <[^>]*>
+ 30: 24840174 addiu a0,a0,372
+ 34: 1000004f b 174 <[^>]*>
38: 00000000 nop
3c: 8f990000 lw t9,0\(gp\)
- 40: 2739015c addiu t9,t9,348
+ 40: 27390174 addiu t9,t9,372
44: 0320f809 jalr t9
48: 00000000 nop
4c: 8fbc0008 lw gp,8\(sp\)
@@ -34,66 +34,72 @@ Disassembly of section .text:
60: 24840000 addiu a0,a0,0
64: 8c840000 lw a0,0\(a0\)
68: 8f840000 lw a0,0\(gp\)
- 6c: 2484015c addiu a0,a0,348
+ 6c: 24840174 addiu a0,a0,372
70: 8c840000 lw a0,0\(a0\)
74: 8f810000 lw at,0\(gp\)
78: 8c240000 lw a0,0\(at\)
- 7c: 8c250004 lw a1,4\(at\)
- 80: 8f810000 lw at,0\(gp\)
- 84: 8c240000 lw a0,0\(at\)
- 88: 8c250004 lw a1,4\(at\)
- 8c: 8f810000 lw at,0\(gp\)
- 90: 8c24015c lw a0,348\(at\)
- 94: 8c250160 lw a1,352\(at\)
- 98: 8f810000 lw at,0\(gp\)
- 9c: 24210000 addiu at,at,0
- a0: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: 8c250000 lw a1,0\(at\)
+ 84: 8f810000 lw at,0\(gp\)
+ 88: 8c240000 lw a0,0\(at\)
+ 8c: 24210004 addiu at,at,4
+ 90: 8c250000 lw a1,0\(at\)
+ 94: 8f810000 lw at,0\(gp\)
+ 98: 8c240174 lw a0,372\(at\)
+ 9c: 24210004 addiu at,at,4
+ a0: 8c250174 lw a1,372\(at\)
a4: 8f810000 lw at,0\(gp\)
a8: 24210000 addiu at,at,0
ac: ac240000 sw a0,0\(at\)
b0: 8f810000 lw at,0\(gp\)
- b4: ac240000 sw a0,0\(at\)
- b8: ac250004 sw a1,4\(at\)
+ b4: 24210000 addiu at,at,0
+ b8: ac240000 sw a0,0\(at\)
bc: 8f810000 lw at,0\(gp\)
c0: ac240000 sw a0,0\(at\)
- c4: ac250004 sw a1,4\(at\)
- c8: 8f810000 lw at,0\(gp\)
- cc: 24210000 addiu at,at,0
- d0: 80240000 lb a0,0\(at\)
- d4: 90210001 lbu at,1\(at\)
- d8: 00042200 sll a0,a0,0x8
- dc: 00812025 or a0,a0,at
- e0: 8f810000 lw at,0\(gp\)
- e4: 24210000 addiu at,at,0
- e8: a0240001 sb a0,1\(at\)
- ec: 00042202 srl a0,a0,0x8
- f0: a0240000 sb a0,0\(at\)
- f4: 90210001 lbu at,1\(at\)
- f8: 00042200 sll a0,a0,0x8
- fc: 00812025 or a0,a0,at
- 100: 8f810000 lw at,0\(gp\)
- 104: 24210000 addiu at,at,0
- 108: 88240000 lwl a0,0\(at\)
- 10c: 98240003 lwr a0,3\(at\)
- 110: 8f810000 lw at,0\(gp\)
- 114: 24210000 addiu at,at,0
- 118: a8240000 swl a0,0\(at\)
- 11c: b8240003 swr a0,3\(at\)
- 120: 3c043ff0 lui a0,0x3ff0
- 124: 00002821 move a1,zero
- 128: 8f810000 lw at,0\(gp\)
- 12c: 8c240000 lw a0,0\(at\)
- 130: 8c250004 lw a1,4\(at\)
- 134: 8f810000 lw at,0\(gp\)
- 138: d4200008 ldc1 \$f0,8\(at\)
+ c4: 24210004 addiu at,at,4
+ c8: ac250000 sw a1,0\(at\)
+ cc: 8f810000 lw at,0\(gp\)
+ d0: ac240000 sw a0,0\(at\)
+ d4: 24210004 addiu at,at,4
+ d8: ac250000 sw a1,0\(at\)
+ dc: 8f810000 lw at,0\(gp\)
+ e0: 24210000 addiu at,at,0
+ e4: 80240000 lb a0,0\(at\)
+ e8: 90210001 lbu at,1\(at\)
+ ec: 00042200 sll a0,a0,0x8
+ f0: 00812025 or a0,a0,at
+ f4: 8f810000 lw at,0\(gp\)
+ f8: 24210000 addiu at,at,0
+ fc: a0240001 sb a0,1\(at\)
+ 100: 00042202 srl a0,a0,0x8
+ 104: a0240000 sb a0,0\(at\)
+ 108: 90210001 lbu at,1\(at\)
+ 10c: 00042200 sll a0,a0,0x8
+ 110: 00812025 or a0,a0,at
+ 114: 8f810000 lw at,0\(gp\)
+ 118: 24210000 addiu at,at,0
+ 11c: 88240000 lwl a0,0\(at\)
+ 120: 98240003 lwr a0,3\(at\)
+ 124: 8f810000 lw at,0\(gp\)
+ 128: 24210000 addiu at,at,0
+ 12c: a8240000 swl a0,0\(at\)
+ 130: b8240003 swr a0,3\(at\)
+ 134: 3c043ff0 lui a0,0x3ff0
+ 138: 00002821 move a1,zero
13c: 8f810000 lw at,0\(gp\)
- 140: d4200010 ldc1 \$f0,16\(at\)
- 144: 24a40064 addiu a0,a1,100
- 148: 2c840001 sltiu a0,a0,1
- 14c: 24a40064 addiu a0,a1,100
- 150: 0004202b sltu a0,zero,a0
- 154: 00a02021 move a0,a1
- 158: 46231040 add.d \$f1,\$f2,\$f3
+ 140: 8c240000 lw a0,0\(at\)
+ 144: 24210004 addiu at,at,4
+ 148: 8c250000 lw a1,0\(at\)
+ 14c: 8f810000 lw at,0\(gp\)
+ 150: d4200008 ldc1 \$f0,8\(at\)
+ 154: 8f810000 lw at,0\(gp\)
+ 158: d4200010 ldc1 \$f0,16\(at\)
+ 15c: 24a40064 addiu a0,a1,100
+ 160: 2c840001 sltiu a0,a0,1
+ 164: 24a40064 addiu a0,a1,100
+ 168: 0004202b sltu a0,zero,a0
+ 16c: 00a02021 move a0,a1
+ 170: 46231040 add.d \$f1,\$f2,\$f3
-0+015c <[^>]*>:
- ...
+0+0174 <[^>]*>:
+ \.\.\.
diff -up --recursive --new-file binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp64.d binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp64.d
--- binutils-2.15.91-20040625.macro/gas/testsuite/gas/mips/mips-gp32-fp64.d 2003-05-08 03:25:34.000000000 +0000
+++ binutils-2.15.91-20040625/gas/testsuite/gas/mips/mips-gp32-fp64.d 2004-06-28 00:43:03.000000000 +0000
@@ -13,65 +13,69 @@ Disassembly of section .text:
c: 3c040000 lui a0,0x0
10: 24840000 addiu a0,a0,0
14: 3c040000 lui a0,0x0
- 18: 24840104 addiu a0,a0,260
- 1c: 08000041 j 104 <[^>]*>
- 20: 0c000041 jal 104 <[^>]*>
+ 18: 24840114 addiu a0,a0,276
+ 1c: 08000045 j 114 <[^>]*>
+ 20: 0c000045 jal 114 <[^>]*>
24: 8f84c000 lw a0,-16384\(gp\)
28: 3c040000 lui a0,0x0
2c: 8c840000 lw a0,0\(a0\)
30: 3c040000 lui a0,0x0
- 34: 8c840104 lw a0,260\(a0\)
+ 34: 8c840114 lw a0,276\(a0\)
38: 8f84c000 lw a0,-16384\(gp\)
3c: 8f85c004 lw a1,-16380\(gp\)
40: 3c010000 lui at,0x0
44: 8c240000 lw a0,0\(at\)
- 48: 8c250004 lw a1,4\(at\)
- 4c: 3c010000 lui at,0x0
- 50: 8c240104 lw a0,260\(at\)
- 54: 8c250108 lw a1,264\(at\)
- 58: af84c000 sw a0,-16384\(gp\)
- 5c: 3c010000 lui at,0x0
- 60: ac240000 sw a0,0\(at\)
- 64: af84c000 sw a0,-16384\(gp\)
- 68: af85c004 sw a1,-16380\(gp\)
- 6c: 3c010000 lui at,0x0
- 70: ac240000 sw a0,0\(at\)
- 74: ac250004 sw a1,4\(at\)
- 78: 3c010000 lui at,0x0
- 7c: 24210000 addiu at,at,0
- 80: 80240000 lb a0,0\(at\)
- 84: 90210001 lbu at,1\(at\)
- 88: 00042200 sll a0,a0,0x8
- 8c: 00812025 or a0,a0,at
- 90: 3c010000 lui at,0x0
- 94: 24210000 addiu at,at,0
- 98: a0240001 sb a0,1\(at\)
- 9c: 00042202 srl a0,a0,0x8
- a0: a0240000 sb a0,0\(at\)
- a4: 90210001 lbu at,1\(at\)
- a8: 00042200 sll a0,a0,0x8
- ac: 00812025 or a0,a0,at
- b0: 3c010000 lui at,0x0
- b4: 24210000 addiu at,at,0
- b8: 88240000 lwl a0,0\(at\)
- bc: 98240003 lwr a0,3\(at\)
- c0: 3c010000 lui at,0x0
- c4: 24210000 addiu at,at,0
- c8: a8240000 swl a0,0\(at\)
- cc: b8240003 swr a0,3\(at\)
- d0: 3c043ff0 lui a0,0x3ff0
- d4: 00002821 move a1,zero
- d8: 3c010000 lui at,0x0
- dc: 8c240000 lw a0,0\(at\)
- e0: 8c250004 lw a1,4\(at\)
- e4: d780c000 ldc1 \$f0,-16384\(gp\)
- e8: d780c008 ldc1 \$f0,-16376\(gp\)
- ec: 24a40064 addiu a0,a1,100
- f0: 2c840001 sltiu a0,a0,1
- f4: 24a40064 addiu a0,a1,100
- f8: 0004202b sltu a0,zero,a0
- fc: 00a02021 move a0,a1
- 100: 46231040 add.d \$f1,\$f2,\$f3
+ 48: 24210004 addiu at,at,4
+ 4c: 8c250000 lw a1,0\(at\)
+ 50: 3c010000 lui at,0x0
+ 54: 8c240114 lw a0,276\(at\)
+ 58: 24210004 addiu at,at,4
+ 5c: 8c250114 lw a1,276\(at\)
+ 60: af84c000 sw a0,-16384\(gp\)
+ 64: 3c010000 lui at,0x0
+ 68: ac240000 sw a0,0\(at\)
+ 6c: af84c000 sw a0,-16384\(gp\)
+ 70: af85c004 sw a1,-16380\(gp\)
+ 74: 3c010000 lui at,0x0
+ 78: ac240000 sw a0,0\(at\)
+ 7c: 24210004 addiu at,at,4
+ 80: ac250000 sw a1,0\(at\)
+ 84: 3c010000 lui at,0x0
+ 88: 24210000 addiu at,at,0
+ 8c: 80240000 lb a0,0\(at\)
+ 90: 90210001 lbu at,1\(at\)
+ 94: 00042200 sll a0,a0,0x8
+ 98: 00812025 or a0,a0,at
+ 9c: 3c010000 lui at,0x0
+ a0: 24210000 addiu at,at,0
+ a4: a0240001 sb a0,1\(at\)
+ a8: 00042202 srl a0,a0,0x8
+ ac: a0240000 sb a0,0\(at\)
+ b0: 90210001 lbu at,1\(at\)
+ b4: 00042200 sll a0,a0,0x8
+ b8: 00812025 or a0,a0,at
+ bc: 3c010000 lui at,0x0
+ c0: 24210000 addiu at,at,0
+ c4: 88240000 lwl a0,0\(at\)
+ c8: 98240003 lwr a0,3\(at\)
+ cc: 3c010000 lui at,0x0
+ d0: 24210000 addiu at,at,0
+ d4: a8240000 swl a0,0\(at\)
+ d8: b8240003 swr a0,3\(at\)
+ dc: 3c043ff0 lui a0,0x3ff0
+ e0: 00002821 move a1,zero
+ e4: 3c010000 lui at,0x0
+ e8: 8c240000 lw a0,0\(at\)
+ ec: 24210004 addiu at,at,4
+ f0: 8c250000 lw a1,0\(at\)
+ f4: d780c000 ldc1 \$f0,-16384\(gp\)
+ f8: d780c008 ldc1 \$f0,-16376\(gp\)
+ fc: 24a40064 addiu a0,a1,100
+ 100: 2c840001 sltiu a0,a0,1
+ 104: 24a40064 addiu a0,a1,100
+ 108: 0004202b sltu a0,zero,a0
+ 10c: 00a02021 move a0,a1
+ 110: 46231040 add.d \$f1,\$f2,\$f3
-0+0104 <[^>]*>:
- ...
+0+0114 <[^>]*>:
+ \.\.\.
binutils-2.15.91-20040625-mips-dword-reloc.patch
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-24 22:30 [patch] MIPS: Fix synthesized doubleword transfers (ping) Maciej W. Rozycki
@ 2005-02-24 22:57 ` Richard Sandiford
[not found] ` <mailpost.1109279149.22995@news-sj1-1>
2005-02-25 16:12 ` Richard Sandiford
0 siblings, 2 replies; 12+ messages in thread
From: Richard Sandiford @ 2005-02-24 22:57 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: binutils
"Maciej W. Rozycki" <macro@linux-mips.org> writes:
> * config/tc-mips.c (macro): Avoid a reloc overflow for word
> memory transfers in expansions of the "li.d", "l.d", "s.d", "ld"
> and "sd" macros.
Don't these instructions require doubleword-aligned addresses?
If so, I don't see the problem. The relocs for "sym+offset"
should always be sorted as:
HI16 sym (in-place addend of %hi(offset))
LO16 sym (in-place addend of %lo(offset))
LO16 sym (in-place addend of %lo(offset+4))
and the linker will do the right thing.
I suppose bad things could happen if you composed an aligned
address from an unaligned symbol and an unaligned offset,
but is that allowed?
Richard
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
[not found] ` <mailpost.1109279149.22995@news-sj1-1>
@ 2005-02-24 23:42 ` cgd
2005-02-25 0:04 ` Richard Sandiford
2005-02-25 20:25 ` Maciej W. Rozycki
0 siblings, 2 replies; 12+ messages in thread
From: cgd @ 2005-02-24 23:42 UTC (permalink / raw)
To: rsandifo; +Cc: Maciej W. Rozycki, binutils
At Thu, 24 Feb 2005 21:05:49 +0000 (UTC), "Richard Sandiford" wrote:
> I suppose bad things could happen if you composed an aligned
> address from an unaligned symbol and an unaligned offset,
> but is that allowed?
yes, at least as far as the ISA is concerned.
Also, it's perfectly well defined -- if a little bit strange (and
remarkably slow, since you take an exception 8-) -- to do these
accesses to odd addresses.
chris
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-24 23:42 ` cgd
@ 2005-02-25 0:04 ` Richard Sandiford
2005-02-25 1:23 ` Richard Sandiford
` (2 more replies)
2005-02-25 20:25 ` Maciej W. Rozycki
1 sibling, 3 replies; 12+ messages in thread
From: Richard Sandiford @ 2005-02-25 0:04 UTC (permalink / raw)
To: cgd; +Cc: Maciej W. Rozycki, binutils
cgd@broadcom.com writes:
> At Thu, 24 Feb 2005 21:05:49 +0000 (UTC), "Richard Sandiford" wrote:
>> I suppose bad things could happen if you composed an aligned
>> address from an unaligned symbol and an unaligned offset,
>> but is that allowed?
>
> yes, at least as far as the ISA is concerned.
I don't follow. The ISA has no concept of symbols vs. offsets.
What I meant by the quote above was: suppose we have:
ld <reg>,sym + offset
on a 32-bit target and:
sym = 0x....4
offset = 0x....4
sym + offset is aligned, but the individual values aren't. That might
or might not be interpreted as satisfying any hypothetical "32-bit lds
must be to aligned addresses" requirement.
It's an assembler interface thing really. Does the assembler require
the macros to use aligned addresses? If so, does it require any symbol
part to be aligned too? (Obviously the individual "lw"s don't care
about doubleword alignment, but that wasn't the point.)
I thought the answer to both was "yes", and what with the ABI
requirements, it'll be by far the common case. OTOH...
> Also, it's perfectly well defined -- if a little bit strange (and
> remarkably slow, since you take an exception 8-) -- to do these
> accesses to odd addresses.
...if we want to support unaligned accesses, fair enough.
I guess the user can always use explicit relocs if they
know the address is aligned.
Richard
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-25 0:04 ` Richard Sandiford
@ 2005-02-25 1:23 ` Richard Sandiford
2005-02-25 2:17 ` cgd
2005-02-26 0:02 ` Maciej W. Rozycki
2 siblings, 0 replies; 12+ messages in thread
From: Richard Sandiford @ 2005-02-25 1:23 UTC (permalink / raw)
To: cgd; +Cc: Maciej W. Rozycki, binutils
Richard Sandiford <rsandifo@redhat.com> writes:
> What I meant by the quote above was: suppose we have:
>
> ld <reg>,sym + offset
>
> on a 32-bit target and:
>
> sym = 0x....4
> offset = 0x....4
>
> sym + offset is aligned, but the individual values aren't.
...where "aligned" means to a doubleword boundary, in case that
wasn't clear...
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-25 0:04 ` Richard Sandiford
2005-02-25 1:23 ` Richard Sandiford
@ 2005-02-25 2:17 ` cgd
2005-02-25 13:36 ` Richard Sandiford
2005-02-26 0:02 ` Maciej W. Rozycki
2 siblings, 1 reply; 12+ messages in thread
From: cgd @ 2005-02-25 2:17 UTC (permalink / raw)
To: Richard Sandiford; +Cc: Maciej W. Rozycki, binutils
At Thu, 24 Feb 2005 22:20:30 +0000, Richard Sandiford wrote:
> cgd@broadcom.com writes:
> > At Thu, 24 Feb 2005 21:05:49 +0000 (UTC), "Richard Sandiford" wrote:
> >> I suppose bad things could happen if you composed an aligned
> >> address from an unaligned symbol and an unaligned offset,
> >> but is that allowed?
> >
> > yes, at least as far as the ISA is concerned.
>
> I don't follow. The ISA has no concept of symbols vs. offsets.
right, but to some degree symbol + offset -> base reg + offset, since
the offsets in the base regs come directly from the relocs.
the offsets in the instructions are 16-bit sign-extended values only
-- no scale.
some MIPS ISA levels, MIPS IV IIRC, had requirements that base reg
must be properly aligned, and that offset must be properly aligned.
(But IIRC those weren't present before MIPS IV, and aren't present in
MIPS32/MIPS64.)
chris
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-25 2:17 ` cgd
@ 2005-02-25 13:36 ` Richard Sandiford
0 siblings, 0 replies; 12+ messages in thread
From: Richard Sandiford @ 2005-02-25 13:36 UTC (permalink / raw)
To: cgd; +Cc: Maciej W. Rozycki, binutils
cgd@broadcom.com writes:
> At Thu, 24 Feb 2005 22:20:30 +0000, Richard Sandiford wrote:
>> cgd@broadcom.com writes:
>> > At Thu, 24 Feb 2005 21:05:49 +0000 (UTC), "Richard Sandiford" wrote:
>> >> I suppose bad things could happen if you composed an aligned
>> >> address from an unaligned symbol and an unaligned offset,
>> >> but is that allowed?
>> >
>> > yes, at least as far as the ISA is concerned.
>>
>> I don't follow. The ISA has no concept of symbols vs. offsets.
>
> right, but to some degree symbol + offset -> base reg + offset, since
> the offsets in the base regs come directly from the relocs.
Not really. ld is the equivalent of:
lui tmp,%hi(foo)
lw w1,%lo(foo)(tmp)
lw w2,%lo(foo+4)(tmp)
where the base register (tmp) is the high part of "sym + offset"
(lowest 16 bits all 0). We don't load the symbol part into a
temporary register and then add the offset.
For example, the linker will generate the same output for:
foo = sym + offset, sym = 0x10004, offset = 4
foo = sym + offset, sym = 0x10008, offset = 0
Richard
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-24 22:57 ` Richard Sandiford
[not found] ` <mailpost.1109279149.22995@news-sj1-1>
@ 2005-02-25 16:12 ` Richard Sandiford
2005-02-26 0:10 ` Maciej W. Rozycki
1 sibling, 1 reply; 12+ messages in thread
From: Richard Sandiford @ 2005-02-25 16:12 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: binutils
Richard Sandiford <rsandifo@redhat.com> writes:
> "Maciej W. Rozycki" <macro@linux-mips.org> writes:
>> * config/tc-mips.c (macro): Avoid a reloc overflow for word
>> memory transfers in expansions of the "li.d", "l.d", "s.d", "ld"
>> and "sd" macros.
>
> Don't these instructions require doubleword-aligned addresses?
> If so, I don't see the problem. The relocs for "sym+offset"
> should always be sorted as:
>
> HI16 sym (in-place addend of %hi(offset))
> LO16 sym (in-place addend of %lo(offset))
> LO16 sym (in-place addend of %lo(offset+4))
>
> and the linker will do the right thing.
>
> I suppose bad things could happen if you composed an aligned
> address from an unaligned symbol and an unaligned offset,
> but is that allowed?
FWIW, I checked what the MIPSpro assembler does. Given:
ld $4,foo
as -32 -non_shared will generate:
0: 3c010000 lui at,0x0
0: R_MIPS_HI16 foo
4: 8c240000 lw a0,0(at)
4: R_MIPS_LO16 foo
8: 8c250004 lw a1,4(at)
8: R_MIPS_LO16 foo
just like gas does. Not that I'm saying we should do something simply
because MIPSpro does it. Just thought I'd throw it into the pot.
[ Although, as is probably clear from earlier messages, my preference is
to keep things the way they are, and require any symbolic component to
be 8-byte aligned. I've never heard of any practical problems with that
restriction. OTOH, after the above, I don't have any new data or
arguments to add, so I'll shut up now ;) ]
Richard
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-24 23:42 ` cgd
2005-02-25 0:04 ` Richard Sandiford
@ 2005-02-25 20:25 ` Maciej W. Rozycki
1 sibling, 0 replies; 12+ messages in thread
From: Maciej W. Rozycki @ 2005-02-25 20:25 UTC (permalink / raw)
To: cgd; +Cc: rsandifo, binutils
On Thu, 24 Feb 2005 cgd@broadcom.com wrote:
> > I suppose bad things could happen if you composed an aligned
> > address from an unaligned symbol and an unaligned offset,
> > but is that allowed?
>
> yes, at least as far as the ISA is concerned.
For any ISA actually -- that MIPS IV limitation on address bases and
displacements was essentially a hoax -- AFAIK, no MIPS IV processor has
implemented it (including the R8000) and it's been explicitly removed for
the MIPS64 ISA. Besides, it would have broken binary compatibility with
MIPS II and MIPS III anyway.
It was probably meant as a way to allow some address calculation
optimisation, which has never actually happened.
Maciej
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-25 0:04 ` Richard Sandiford
2005-02-25 1:23 ` Richard Sandiford
2005-02-25 2:17 ` cgd
@ 2005-02-26 0:02 ` Maciej W. Rozycki
2 siblings, 0 replies; 12+ messages in thread
From: Maciej W. Rozycki @ 2005-02-26 0:02 UTC (permalink / raw)
To: Richard Sandiford; +Cc: cgd, binutils
On Thu, 24 Feb 2005, Richard Sandiford wrote:
> What I meant by the quote above was: suppose we have:
>
> ld <reg>,sym + offset
>
> on a 32-bit target and:
>
> sym = 0x....4
> offset = 0x....4
>
> sym + offset is aligned, but the individual values aren't. That might
> or might not be interpreted as satisfying any hypothetical "32-bit lds
> must be to aligned addresses" requirement.
>
> It's an assembler interface thing really. Does the assembler require
> the macros to use aligned addresses? If so, does it require any symbol
> part to be aligned too? (Obviously the individual "lw"s don't care
> about doubleword alignment, but that wasn't the point.)
For whatever reason you may have e.g: sym = 0x87654321 and offset =
0x7fff. It's valid for a dword transfer, because the effective address is
aligned.
> ...if we want to support unaligned accesses, fair enough.
> I guess the user can always use explicit relocs if they
> know the address is aligned.
A user shouldn't use these macros in the first place, but if he does,
then they should still produce valid code. Therefore I'd prefer
correctness over performance and code size.
What about the other patch? It's not the same issue, despite looking
close.
Maciej
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-25 16:12 ` Richard Sandiford
@ 2005-02-26 0:10 ` Maciej W. Rozycki
2005-03-02 2:22 ` Thiemo Seufer
0 siblings, 1 reply; 12+ messages in thread
From: Maciej W. Rozycki @ 2005-02-26 0:10 UTC (permalink / raw)
To: Richard Sandiford; +Cc: binutils
On Fri, 25 Feb 2005, Richard Sandiford wrote:
> FWIW, I checked what the MIPSpro assembler does. Given:
>
> ld $4,foo
>
> as -32 -non_shared will generate:
>
> 0: 3c010000 lui at,0x0
> 0: R_MIPS_HI16 foo
> 4: 8c240000 lw a0,0(at)
> 4: R_MIPS_LO16 foo
> 8: 8c250004 lw a1,4(at)
> 8: R_MIPS_LO16 foo
>
> just like gas does. Not that I'm saying we should do something simply
> because MIPSpro does it. Just thought I'd throw it into the pot.
Bug compatibility?
> [ Although, as is probably clear from earlier messages, my preference is
> to keep things the way they are, and require any symbolic component to
> be 8-byte aligned. I've never heard of any practical problems with that
> restriction. OTOH, after the above, I don't have any new data or
> arguments to add, so I'll shut up now ;) ]
It works with native 64-bit transfers -- why should it be broken with
their 32-bit macro counterparts?
Actually I wouldn't mind ditching these macros altogether. ;-)
Maciej
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [patch] MIPS: Fix synthesized doubleword transfers (ping)
2005-02-26 0:10 ` Maciej W. Rozycki
@ 2005-03-02 2:22 ` Thiemo Seufer
0 siblings, 0 replies; 12+ messages in thread
From: Thiemo Seufer @ 2005-03-02 2:22 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: Richard Sandiford, binutils
Maciej W. Rozycki wrote:
[snip]
> > [ Although, as is probably clear from earlier messages, my preference is
> > to keep things the way they are, and require any symbolic component to
> > be 8-byte aligned. I've never heard of any practical problems with that
> > restriction. OTOH, after the above, I don't have any new data or
> > arguments to add, so I'll shut up now ;) ]
FWIW, I agree with Richard.
> It works with native 64-bit transfers -- why should it be broken with
> their 32-bit macro counterparts?
>
> Actually I wouldn't mind ditching these macros altogether. ;-)
They are IMHO a bad idea (but not bad enough to remove them).
Thiemo
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2005-03-02 2:22 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2005-02-24 22:30 [patch] MIPS: Fix synthesized doubleword transfers (ping) Maciej W. Rozycki
2005-02-24 22:57 ` Richard Sandiford
[not found] ` <mailpost.1109279149.22995@news-sj1-1>
2005-02-24 23:42 ` cgd
2005-02-25 0:04 ` Richard Sandiford
2005-02-25 1:23 ` Richard Sandiford
2005-02-25 2:17 ` cgd
2005-02-25 13:36 ` Richard Sandiford
2005-02-26 0:02 ` Maciej W. Rozycki
2005-02-25 20:25 ` Maciej W. Rozycki
2005-02-25 16:12 ` Richard Sandiford
2005-02-26 0:10 ` Maciej W. Rozycki
2005-03-02 2:22 ` Thiemo Seufer
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