* [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions
@ 2022-03-06 18:32 Maciej W. Rozycki
2022-03-07 7:13 ` Sagar Patel
0 siblings, 1 reply; 4+ messages in thread
From: Maciej W. Rozycki @ 2022-03-06 18:32 UTC (permalink / raw)
To: Sagar Patel; +Cc: Nick Clifton, Chenghua Xu, binutils
Correct issues with INSN2_ALIAS annotation for branch instructions:
- regular MIPS BEQZ/L and BNEZ/L assembly instructions are idioms for
BEQ/L and BNE/L respectively with the `rs' operand equal to $0,
- microMIPS 32-bit BEQZ and BNEZ assembly instructions are idioms for
BEQ and BNE respectively with the `rt' operand equal to $0,
- regular MIPS BAL assembly instruction is an idiom for architecture
levels of up to the MIPSr5 ISA and a machine instruction on its own
from the MIPSr6 ISA up.
Add missing annotation to BEQZ/L and BNEZ/L accordingly then and add a
new entry for BAL for the MIPSr6 ISA, correcting a disassembly bug:
$ mips-linux-gnu-objdump -m mips:isa64r6 -M no-aliases -d bal.o
bal.o: file format elf32-tradlittlemips
Disassembly of section .text:
00000000 <foo>:
0: 04110000 0x4110000
...
$
Add test cases accordingly.
Parts for regular MIPS BEQZ/L and BNEZ/L instructions from Sagar Patel.
2022-03-06 Maciej W. Rozycki <macro@orcam.me.uk>
binutils/
* testsuite/binutils-all/mips/mips1-branch-alias.d: New test.
* testsuite/binutils-all/mips/mips1-branch-noalias.d: New test.
* testsuite/binutils-all/mips/mips2-branch-alias.d: New test.
* testsuite/binutils-all/mips/mips2-branch-noalias.d: New test.
* testsuite/binutils-all/mips/mips32r6-branch-alias.d: New test.
* testsuite/binutils-all/mips/mips32r6-branch-noalias.d: New
test.
* testsuite/binutils-all/mips/micromips-branch-alias.d: New
test.
* testsuite/binutils-all/mips/micromips-branch-noalias.d: New
test.
* testsuite/binutils-all/mips/mips-branch-alias.s: New test
source.
* testsuite/binutils-all/mips/micromips-branch-alias.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
2022-03-06 Sagar Patel <sagarmp@cs.unc.edu>
Maciej W. Rozycki <macro@orcam.me.uk>
opcodes/
* mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation
for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions.
* micromips-opc.c (micromips_opcodes): Likewise for "beqz" and
"bnez" instructions.
---
On Thu, 24 Feb 2022, Sagar Patel wrote:
> These four instructions are not described by MIPS Architecture for
> Programmers Volume II-A: The MIPS32 Instruction Set Manual, Revision
> 6.06 [1]. Hence, they are pseudoinstructions, and should be aliases.
Thank you for your contribution.
> This change fixes objdump -M no-aliases.
>
> [1]: https://www.mips.com/?do-download=the-mips32-instruction-set-v6-06
A similar update is required for the BEQZ and BNEZ assembly idioms used
with the microMIPS instruction set. And we also don't handle MIPSr6 BAL
correctly:
$ mipsel-linux-gnu-objdump -m mips:isa64r6 -M no-aliases -d bal.o
bal.o: file format elf32-tradlittlemips
Disassembly of section .text:
00000000 <foo>:
0: 04110000 0x4110000
...
$
where the instruction is no longer an assembly idiom for BGEZAL, which has
been removed, but a machine instruction on its own.
Last but not least your change does not include a testsuite update and
yet it does not cause regressions with testing despite the semantic
change. That means we don't have this area covered.
Here's what I have committed then, addressing the issues listed above.
I have added the missing ChangeLog entry too and rewritten the change
heading and description accordingly.
NB I can see you have not contributed before and your patch is very
small, affecting 4 lines of code only, which qualifies as not a legally
significant change. If you wish to continue contributing to binutils
project however, then please consider getting a copyright assignment
signed with FSF, as this will allow you to make changes beyond the limit
of ~15 lines of code total, which these 4 lines count against too. Nick,
the head binutils maintainer (cc-ed), will get you introduced if you would
like to follow this path.
Again, thank you for your contribution, your input is valuable.
Maciej
---
binutils/testsuite/binutils-all/mips/micromips-branch-alias.d | 17 +++++++++
binutils/testsuite/binutils-all/mips/micromips-branch-alias.s | 17 +++++++++
binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d | 17 +++++++++
binutils/testsuite/binutils-all/mips/mips-branch-alias.s | 18 ++++++++++
binutils/testsuite/binutils-all/mips/mips.exp | 8 ++++
binutils/testsuite/binutils-all/mips/mips1-branch-alias.d | 17 +++++++++
binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d | 17 +++++++++
binutils/testsuite/binutils-all/mips/mips2-branch-alias.d | 18 ++++++++++
binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d | 18 ++++++++++
binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d | 17 +++++++++
binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d | 17 +++++++++
opcodes/micromips-opc.c | 4 +-
opcodes/mips-opc.c | 11 +++---
13 files changed, 189 insertions(+), 7 deletions(-)
binutils-sagarmp-mips-opcodes-branch-aliases.diff
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-alias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-alias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: microMIPS branch instruction alias disassembly
+#source: micromips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4040 0000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 40e0 0000 bc [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 9401 0000 beqz at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> b401 0000 bnez at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4060 0000 bal [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4260 0000 bals [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0000 0000 nop
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-alias.s
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-alias.s
@@ -0,0 +1,17 @@
+ .text
+ .set mips32r3
+ .set noat
+ .set noreorder
+ .set micromips
+foo:
+ beq $0, $0, . + 4
+ bgez $0, . + 4
+ beqzc $0, . + 4
+ beqz $1, . + 4
+ bnez $1, . + 4
+ bgezal $0, . + 4
+ bgezals $0, . + 4
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -M no-aliases -d --prefix-addresses --show-raw-insn
+#name: microMIPS branch canonical alias disassembly
+#source: micromips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 9400 0000 beq zero,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4040 0000 bgez zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 40e0 0000 beqzc zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 9401 0000 beq at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> b401 0000 bne at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4060 0000 bgezal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 4260 0000 bgezals zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 0000 0000 sll zero,zero,0x0
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips-branch-alias.s
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips-branch-alias.s
@@ -0,0 +1,18 @@
+ .text
+ .set noat
+ .set noreorder
+ .set mips2
+foo:
+ beq $0, $0, . + 4
+ bgez $0, . + 4
+ bgezal $0, . + 4
+ bltzal $0, . + 4
+ beqz $1, . + 4
+ bnez $1, . + 4
+
+ beqzl $1, . + 4
+ bnezl $1, . + 4
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 4, 0
+ .space 16
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips.exp
===================================================================
--- binutils-gdb.orig/binutils/testsuite/binutils-all/mips/mips.exp
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips.exp
@@ -238,6 +238,14 @@ run_dump_test_o32 "mips16-extend-insn" n
run_dump_test_o32 "mips16e2-extend-insn" noarch
run_dump_test_o32 "mips16-alias" noarch
run_dump_test_o32 "mips16-noalias" noarch
+run_dump_test_o32 "mips1-branch-alias"
+run_dump_test_o32 "mips1-branch-noalias"
+run_dump_test_o32 "mips2-branch-alias"
+run_dump_test_o32 "mips2-branch-noalias"
+run_dump_test_o32 "mips32r6-branch-alias"
+run_dump_test_o32 "mips32r6-branch-noalias"
+run_dump_test_o32 "micromips-branch-alias"
+run_dump_test_o32 "micromips-branch-noalias"
run_dump_test_o32 "mips-note-2"
run_dump_test_n32 "mips-note-2-n32"
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips1-branch-alias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips1-branch-alias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -m mips:3000 -d --prefix-addresses --show-raw-insn
+#name: MIPS1 branch instruction alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 0x50200000
+[0-9a-f]+ <[^>]*> 54200000 0x54200000
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -M no-aliases -m mips:3000 -d --prefix-addresses --show-raw-insn
+#name: MIPS1 branch canonical alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bgezal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 0x50200000
+[0-9a-f]+ <[^>]*> 54200000 0x54200000
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips2-branch-alias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips2-branch-alias.d
@@ -0,0 +1,18 @@
+#PROG: objcopy
+#objdump: -m mips:6000 -d --prefix-addresses --show-raw-insn
+#name: MIPS2 branch instruction alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 beqzl at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 54200000 bnezl at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 nop
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d
@@ -0,0 +1,18 @@
+#PROG: objcopy
+#objdump: -M no-aliases -m mips:6000 -d --prefix-addresses --show-raw-insn
+#name: MIPS2 branch canonical alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bgezal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 beql at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 54200000 bnel at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 00000000 sll zero,zero,0x0
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -m mips:isa32r6 -d --prefix-addresses --show-raw-insn
+#name: MIPS32r6 branch instruction alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 nal
+[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 0x50200000
+[0-9a-f]+ <[^>]*> 54200000 0x54200000
+ \.\.\.
Index: binutils-gdb/binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d
===================================================================
--- /dev/null
+++ binutils-gdb/binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d
@@ -0,0 +1,17 @@
+#PROG: objcopy
+#objdump: -M no-aliases -m mips:isa32r6 -d --prefix-addresses --show-raw-insn
+#name: MIPS32r6 branch canonical alias disassembly
+#source: mips-branch-alias.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 04100000 nal
+[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*>
+[0-9a-f]+ <[^>]*> 50200000 0x50200000
+[0-9a-f]+ <[^>]*> 54200000 0x54200000
+ \.\.\.
Index: binutils-gdb/opcodes/micromips-opc.c
===================================================================
--- binutils-gdb.orig/opcodes/micromips-opc.c
+++ binutils-gdb/opcodes/micromips-opc.c
@@ -373,7 +373,7 @@ const struct mips_opcode micromips_opcod
{"bc2tl", "p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 },
{"bc2tl", "N,p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 },
{"beqz", "md,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 },
-{"beqz", "s,p", 0x94000000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 },
+{"beqz", "s,p", 0x94000000, 0xffe00000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 },
{"beqzl", "s,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1, 0, 0 },
{"beq", "md,mz,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* beqz */
{"beq", "mz,md,mE", 0x8c00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* beqz */
@@ -431,7 +431,7 @@ const struct mips_opcode micromips_opcod
{"bltzals", "s,p", 0x42200000, 0xffe00000, RD_1|WR_31|CBD, BD16, I1, 0, 0 },
{"bltzall", "s,p", 0, (int) M_BLTZALL, INSN_MACRO, 0, I1, 0, 0 },
{"bnez", "md,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 },
-{"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 },
+{"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 },
{"bnezl", "s,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1, 0, 0 },
{"bne", "md,mz,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* bnez */
{"bne", "mz,md,mE", 0xac00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* bnez */
Index: binutils-gdb/opcodes/mips-opc.c
===================================================================
--- binutils-gdb.orig/opcodes/mips-opc.c
+++ binutils-gdb/opcodes/mips-opc.c
@@ -460,7 +460,8 @@ const struct mips_opcode mips_builtin_op
{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_1|RD_2, INSN2_ALIAS, I1, 0, 0 },/* addu */
{"b", "p", 0x10000000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* beq 0,0 */
{"b", "p", 0x04010000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* bgez 0 */
-{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, INSN2_ALIAS, I1, 0, 0 },/* bgezal 0*/
+{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, INSN2_ALIAS, I1, 0, I37 }, /* bgezal 0 */
+{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, 0, I37, 0, 0 },
{"bc", "+'", 0xc8000000, 0xfc000000, NODS, 0, I37, 0, 0 },
{"balc", "+'", 0xe8000000, 0xfc000000, WR_31|NODS, 0, I37, 0, 0 },
{"lapc", "s,-A", 0xec000000, 0xfc180000, WR_1, RD_pc, I37, 0, 0 },
@@ -733,8 +734,8 @@ const struct mips_opcode mips_builtin_op
{"bc1tl", "N,p", 0x45030000, 0xffe30000, RD_CC|CBL|FP_S, 0, I4_32, 0, I37 },
/* bc2* are at the bottom of the table. */
/* bc3* are at the bottom of the table. */
-{"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
-{"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, I37 },
+{"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 },
+{"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1|CBL, INSN2_ALIAS, I2|T3, 0, I37 },
{"beq", "s,t,p", 0x10000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 },
{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1, 0, 0 },
{"beql", "s,t,p", 0x50000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, I37 },
@@ -784,8 +785,8 @@ const struct mips_opcode mips_builtin_op
{"bltzal", "s,p", 0x04100000, 0xfc1f0000, RD_1|WR_31|CBD, 0, I1, 0, I37 },
{"nal", "", 0x04100000, 0xffffffff, WR_31|CBD, 0, I1, 0, 0 }, /* bltzal 0,.+4 */
{"bltzall", "s,p", 0x04120000, 0xfc1f0000, RD_1|WR_31|CBL, 0, I2|T3, 0, I37 },
-{"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
-{"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, I37 },
+{"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 },
+{"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1|CBL, INSN2_ALIAS, I2|T3, 0, I37 },
{"bne", "s,t,p", 0x14000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 },
{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1, 0, 0 },
{"bnel", "s,t,p", 0x54000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, I37 },
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions
2022-03-06 18:32 [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions Maciej W. Rozycki
@ 2022-03-07 7:13 ` Sagar Patel
2022-03-07 11:51 ` Maciej W. Rozycki
0 siblings, 1 reply; 4+ messages in thread
From: Sagar Patel @ 2022-03-07 7:13 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: Nick Clifton, Chenghua Xu, binutils
On Sun, Mar 6, 2022 at 1:33 PM Maciej W. Rozycki <macro@orcam.me.uk> wrote:
>
> Last but not least your change does not include a testsuite update and
> yet it does not cause regressions with testing despite the semantic
> change. That means we don't have this area covered.
>
> Here's what I have committed then, addressing the issues listed above.
> I have added the missing ChangeLog entry too and rewritten the change
> heading and description accordingly.
Thanks for explaining how to format future patches. I didn't think to
update the test suite (since I didn't know it existed). I'll update
the ChangeLog, and include it in the commit message in the future.
> NB I can see you have not contributed before and your patch is very
> small, affecting 4 lines of code only, which qualifies as not a legally
> significant change. If you wish to continue contributing to binutils
> project however, then please consider getting a copyright assignment
> signed with FSF, as this will allow you to make changes beyond the limit
> of ~15 lines of code total, which these 4 lines count against too. Nick,
> the head binutils maintainer (cc-ed), will get you introduced if you would
> like to follow this path.
I have another patch that has a larger diff teed up, so I guess I'll
need to look into copyright assignment. Is there an easy way to assign
copyright as changes are submitted, instead of assigning it for all
future changes?
It would be great if this project could drop the copyright assignment
requirement like gcc [1]. This would certainly reduce friction in the
process of contributing. (I know you're probably not the person that
makes these decisions. Just putting this out there.)
> Again, thank you for your contribution, your input is valuable.
Thank you! I appreciate your guidance :)
[1]: https://lwn.net/Articles/857791/
---Sagar Patel
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions
2022-03-07 7:13 ` Sagar Patel
@ 2022-03-07 11:51 ` Maciej W. Rozycki
2022-03-07 12:50 ` Nick Clifton
0 siblings, 1 reply; 4+ messages in thread
From: Maciej W. Rozycki @ 2022-03-07 11:51 UTC (permalink / raw)
To: Sagar Patel, Nick Clifton; +Cc: Chenghua Xu, binutils
On Mon, 7 Mar 2022, Sagar Patel wrote:
> > NB I can see you have not contributed before and your patch is very
> > small, affecting 4 lines of code only, which qualifies as not a legally
> > significant change. If you wish to continue contributing to binutils
> > project however, then please consider getting a copyright assignment
> > signed with FSF, as this will allow you to make changes beyond the limit
> > of ~15 lines of code total, which these 4 lines count against too. Nick,
> > the head binutils maintainer (cc-ed), will get you introduced if you would
> > like to follow this path.
>
> I have another patch that has a larger diff teed up, so I guess I'll
> need to look into copyright assignment. Is there an easy way to assign
> copyright as changes are submitted, instead of assigning it for all
> future changes?
You can certainly assign copyright for individual changes only, however
FSF has not traditionally been particularly swift handling paperwork, so
it may not be the most efficient and the least frustrating way of doing
things.
From my engineer's point of view the easiest way not to assign copyright
for any future changes is not to submit them in the first place, and that
works equally well with the standard copyright assignment. I guess
lawyers can have a different view though. I think you can withdraw an
assignment already in place at any time too.
> It would be great if this project could drop the copyright assignment
> requirement like gcc [1]. This would certainly reduce friction in the
> process of contributing. (I know you're probably not the person that
> makes these decisions. Just putting this out there.)
I do not know if any decision WRT the copyright policy for binutils will
be unilateral or consensus-based (probably the latter, in which case I
will most likely have a chance to speak out), but in any case Nick will
be the best person to tell. Nick?
Maciej
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions
2022-03-07 11:51 ` Maciej W. Rozycki
@ 2022-03-07 12:50 ` Nick Clifton
0 siblings, 0 replies; 4+ messages in thread
From: Nick Clifton @ 2022-03-07 12:50 UTC (permalink / raw)
To: Maciej W. Rozycki, Sagar Patel; +Cc: Chenghua Xu, binutils
Hi Maciej, Hi Sagar,
>> It would be great if this project could drop the copyright assignment
>> requirement like gcc [1]. This would certainly reduce friction in the
>> process of contributing. (I know you're probably not the person that
>> makes these decisions. Just putting this out there.)
>
> I do not know if any decision WRT the copyright policy for binutils will
> be unilateral or consensus-based (probably the latter, in which case I
> will most likely have a chance to speak out), but in any case Nick will
> be the best person to tell. Nick?
This really needs to be a consensus based decision. I would not feel comfortable
imposing such a change on the project, especially if there are strong objections
to it.
From a personal point of view, I would like to continue to support the FSF and
it goal of Free Software for all. But I understand that recent events have made
some contributors unhappy with the governance of the FSF and as a result they are
less willing to pursue copyright assignments.
Cheers
Nick
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-03-06 18:32 [committed v2] MIPS/opcodes: Fix alias annotation for branch instructions Maciej W. Rozycki
2022-03-07 7:13 ` Sagar Patel
2022-03-07 11:51 ` Maciej W. Rozycki
2022-03-07 12:50 ` Nick Clifton
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