[PATCH 0/2] RISC-V: Make some instruction non-aliases to fix a disassembler issue

[PATCH 0/2] RISC-V: Make some instruction non-aliases to fix a disassembler issue

[Tsukasa OI]

Hello,

Certain instructions are defined as aliases (with INSN_ALIAS) but some
of them have no "parent" instructions (without INSN_ALIAS).

As a result, if the disassembler has given an option of `no-aliases',
they will be printed as `.4byte', unrecognized instructions.
This patchset fixes thie issue.

Note that zip/unzip fix is based on my previous patchset:
<https://sourceware.org/pipermail/binutils/2022-June/121159.html>

Changes since the patchset above are:
-   Also fixed `fence.tso' instruction
-   Added testcases (technically, added `-M no-aliases' to existing
    tests to make sure that target instructions are not aliases)

Tracker on GitHub:
<https://github.com/a4lg/binutils-gdb/wiki/riscv_dis_nonalias>
Supersedes:
-   <https://sourceware.org/pipermail/binutils/2022-June/121159.html>
    (Tracker: <https://github.com/a4lg/binutils-gdb/wiki/riscv_dis_rv32_zip>)

    Sidenote:
    I started listing my Binutils submissions on my GitHub Wiki:
    <https://github.com/a4lg/binutils-gdb/wiki/Patch-Queue>
    hoping that current status and conflicting patches are clear.



1. zip/unzip (RV32_Zbkb) [PATCH 1]

`zip' and `unzip' are instructions from Zbkb extension (RV32 only).
They are, in fact, specialized forms of `shfli' and `unshfli'
instructions, respectively.  The problem now is, since generalized
`shfli' and `unshfli' are not ratified AND `zip'/`unzip' are defined as
aliases (with INSN_ALIAS), it causes a problem on the diassembler.

With following assembler file with `-march=rv32i_zbkb',
    _start:
        zip a0, a1
        unzip a2, a3

The output with `objdump -d' is like this:
    80000028 <_start>:
    80000028:   08f59513      zip     a0,a1
    8000002c:   08f6d613      unzip   a2,a3

However, output with `objdump -d -M no-aliases' looks like this:
    80000028 <_start>:
    80000028:   08f59513      .4byte  0x8f59513
    8000002c:   08f6d613      .4byte  0x8f6d613

You can see that `-M no-aliases' option causes disassembler to ignore
`zip'/`unzip' instructions but cannot find right non-alias instructions.

Until generalized `shfli' and `unshfli' instructions are ratified,
my simple patch (which makes `zip'/`unzip' non-aliases) does the trick.

Once generalized `shfli' and `unshfli' instructions are ratified, the
status will be a bit different.  As the same issue is already present on
disassembling `zext.h' instruction on RV{32,64}_Zbb_Zbkb, this is to be
fixed with a different patchset:
<https://sourceware.org/pipermail/binutils/2022-June/121159.html>



2. fence.tso (RVI) [PATCH 2]

`fence.tso' is a subset of generalized `FENCE' instruction in the RISC-V
ISA.  However, this is not the case on GNU Binutils.

Since we don't have proper way how to describe fm (fence mode) field in
an assembler mnemonic of the `FENCE' instruction, GNU Binutils' `fence'
instruction is defined as RISC-V `FENCE' instruction where fm=0b0000
(regular fence).

As a result, `fence.tso' (which has fm=0b1000) is not a subset of GNU
Binutils' `fence' (which has 0b0000).  So, `fence.tso' must not be
defined as an alias (with INSN_ALIAS).




Tsukasa OI (2):
  RISC-V: Make `zip'/`unzip' on Zbkb non-aliases
  RISC-V: Make `fence.tso' a non-alias

 gas/testsuite/gas/riscv/fence-tso.d | 2 +-
 gas/testsuite/gas/riscv/zbkb-32.d   | 2 +-
 opcodes/riscv-opc.c                 | 6 +++---
 3 files changed, 5 insertions(+), 5 deletions(-)


base-commit: d2acd4b0c5bab349aaa152d60268bc144634a844
-- 
2.34.1

[PATCH 1/2] RISC-V: Make `zip'/`unzip' on Zbkb non-aliases

[Tsukasa OI]

`zip'/`unzip' are specialized forms of `shfli'/`unshfli' instructions
respectively.  However, because both `shfli' and `unshfli' are not
ratified (in generalized forms), disassembling `zip'/`unzip' on
RV32_Zbkb with `-M no-aliases' option makes disassembly dumps with
`.4byte' (an unrecognized instruction), not `zip'/`unzip'.
This commit makes `zip'/`unzip' non-aliases until generalized forms of
`shfli' and `unshfli' are ratified.

gas/ChangeLog:

	* testsuite/gas/riscv/zbkb-32.d: Make sure that all instructions
	in RV32_Zbkb are non-aliases and disassembled correctly.

opcodes/ChangeLog:

	* riscv-opc.c (riscv_opcodes): Make `zip'/`unzip' instructions
	on RV32_Zbkb non-aliases to fix a disassembler issue.
---
 gas/testsuite/gas/riscv/zbkb-32.d | 2 +-
 opcodes/riscv-opc.c               | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gas/testsuite/gas/riscv/zbkb-32.d b/gas/testsuite/gas/riscv/zbkb-32.d
index c2718a0965a..c3fd09f9274 100644
--- a/gas/testsuite/gas/riscv/zbkb-32.d
+++ b/gas/testsuite/gas/riscv/zbkb-32.d
@@ -1,6 +1,6 @@
 #as: -march=rv32i_zbkb
 #source: zbkb-32.s
-#objdump: -d
+#objdump: -d -M no-aliases
 
 .*:[ 	]+file format .*
 
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 2f9945aa930..6c5b2eaf524 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -942,8 +942,8 @@ const struct riscv_opcode riscv_opcodes[] =
 {"cpopw",     64, INSN_CLASS_ZBB,  "d,s",   MATCH_CPOPW, MASK_CPOPW, match_opcode, 0 },
 {"brev8",     32, INSN_CLASS_ZBKB,  "d,s",      MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
 {"brev8",     64, INSN_CLASS_ZBKB,  "d,s",      MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
-{"zip",       32, INSN_CLASS_ZBKB,  "d,s",      MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, INSN_ALIAS },
-{"unzip",     32, INSN_CLASS_ZBKB,  "d,s",      MATCH_UNSHFLI|MATCH_SHAMT_ZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, INSN_ALIAS },
+{"zip",       32, INSN_CLASS_ZBKB,  "d,s",      MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
+{"unzip",     32, INSN_CLASS_ZBKB,  "d,s",      MATCH_UNSHFLI|MATCH_SHAMT_ZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
 {"pack",       0, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACK, MASK_PACK, match_opcode, 0 },
 {"packh",      0, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACKH, MASK_PACKH, match_opcode, 0 },
 {"packw",     64, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACKW, MASK_PACKW, match_opcode, 0 },
-- 
2.34.1

[PATCH 2/2] RISC-V: Make `fence.tso' a non-alias

[Tsukasa OI]

While `fence.tso' is a subset of original `FENCE' instruction in RISC-V
ISA, `fence' instruction as defined in the GNU Binutils (constrained to
fm=0b0000) is not a superset of `fence.tso'.  As a result, it resulted
in `.4byte' when disassembled with `no-aliases` option.
This commit makes `fence.tso' instruction a non-alias.

gas/ChangeLog:

	* testsuite/gas/riscv/fence-tso.d: Make sure that `fence.tso'
	is currently not an alias.

opcodes/ChangeLog:

	* riscv-opc.c (riscv_opcodes): Make `fence.tso' instruction
	a non-alias.
---
 gas/testsuite/gas/riscv/fence-tso.d | 2 +-
 opcodes/riscv-opc.c                 | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gas/testsuite/gas/riscv/fence-tso.d b/gas/testsuite/gas/riscv/fence-tso.d
index ef8a4cdd1c9..00170f1259e 100644
--- a/gas/testsuite/gas/riscv/fence-tso.d
+++ b/gas/testsuite/gas/riscv/fence-tso.d
@@ -1,5 +1,5 @@
 #as: -march=rv32ic
-#objdump: -dr
+#objdump: -dr -M no-aliases
 
 .*:[ 	]+file format .*
 
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 6c5b2eaf524..50a51b40d69 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -421,7 +421,7 @@ const struct riscv_opcode riscv_opcodes[] =
 {"fence",       0, INSN_CLASS_I, "",          MATCH_FENCE|MASK_PRED|MASK_SUCC, MASK_FENCE|MASK_RD|MASK_RS1|MASK_IMM, match_opcode, INSN_ALIAS },
 {"fence",       0, INSN_CLASS_I, "P,Q",       MATCH_FENCE, MASK_FENCE|MASK_RD|MASK_RS1|(MASK_IMM & ~MASK_PRED & ~MASK_SUCC), match_opcode, 0 },
 {"fence.i",     0, INSN_CLASS_ZIFENCEI, "",   MATCH_FENCE_I, MASK_FENCE|MASK_RD|MASK_RS1|MASK_IMM, match_opcode, 0 },
-{"fence.tso",   0, INSN_CLASS_I, "",          MATCH_FENCE_TSO, MASK_FENCE_TSO|MASK_RD|MASK_RS1, match_opcode, INSN_ALIAS },
+{"fence.tso",   0, INSN_CLASS_I, "",          MATCH_FENCE_TSO, MASK_FENCE_TSO|MASK_RD|MASK_RS1, match_opcode, 0 },
 {"rdcycle",     0, INSN_CLASS_I, "d",         MATCH_RDCYCLE, MASK_RDCYCLE, match_opcode, INSN_ALIAS },
 {"rdinstret",   0, INSN_CLASS_I, "d",         MATCH_RDINSTRET, MASK_RDINSTRET, match_opcode, INSN_ALIAS },
 {"rdtime",      0, INSN_CLASS_I, "d",         MATCH_RDTIME, MASK_RDTIME, match_opcode, INSN_ALIAS },
-- 
2.34.1