[Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP

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--- Comment #25 from Sergei Gavrikov <sergei.gavrikov@gmail.com> 2011-08-23 21:46:54 BST ---
(In reply to comment #24)

[snip]

> > cortexm_regs.h:
> > 
> > Ilija, I missed that you have used such an order for arguments in REV
> > macros, for example
> > 
> > +// Reverse word
> > +#define CYGARC_REV(_swapped_,_original_) \
> > +        __asm__ volatile ("rev %0, %1\n" : "=r"(_swapped_) : "r"(_original_))
> > +
> > 
> > It looks clear for ARM assembler gurus (dst <- src), and for C-guys
> > it looks a bit puzzled, (IMO) they are accustomed to same

[snip]

> I would insist to keep present order. Here are some arguments:
> 
> These macros shall be used mainly by people who are familiar with
> assembler and they would be surprised if order is not as in assembler.
> 
> Also there is a long tradition the destination to be first argument in
> C functions. The origins date back to big-bang, look for rationale in
> K&R book.  Examples strcpy(), strcat(), memcpy()...
>  

Ilija, thank you for your comments. I have to agree with such arguments
:-)

> > Still, I would use prototypes where result returns in the second
> > argument. And if you have no objections I would use multiline
> > variants for those macros.
> > 
> > #define CYGARC_REV( _origin_, _swapped_ )       \
> >     asm volatile( "rev %0, %1\n"                \
> >                   : "=r" (_swapped_)            \
> >                   : "r" (_origin_)              \
> >                 );
> 
> I wouldn't object, only I don't see the need for it. Present layout
> doesn't stretch out of limits. As far as I have seen other
> architectures (coldfire, ppc) use same layout.

I see. It seems it's a matter of taste, as for me I try to avoid the
1-liners near to 78th position.

So, I plan to check-in the sent patches with some minor clean-ups, of
course, if no one else has objections.

Sergei

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