From: bugzilla-daemon@bugs.ecos.sourceware.org
To: ecos-patches@ecos.sourceware.org
Subject: [Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP
Date: Wed, 17 Aug 2011 20:26:00 -0000 [thread overview]
Message-ID: <20110817202552.894F92F78010@mail.ecoscentric.com> (raw)
In-Reply-To: <bug-1001275-104@http.bugs.ecos.sourceware.org/>
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--- Comment #3 from Ilija Kocho <ilijak@siva.com.mk> 2011-08-17 21:25:47 BST ---
Hi Sergei, thank you for comments.
(In reply to comment #2)
> Hi Ijlija,
>
> Thank you for your attention to low-memory footprint eCos targets and your
> ideas around, i.e. how to utilize every bit on such CPUs :-)
And spare some clock cycles :)
>
> My $.02.
>
> Instead hal_arch_instr.h I would create <arch>_regs.h header file to define
> a few instructions in assembler. In your case it is cortexm_regs.h.
>
> NOTE: There are the precendents of such definitions in other architecture
> trees.
>
Right! Actually I was looking for such a header but obviously not hard enough.
I would have been happier if file name was hal_regs.h, but let's not break the
habit, and use cortexm_regs.h
> I mean (snippets not tested!)
>
> #ifndef CYGONCE_HAL_CORTEXM_REGS_H
> #define CYGONCE_HAL_CORTEXM_REGS_H
> //==================================================== ...
> //
> // cortexm_regs.h
> //
> // Cortex-M CPU definitions
> //
> // ...
>
> #include <pkgconf/hal.h>
>
> #include <cyg/hal/var_regs.h>
>
> // Macro to embed rev instructions in C code
> #define CYGARC_REV(_origin_, _swapped_) \
> asm volatile( "rev %0, %1\n" \
> : "=r" (_swapped_) \
> : "r" (_origin_) \
> );
>
> #define CYGARC_REV16(_origin_, _swapped_) \
> asm volatile( "rev16 %0, %1\n" \
> : "=r" (_swapped_) \
> : "r" (_origin_) \
> );
// We could also define the functions, now using macros.
// In context with this please look at discussion
// regarding lwIP below.
// Regarding functions I have one dillema:
// Could we rename cygarc_arm_rev*() functions into cygarc_byteswap*()?
#define CYGARC_HAL_INSTR_ATTR \
__externC __attribute__(( always_inline )) inline
// This is an optional name for cygarc_arm_rev()
// CYGARC_HAL_INSTR_ATTR cyg_uint32 cygarc_byteswap(cyg_uint32 original){
CYGARC_HAL_INSTR_ATTR cyg_uint32 cygarc_arm_rev(cyg_uint32 original){
cyg_uint32 swapped;
CYGARC_REV(swapped, original);
return swapped;
}
CYGARC_HAL_INSTR_ATTR cyg_uint32 cygarc_arm_rev16(cyg_uint32 original){
cyg_uint32 swapped;
CYGARC_REV16(swapped, original);
return swapped;
}
CYGARC_HAL_INSTR_ATTR cyg_int32 cygarc_arm_revsh(cyg_int32 original){
cyg_int32 swapped;
CYGARC_REVSH(swapped, original);
return swapped;
}
// Platform supports endian operations.
#define CYGARC_BYTESWAP 1
#define CYGARC_BYTESWAP32(__val) cygarc_arm_rev(__val)
#define CYGARC_BYTESWAP16(__val) ((cyg_uint16)cygarc_arm_rev16(__val))
> // ---------------------------------------------------- ...
> // End of cortexm_regs.h
> #endif // ifdef CYGONCE_HAL_CORTEXM_REGS_H
>
>
> And then I would add only needed inline functions and declarations in some
> header file (again, not tested)
>
> #include <cyg/hal/cortexm_regs.h>
>
> #define LWIP_PLATFORM_HTONL( _hostlong_ ) hal_htol( _hostlong_ )
> #define LWIP_PLATFORM_HTONS( _hostshort_ ) hal_htos( _hostshort_ )
I think that it wouldn't be appropriate to use ARM-related mnemonics
(CYGARC_REV) in lwIP subtree. Also we should avoid, putting lwIP - related
names into HAL.
For this reason I have defined CYGARC_BUTESWAPxx() - architecture neutral macro
name that could be used in other architectures as appropriate.
>
> static inline cyg_uint32 hal_htonl(cyg_uint32 hostslong)
> {
> cyg_uint32 netlong;
> CYGARC_REV(hostlong, netlong);
> return netlong;
> }
>
> static inline cyg_uint16 hal_htons(cyg_uint16 hostshort)
> {
> cyg_uint16 netshort;
> CYGARC_REV16(hostshort, netshort);
> return netshort;
> }
>
>
> But, I would resist to put them in hal_arch.h ... And it is mine only. By
> other hand lwipopts.h includes that header only. I thought it's pitty that we
> have hal_io.h, but not hal_net.h. Thus, we need more expert views on code's
> arrangement.
I think that hal_arch.h isn't bad, after all cortexm_regs.h belong to hal and
is architecture specific.
I am not able to run the code at present but it builds without warnings.
Disassembly looks as expected.
Ilija
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next prev parent reply other threads:[~2011-08-17 20:26 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-03 17:46 [Bug 1001275] New: Cortex-M (armV7) architecture endian instructions / lwIP bugzilla-daemon
2011-07-03 17:52 ` [Bug 1001275] " bugzilla-daemon
2011-07-03 17:56 ` [Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP bugzilla-daemon
2011-08-15 20:17 ` bugzilla-daemon
2011-08-17 20:26 ` bugzilla-daemon [this message]
2011-08-18 21:14 ` bugzilla-daemon
2011-08-19 8:41 ` bugzilla-daemon
2011-08-19 15:09 ` bugzilla-daemon
2011-08-19 15:18 ` bugzilla-daemon
2011-08-21 13:46 ` bugzilla-daemon
2011-08-22 12:10 ` bugzilla-daemon
2011-08-22 13:01 ` bugzilla-daemon
2011-08-22 13:23 ` bugzilla-daemon
2011-08-22 13:36 ` bugzilla-daemon
2011-08-22 14:24 ` bugzilla-daemon
2011-08-22 16:45 ` bugzilla-daemon
2011-08-22 18:26 ` bugzilla-daemon
2011-08-23 13:27 ` bugzilla-daemon
2011-08-23 13:32 ` bugzilla-daemon
2011-08-23 14:18 ` bugzilla-daemon
2011-08-23 16:14 ` bugzilla-daemon
2011-08-23 16:17 ` bugzilla-daemon
2011-08-23 16:19 ` bugzilla-daemon
2011-08-23 16:21 ` bugzilla-daemon
2011-08-23 19:27 ` bugzilla-daemon
2011-08-23 20:15 ` bugzilla-daemon
2011-08-23 20:47 ` bugzilla-daemon
2011-08-24 6:51 ` bugzilla-daemon
2011-08-24 7:08 ` bugzilla-daemon
2011-08-24 13:34 ` bugzilla-daemon
2011-08-24 13:47 ` bugzilla-daemon
2011-08-24 16:43 ` bugzilla-daemon
2011-08-24 17:01 ` bugzilla-daemon
2011-08-24 17:56 ` bugzilla-daemon
2011-08-25 8:02 ` bugzilla-daemon
2011-08-25 8:20 ` bugzilla-daemon
2011-08-25 14:04 ` bugzilla-daemon
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