[Bug target/100067] New: Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[Bug target/100067] New: Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

            Bug ID: 100067
           Summary: Unexpected warning for -mcpu=neoverse-n1 when
                    configured with --with-fpu
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rearnsha at gcc dot gnu.org
  Target Milestone: ---

If the compiler is configured with (for example):

--with-arch=armv7-a --with-fpu=neon --with-float=hard

then compiling with

gcc -S -mcpu=neoverse-n1 <any-c-file>

leads to an unexpected warning:
cc1: warning: switch ‘-mcpu=neoverse-n1’ conflicts with ‘-march=armv8.2-a’
switch

The same can be seen if -mfpu is passed explicitly on the command-line (which,
while it shouldn't happen, is slightly less surprising).

If -mfpu is specified to be anything other than auto (via command line or
configuration), it is expected that this will override *all* features from the
cpu/arch setting that relate to the use of the FPU.

Note, we should probably at this point progress the deprecation process for
-mfpu by deprecating the config option that allows this to be set during
configure.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:d1e4368ddb76a92c44f824c8e4ca1a3de8149342

commit r11-8168-gd1e4368ddb76a92c44f824c8e4ca1a3de8149342
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Wed Apr 14 10:56:36 2021 +0100

    arm: fix warning when -mcpu=neoverse-n1 is used with -mfpu=neon [PR100067]

    If the compiler is configured with --with-fpu=<!auto> (or invoked
    with, say, -mfpu=neon), then specifying -mcpu=neoverse-n1 can lead to
    an unexpected warning: cc1: warning: switch â-mcpu=neoverse-n1â
    conflicts with â-march=armv8.2-aâ switch

    The fix for this is to correctly remove all the feature bits relating
    to simd/fp units when -mfpu is used, not just those bits that form
    part of the -mfpu specification (which is a subset).

    gcc:
            PR target/100067
            * config/arm/arm.c (arm_configure_build_target): Strip
isa_all_fpbits
            from the isa_delta when -mfpu has been used.
            (arm_options_perform_arch_sanity_checks): It's the architecture
that
            lacks an FPU not the processor.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-04-14
             Status|UNCONFIRMED                 |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |rearnsha at gcc dot gnu.org

--- Comment #2 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Fixed on trunk for now.  May require a backport.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

Christophe Lyon <clyon at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |clyon at gcc dot gnu.org

--- Comment #3 from Christophe Lyon <clyon at gcc dot gnu.org> ---
Unfortunately this is causing many regressions in the GCC testsuite.

For instance:
--target arm-none-linux-gnueabi
--with-mode arm
--with-cpu cortex-a9
--with-fpu default
gcc.target/arm/armv8_2-fp16-neon-1.c is compiled with
-mfloat-abi=softfp -march=armv8.2-a+fp16

/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c: In function
'test_vceqz_16x4':
/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:13: warning: implicit
declaration of function 'vceqz_f16'; did you mean 'vceqq_u16'?
[-Wimplicit-function-declaration]
/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:10:25: note: in definition
of macro 'MSTRCAT'
/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:1: note: in expansion
of macro 'VCMP1_TEST'
/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:13: error: incompatible
types when returning type 'int' but 'uint16x4_t' was expected
[...]


--target arm-none-linux-gnueabi
--with-mode arm
--with-cpu cortex-a9
--with-fpu default
Dejagnu flags: -march=armv5t
gcc.target/arm/aes-fuse-1.c is compiled with

-march=armv5t -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mcpu=cortex-a72
cc1: warning: switch '-mcpu=cortex-a72' conflicts with switch '-march=armv5t'
FAIL: gcc.target/arm/aes-fuse-1.c (test for excess errors)

For a full picture of the regressions I noticed:
https://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/r11-8168-gd1e4368ddb76a92c44f824c8e4ca1a3de8149342/report-build-info.html

(click on "log" to download the corresponding gcc.log and see the error
messages)
(you can ignore the regressions in g++, they are caused by a previous commit)

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

--- Comment #4 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
(In reply to Christophe Lyon from comment #3)
> Unfortunately this is causing many regressions in the GCC testsuite.

Sigh!  I'm not entirely surprised.  I suspect most of this is testisms, though.

> 
> For instance:
> --target arm-none-linux-gnueabi
> --with-mode arm
> --with-cpu cortex-a9
> --with-fpu default
> gcc.target/arm/armv8_2-fp16-neon-1.c is compiled with
> -mfloat-abi=softfp -march=armv8.2-a+fp16
> 
> /gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c: In function
> 'test_vceqz_16x4':
> /gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:13: warning:
> implicit declaration of function 'vceqz_f16'; did you mean 'vceqq_u16'?
> [-Wimplicit-function-declaration]
> /gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:10:25: note: in
> definition of macro 'MSTRCAT'
> /gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:1: note: in
> expansion of macro 'VCMP1_TEST'
> /gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-1.c:139:13: error:
> incompatible types when returning type 'int' but 'uint16x4_t' was expected
> [...]

It's not obvious what's happening here.  I'll look.

> 
> 
> --target arm-none-linux-gnueabi
> --with-mode arm
> --with-cpu cortex-a9
> --with-fpu default
> Dejagnu flags: -march=armv5t
> gcc.target/arm/aes-fuse-1.c is compiled with
> 
> -march=armv5t -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mcpu=cortex-a72
> cc1: warning: switch '-mcpu=cortex-a72' conflicts with switch '-march=armv5t'

The warning is correct.  That's a stupid combination to pass to the compiler
(arch=armv5 and cpu=<armv8>).  What's less clear is why this wasn't happening
before.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

--- Comment #5 from Christophe Lyon <clyon at gcc dot gnu.org> ---
(In reply to Richard Earnshaw from comment #4)
> (In reply to Christophe Lyon from comment #3)
> > Unfortunately this is causing many regressions in the GCC testsuite.
> 
> Sigh!  I'm not entirely surprised.  I suspect most of this is testisms,
> though.
> 
:-)
Yes, probably.

> > --target arm-none-linux-gnueabi
> > --with-mode arm
> > --with-cpu cortex-a9
> > --with-fpu default
> > Dejagnu flags: -march=armv5t
> > gcc.target/arm/aes-fuse-1.c is compiled with
> > 
> > -march=armv5t -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mcpu=cortex-a72
> > cc1: warning: switch '-mcpu=cortex-a72' conflicts with switch '-march=armv5t'
> 
> The warning is correct.  That's a stupid combination to pass to the compiler
> (arch=armv5 and cpu=<armv8>).  What's less clear is why this wasn't
> happening before.

Indeed. I just checked the command line was the same before your patch (i.e.
your patch has no impact on the effective-targets that could change the flags
used)

FTR, even before your patch there were several such annoying warnings.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:69e7f04ff677d5e402f937b23422567c10243ee9

commit r11-8212-g69e7f04ff677d5e402f937b23422567c10243ee9
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Fri Apr 16 11:58:17 2021 +0100

    arm: Fix some testsuite fallout from r11-8168 [PR100067]

    Commit r11-8168 changed the word ordering of a warning in order to
    make the text more consistent.  Unfortunately, it neglected to update
    some filters in the testsuite that are intended to strip such warnings
    when we try to partially override the user-supplied command-line
    options.

    This patch rectifies this and also fixes some patterns that were
    incorrectly specified in the first place.

    gcc/testsuite:

            PR target/100067
            * g++.target/arm/arm.exp (dg_runtest_extra_prunes): Update prune
            template.
            * gcc.target/arm/arm.exp (dg_runtest_extra_prunes): Likewise.
            * g++.target/arm/mve.exp (dg_runtest_extra_prunes): Likewise.  Fix
            missing quotes around switch names.
            * gcc.target/arm/mve/mve.exp: (dg_runtest_extra_prunes): Likewise.

[Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:3bffc4b37e85c7f6092dfb0fbe4067d268e97b46

commit r11-8245-g3bffc4b37e85c7f6092dfb0fbe4067d268e97b46
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Mon Apr 19 16:56:31 2021 +0100

    arm: partial revert of r11-8168 [PR100067]

    This is a partial revert of r11-8168.  The overall purpose of the
    commit is retained (to fix a bogus warning when -mfpu=<not-auto> is
    used in combination with eg -mcpu=neoverse-v1), but it removes the
    hunk that changed the subsequent feature bits for features of a
    simd/fp unit that cannot be described by -mfpu.  While I still think
    that is the correct direction of travel, it's somewhat disruptive and
    not appropriate for late stage4.  I'll revisit for gcc-12.

    gcc:
            PR target/100067
            * config/arm/arm.c (arm_configure_build_target): Do not strip
            extended FPU/SIMD feature bits from the target ISA when -mfpu
            is specified (partial revert of r11-8168).