[Bug target/101723] New: arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[Bug target/101723] New: arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

            Bug ID: 101723
           Summary: arm: incorrect order of .fpu and .arch_extension
                    directives leads to unsupported instructions
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rearnsha at gcc dot gnu.org
  Target Milestone: ---

This bug was originally reported against GNU binutils
(https://sourceware.org/bugzilla/show_bug.cgi?id=28078), but is really a
problem with the way GCC emits the directives .fpu and .arch_extension.


Alok Parlikar 2021-07-12 04:50:04 UTC

I was trying to build tensorflow-lite v2.5 with a custom toolchain that was
using binutils 2.36.1. The build failed when building the xnnpack project with
an error:

/tmp/ccMSJOfk.s:380: Error: selected processor does not support `vsdot.s8
q12,q9,d11[0]' in ARM mode

Some of my notes about this issue are here:
https://github.com/google/XNNPACK/issues/1465#issuecomment-877910701

Following is a minimal example to reproduce this:


// file: test.c
#include <arm_neon.h>

int32x2_t test(int32x2_t a, int8x8_t b, int8x8_t c) {
        return vdot_lane_s32(a, b, c, 1);
}
// EOF

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
           Assignee|unassigned at gcc dot gnu.org      |rearnsha at gcc dot gnu.org
   Last reconfirmed|                            |2021-08-02
     Ever confirmed|0                           |1

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |assemble-failure
            Version|11.0                        |9.0

--- Comment #1 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Affects all active branches.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:c1cdabe3aab817d95a8db00a8b5e9f6bcdea936f

commit r12-2762-gc1cdabe3aab817d95a8db00a8b5e9f6bcdea936f
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Jul 29 11:00:31 2021 +0100

    arm: reorder assembler architecture directives [PR101723]

    A change to the way gas interprets the .fpu directive in binutils-2.34
    means that issuing .fpu will clear any features set by .arch_extension
    that apply to the floating point or simd units.  This unfortunately
    causes problems for more recent versions of the architecture because
    we currently emit .arch, .arch_extension and .fpu directives at
    different times and try to suppress redundant changes.

    This change addresses this by firstly unifying all the places where we
    emit these directives to a single block of code and secondly
    (re)emitting all the directives if any changes have been made to the
    target options.  Whilst this is slightly more than the strict minimum
    it should be enough to catch all cases where a change could have
    happened.  The new code also emits the directives in the order: .arch,
    .fpu, .arch_extension.  This ensures that the additional architectural
    extensions are not removed by a later .fpu directive.

    Whilst writing this patch I also noticed that in the corner case where
    the last function to be compiled had a non-standard set of
    architecture flags, the assembler would add an incorrect set of
    derived attributes for the file as a whole.  Instead of reflecting the
    command-line options it would reflect the flags from the last file in
    the function.  To address this I've also added a call to re-emit the
    flags from the asm_file_end callback so the assembler will be in the
    correct state when it finishes processing the intput.

    There's some slight churn to the testsuite as a consequence of this,
    because previously we had a hack to suppress emitting a .fpu directive
    for one specific case, but with the new order this is no-longer
    necessary.

    gcc/ChangeLog:

            PR target/101723
            * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
            writing .cpu directive in asm output.
            * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
            (arm_last_printed_arch_string): Delete.
            (arm_last-printed_fpu_string): Delete.
            (arm_configure_build_target): If use of floating-point/SIMD is
            disabled, remove all fp/simd related features from the target ISA.
            (last_arm_targ_options): New variable.
            (arm_print_asm_arch_directives): Add new parameters.  Change order
            of emitted directives and handle all cases here.
            (arm_file_start): Always call arm_print_asm_arch_directives, move
            all generation of .arch/.arch_extension here.
            (arm_file_end): Call arm_print_asm_arch.
            (arm_declare_function_name): Call arm_print_asm_arch_directives
            instead of printing .arch/.fpu directives directly.

    gcc/testsuite/ChangeLog:

            PR target/101723
            * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected
output.
            * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
            * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
            * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do
assemble.
            Add a non-no-op function body.
            * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
            * gcc.target/arm/pr98636.c (dg-options): Add -mfloat-abi=softfp.
            * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
            * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use
            check-function-bodies.
            * gcc.target/arm/attr-neon3.c: Likewise.
            * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
            multiple instances.
            * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Christophe Lyon <clyon@gcc.gnu.org>:

https://gcc.gnu.org/g:a22b3e022c2b45047a28d901042888eb77620499

commit r12-2790-ga22b3e022c2b45047a28d901042888eb77620499
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:06:44 2021 +0000

    arm: Fix typos for reorder assembler architecture directives [PR101723]

    Two tests had typos preventing them from passing, committed as obvious.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/
            PR target/101723
            * gcc.target/arm/attr-neon3.c: Fix typo.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Christophe Lyon <clyon@gcc.gnu.org>:

https://gcc.gnu.org/g:aff75af3b50f8c039ed6fbfa3f313ba45d44f6e6

commit r12-2791-gaff75af3b50f8c039ed6fbfa3f313ba45d44f6e6
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:25:47 2021 +0000

    arm: Fix pr69245.c testcase for reorder assembler architecture directives
[PR101723]

    In gcc.target/arm/pr69245.c, to have a .fpu neon-vfpv4 directive, make
    sure code for fn1() is emitted, by removing the static keyword.

    Fix a typo in gcc.target/arm/pr69245.c, where \s should be \\s.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/

            PR target/101723
            * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
            typo.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:c21ba5e57e49b870f1607944c0742e78feb7bc8d

commit r11-8881-gc21ba5e57e49b870f1607944c0742e78feb7bc8d
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Jul 29 11:00:31 2021 +0100

    arm: reorder assembler architecture directives [PR101723]

    A change to the way gas interprets the .fpu directive in binutils-2.34
    means that issuing .fpu will clear any features set by .arch_extension
    that apply to the floating point or simd units.  This unfortunately
    causes problems for more recent versions of the architecture because
    we currently emit .arch, .arch_extension and .fpu directives at
    different times and try to suppress redundant changes.

    This change addresses this by firstly unifying all the places where we
    emit these directives to a single block of code and secondly
    (re)emitting all the directives if any changes have been made to the
    target options.  Whilst this is slightly more than the strict minimum
    it should be enough to catch all cases where a change could have
    happened.  The new code also emits the directives in the order: .arch,
    .fpu, .arch_extension.  This ensures that the additional architectural
    extensions are not removed by a later .fpu directive.

    Whilst writing this patch I also noticed that in the corner case where
    the last function to be compiled had a non-standard set of
    architecture flags, the assembler would add an incorrect set of
    derived attributes for the file as a whole.  Instead of reflecting the
    command-line options it would reflect the flags from the last file in
    the function.  To address this I've also added a call to re-emit the
    flags from the asm_file_end callback so the assembler will be in the
    correct state when it finishes processing the intput.

    There's some slight churn to the testsuite as a consequence of this,
    because previously we had a hack to suppress emitting a .fpu directive
    for one specific case, but with the new order this is no-longer
    necessary.

    gcc/ChangeLog:

            PR target/101723
            * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
            writing .cpu directive in asm output.
            * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
            (arm_last_printed_arch_string): Delete.
            (arm_last-printed_fpu_string): Delete.
            (arm_configure_build_target): If use of floating-point/SIMD is
            disabled, remove all fp/simd related features from the target ISA.
            (last_arm_targ_options): New variable.
            (arm_print_asm_arch_directives): Add new parameters.  Change order
            of emitted directives and handle all cases here.
            (arm_file_start): Always call arm_print_asm_arch_directives, move
            all generation of .arch/.arch_extension here.
            (arm_file_end): Call arm_print_asm_arch.
            (arm_declare_function_name): Call arm_print_asm_arch_directives
            instead of printing .arch/.fpu directives directly.

    gcc/testsuite/ChangeLog:

            PR target/101723
            * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected
output.
            * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
            * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
            * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do
assemble.
            Add a non-no-op function body.
            * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
            * gcc.target/arm/pr98636.c (dg-options): Add -mfloat-abi=softfp.
            * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
            * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use
            check-function-bodies.
            * gcc.target/arm/attr-neon3.c: Likewise.
            * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
            multiple instances.
            * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.

    (cherry picked from commit c1cdabe3aab817d95a8db00a8b5e9f6bcdea936f)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:39bb64e79a280fa773c8dcd79b992745e8c1b738

commit r11-8882-g39bb64e79a280fa773c8dcd79b992745e8c1b738
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:06:44 2021 +0000

    arm: Fix typos for reorder assembler architecture directives [PR101723]

    Two tests had typos preventing them from passing, committed as obvious.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/
            PR target/101723
            * gcc.target/arm/attr-neon3.c: Fix typo.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo.

    (cherry picked from commit a22b3e022c2b45047a28d901042888eb77620499)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:b8a001599d21eaa77737df7efc6bc206e6964cdf

commit r11-8883-gb8a001599d21eaa77737df7efc6bc206e6964cdf
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:25:47 2021 +0000

    arm: Fix pr69245.c testcase for reorder assembler architecture directives
[PR101723]

    In gcc.target/arm/pr69245.c, to have a .fpu neon-vfpv4 directive, make
    sure code for fn1() is emitted, by removing the static keyword.

    Fix a typo in gcc.target/arm/pr69245.c, where \s should be \\s.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/

            PR target/101723
            * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
            typo.

    (cherry picked from commit aff75af3b50f8c039ed6fbfa3f313ba45d44f6e6)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:02d5a1988247207da46f25ce8b58515e25c1f250

commit r10-10056-g02d5a1988247207da46f25ce8b58515e25c1f250
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Jul 29 11:00:31 2021 +0100

    arm: reorder assembler architecture directives [PR101723]

    A change to the way gas interprets the .fpu directive in binutils-2.34
    means that issuing .fpu will clear any features set by .arch_extension
    that apply to the floating point or simd units.  This unfortunately
    causes problems for more recent versions of the architecture because
    we currently emit .arch, .arch_extension and .fpu directives at
    different times and try to suppress redundant changes.

    This change addresses this by firstly unifying all the places where we
    emit these directives to a single block of code and secondly
    (re)emitting all the directives if any changes have been made to the
    target options.  Whilst this is slightly more than the strict minimum
    it should be enough to catch all cases where a change could have
    happened.  The new code also emits the directives in the order: .arch,
    .fpu, .arch_extension.  This ensures that the additional architectural
    extensions are not removed by a later .fpu directive.

    Whilst writing this patch I also noticed that in the corner case where
    the last function to be compiled had a non-standard set of
    architecture flags, the assembler would add an incorrect set of
    derived attributes for the file as a whole.  Instead of reflecting the
    command-line options it would reflect the flags from the last file in
    the function.  To address this I've also added a call to re-emit the
    flags from the asm_file_end callback so the assembler will be in the
    correct state when it finishes processing the intput.

    There's some slight churn to the testsuite as a consequence of this,
    because previously we had a hack to suppress emitting a .fpu directive
    for one specific case, but with the new order this is no-longer
    necessary.

    gcc/ChangeLog:

            PR target/101723
            * config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
            writing .cpu directive in asm output.
            * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
            (arm_last_printed_arch_string): Delete.
            (arm_last-printed_fpu_string): Delete.
            (arm_configure_build_target): If use of floating-point/SIMD is
            disabled, remove all fp/simd related features from the target ISA.
            (last_arm_targ_options): New variable.
            (arm_print_asm_arch_directives): Add new parameters.  Change order
            of emitted directives and handle all cases here.
            (arm_file_start): Always call arm_print_asm_arch_directives, move
            all generation of .arch/.arch_extension here.
            (arm_file_end): Call arm_print_asm_arch.
            (arm_declare_function_name): Call arm_print_asm_arch_directives
            instead of printing .arch/.fpu directives directly.

    gcc/testsuite/ChangeLog:

            PR target/101723
            * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Update expected
output.
            * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
            * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
            * gcc.target/arm/mve/intrinsics/mve_fpu1.c: Convert to dg-do
assemble.
            Add a non-no-op function body.
            * gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
            * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
            * gcc.target/arm/attr-neon2.c: Use -Ofast, convert test to use
            check-function-bodies.
            * gcc.target/arm/attr-neon3.c: Likewise.
            * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
            multiple instances.
            * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.

    (cherry picked from commit c1cdabe3aab817d95a8db00a8b5e9f6bcdea936f)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:5e4f82abde37887301ccd6959fef70926a994d56

commit r10-10057-g5e4f82abde37887301ccd6959fef70926a994d56
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:06:44 2021 +0000

    arm: Fix typos for reorder assembler architecture directives [PR101723]

    Two tests had typos preventing them from passing, committed as obvious.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/
            PR target/101723
            * gcc.target/arm/attr-neon3.c: Fix typo.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Fix typo.

    (cherry picked from commit a22b3e022c2b45047a28d901042888eb77620499)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:f27d2ed875fbddfad1879ea8ea52ff531cb156dd

commit r10-10058-gf27d2ed875fbddfad1879ea8ea52ff531cb156dd
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:25:47 2021 +0000

    arm: Fix pr69245.c testcase for reorder assembler architecture directives
[PR101723]

    In gcc.target/arm/pr69245.c, to have a .fpu neon-vfpv4 directive, make
    sure code for fn1() is emitted, by removing the static keyword.

    Fix a typo in gcc.target/arm/pr69245.c, where \s should be \\s.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/

            PR target/101723
            * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
            typo.

    (cherry picked from commit aff75af3b50f8c039ed6fbfa3f313ba45d44f6e6)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:04c568961e793a1d7ad86248b4ca929fc84acf8d

commit r9-9690-g04c568961e793a1d7ad86248b4ca929fc84acf8d
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Thu Jul 29 11:00:31 2021 +0100

    arm: reorder assembler architecture directives [PR101723]

    A change to the way gas interprets the .fpu directive in binutils-2.34
    means that issuing .fpu will clear any features set by .arch_extension
    that apply to the floating point or simd units.  This unfortunately
    causes problems for more recent versions of the architecture because
    we currently emit .arch, .arch_extension and .fpu directives at
    different times and try to suppress redundant changes.

    This change addresses this by firstly unifying all the places where we
    emit these directives to a single block of code and secondly
    (re)emitting all the directives if any changes have been made to the
    target options.  Whilst this is slightly more than the strict minimum
    it should be enough to catch all cases where a change could have
    happened.  The new code also emits the directives in the order: .arch,
    .fpu, .arch_extension.  This ensures that the additional architectural
    extensions are not removed by a later .fpu directive.

    Whilst writing this patch I also noticed that in the corner case where
    the last function to be compiled had a non-standard set of
    architecture flags, the assembler would add an incorrect set of
    derived attributes for the file as a whole.  Instead of reflecting the
    command-line options it would reflect the flags from the last file in
    the function.  To address this I've also added a call to re-emit the
    flags from the asm_file_end callback so the assembler will be in the
    correct state when it finishes processing the intput.

    There's some slight churn to the testsuite as a consequence of this,
    because previously we had a hack to suppress emitting a .fpu directive
    for one specific case, but with the new order this is no-longer
    necessary.

    gcc/ChangeLog:

            PR target/101723
            * config/arm/arm-cpus.in (quirk_no_asmcpu): New feature bit.
            (ALL_QUIRKS): Add it.
            (generic-armv7-a): Add quirk to suppress writing .cpu directive in
            asm output.
            * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
            (arm_last_printed_arch_string): Delete.
            (arm_last-printed_fpu_string): Delete.
            (arm_configure_build_target): If use of floating-point/SIMD is
            disabled, remove all fp/simd related features from the target ISA.
            (last_arm_targ_options): New variable.
            (arm_print_asm_arch_directives): Add new parameters.  Change order
            of emitted directives and handle all cases here.
            (arm_file_start): Always call arm_print_asm_arch_directives, move
            all generation of .arch/.arch_extension here.
            (arm_file_end): Call arm_print_asm_arch.
            (arm_declare_function_name): Call arm_print_asm_arch_directives
            instead of printing .arch/.fpu directives directly.

    gcc/testsuite/ChangeLog:

            PR target/101723
            * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
            * gcc.target/arm/attr-neon2.c: Likewise.
            * gcc.target/arm/attr-neon3.c: Likewise.
            * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
            multiple instances.
            * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
            * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.

    (cherry picked from commit c1cdabe3aab817d95a8db00a8b5e9f6bcdea936f)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #12 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:14a21ac5b8cd79e973f7f6cfd534a80bf25a0328

commit r9-9691-g14a21ac5b8cd79e973f7f6cfd534a80bf25a0328
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Fri Aug 6 14:25:47 2021 +0000

    arm: Fix pr69245.c testcase for reorder assembler architecture directives
[PR101723]

    In gcc.target/arm/pr69245.c, to have a .fpu neon-vfpv4 directive, make
    sure code for fn1() is emitted, by removing the static keyword.

    Fix a typo in gcc.target/arm/pr69245.c, where \s should be \\s.

    2021-08-06  Christophe Lyon  <christophe.lyon@foss.st.com>

            gcc/testsuite/

            PR target/101723
            * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
            typo.

    (cherry picked from commit aff75af3b50f8c039ed6fbfa3f313ba45d44f6e6)

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |9.5
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #13 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Fixed on all active branches.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

Christophe Lyon <clyon at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |clyon at gcc dot gnu.org

--- Comment #14 from Christophe Lyon <clyon at gcc dot gnu.org> ---
I think you forgot to backport
r12-2790-ga22b3e022c2b45047a28d901042888eb77620499 to gcc-9 ?

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #15 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
(In reply to Christophe Lyon from comment #14)
> I think you forgot to backport
> r12-2790-ga22b3e022c2b45047a28d901042888eb77620499 to gcc-9 ?

I don't think so.  I think that patch collapsed away due to the way I ended up
resolving a merge conflict in an earlier patch.

Are you seeing any test errors due to this?

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

--- Comment #16 from Christophe Lyon <clyon at gcc dot gnu.org> ---
(In reply to Richard Earnshaw from comment #15)
> (In reply to Christophe Lyon from comment #14)
> > I think you forgot to backport
> > r12-2790-ga22b3e022c2b45047a28d901042888eb77620499 to gcc-9 ?
> 
> I don't think so.  I think that patch collapsed away due to the way I ended
> up resolving a merge conflict in an earlier patch.
> 
> Are you seeing any test errors due to this?

Ha, right, there's no check-function-bodies in gcc-9.

I'm seeing:
FAIL: gcc.target/arm/attr-neon3.c scan-assembler-times vld1 1
on armeb, but that was already the case before your backport to gcc-9, so it's
not related.

[Bug target/101723] arm: incorrect order of .fpu and .arch_extension directives leads to unsupported instructions

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101723

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ebiggers3 at gmail dot com

--- Comment #17 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
*** Bug 104439 has been marked as a duplicate of this bug. ***