* [Bug target/101882] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
@ 2021-08-12 15:27 ` segher at gcc dot gnu.org
2021-08-20 19:03 ` mpolacek at gcc dot gnu.org
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: segher at gcc dot gnu.org @ 2021-08-12 15:27 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2021-08-12
Assignee|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed. I'll take it.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
2021-08-12 15:27 ` [Bug target/101882] " segher at gcc dot gnu.org
@ 2021-08-20 19:03 ` mpolacek at gcc dot gnu.org
2021-08-20 21:04 ` segher at gcc dot gnu.org
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: mpolacek at gcc dot gnu.org @ 2021-08-20 19:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Marek Polacek <mpolacek at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
CC| |mpolacek at gcc dot gnu.org
--- Comment #2 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Assignee present -> ASSIGNED.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
2021-08-12 15:27 ` [Bug target/101882] " segher at gcc dot gnu.org
2021-08-20 19:03 ` mpolacek at gcc dot gnu.org
@ 2021-08-20 21:04 ` segher at gcc dot gnu.org
2021-08-23 11:17 ` [Bug target/101882] [9/10/11/12 Regression] " jakub at gcc dot gnu.org
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: segher at gcc dot gnu.org @ 2021-08-20 21:04 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
--- Comment #3 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Marek Polacek from comment #2)
> Assignee present -> ASSIGNED.
Hrm, this used to work automatically when you press "take"? What changed?
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [9/10/11/12 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (2 preceding siblings ...)
2021-08-20 21:04 ` segher at gcc dot gnu.org
@ 2021-08-23 11:17 ` jakub at gcc dot gnu.org
2021-08-23 16:13 ` segher at gcc dot gnu.org
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-08-23 11:17 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|modulus with input and |[9/10/11/12 Regression]
|output set to a hard |modulus with input and
|register |output set to a hard
| |register
CC| |jakub at gcc dot gnu.org
Target Milestone|--- |9.5
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Started with r9-3950-g2f0b80c7a4ab4254f57ba63de26ebb7896e3742d
Does the modsw instruction really need the early-clobber (i.e. does it first
overwrite the result register before reading the input registers)?
Though, even if it doesn't and this particular issue would be fixed by dropping
it, there can be other instructions that really do need the early-clobber.
Before the r9-3950 change, gcc would silently reload the input from r20 to some
other register to honor the early-clobber.
If that is a behavior that is fine for insns other than inline-asm, perhaps the
r9-3950 changes should be done only when reloading inline-asm and nothing else?
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [9/10/11/12 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (3 preceding siblings ...)
2021-08-23 11:17 ` [Bug target/101882] [9/10/11/12 Regression] " jakub at gcc dot gnu.org
@ 2021-08-23 16:13 ` segher at gcc dot gnu.org
2022-01-20 12:27 ` rguenth at gcc dot gnu.org
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: segher at gcc dot gnu.org @ 2021-08-23 16:13 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
--- Comment #5 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #4)
> Started with r9-3950-g2f0b80c7a4ab4254f57ba63de26ebb7896e3742d
> Does the modsw instruction really need the early-clobber (i.e. does it first
> overwrite the result register before reading the input registers)?
No. And I have a patch, but testing showed some (perhaps unrelated) problems
so it is delayed.
> Though, even if it doesn't and this particular issue would be fixed by
> dropping it, there can be other instructions that really do need the
> early-clobber.
The peephole won't match if an input and output reg are identical, that is
all. But the peephole very often does not match anyway.
So (in addition to removing the earlyclobber) I did a define_insn_and_split
instead of the peephole. That is much more reliable.
> Before the r9-3950 change, gcc would silently reload the input from r20 to
> some other register to honor the early-clobber.
> If that is a behavior that is fine for insns other than inline-asm, perhaps
> the
> r9-3950 changes should be done only when reloading inline-asm and nothing
> else?
The LRA change is correct AFAICS. But combine makes a change that violates
the earlyclobber... I need to do something about that, too.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [9/10/11/12 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (4 preceding siblings ...)
2021-08-23 16:13 ` segher at gcc dot gnu.org
@ 2022-01-20 12:27 ` rguenth at gcc dot gnu.org
2022-05-19 22:18 ` [Bug target/101882] [9/10/11/12/13 " bergner at gcc dot gnu.org
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2022-01-20 12:27 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P3 |P2
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [9/10/11/12/13 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (5 preceding siblings ...)
2022-01-20 12:27 ` rguenth at gcc dot gnu.org
@ 2022-05-19 22:18 ` bergner at gcc dot gnu.org
2022-05-27 9:46 ` [Bug target/101882] [10/11/12/13 " rguenth at gcc dot gnu.org
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: bergner at gcc dot gnu.org @ 2022-05-19 22:18 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
--- Comment #6 from Peter Bergner <bergner at gcc dot gnu.org> ---
Is there any new status on this? Fixed perhaps?
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [10/11/12/13 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (6 preceding siblings ...)
2022-05-19 22:18 ` [Bug target/101882] [9/10/11/12/13 " bergner at gcc dot gnu.org
@ 2022-05-27 9:46 ` rguenth at gcc dot gnu.org
2022-06-28 10:45 ` jakub at gcc dot gnu.org
2023-07-07 10:40 ` [Bug target/101882] [11/12/13/14 " rguenth at gcc dot gnu.org
9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2022-05-27 9:46 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|9.5 |10.4
--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 9 branch is being closed
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [10/11/12/13 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (7 preceding siblings ...)
2022-05-27 9:46 ` [Bug target/101882] [10/11/12/13 " rguenth at gcc dot gnu.org
@ 2022-06-28 10:45 ` jakub at gcc dot gnu.org
2023-07-07 10:40 ` [Bug target/101882] [11/12/13/14 " rguenth at gcc dot gnu.org
9 siblings, 0 replies; 11+ messages in thread
From: jakub at gcc dot gnu.org @ 2022-06-28 10:45 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|10.4 |10.5
--- Comment #8 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 10.4 is being released, retargeting bugs to GCC 10.5.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Bug target/101882] [11/12/13/14 Regression] modulus with input and output set to a hard register
2021-08-12 15:20 [Bug target/101882] New: modulus with input and output set to a hard register willschm at gcc dot gnu.org
` (8 preceding siblings ...)
2022-06-28 10:45 ` jakub at gcc dot gnu.org
@ 2023-07-07 10:40 ` rguenth at gcc dot gnu.org
9 siblings, 0 replies; 11+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-07-07 10:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|10.5 |11.5
--- Comment #9 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 10 branch is being closed.
^ permalink raw reply [flat|nested] 11+ messages in thread