[Bug target/104375] New: [x86] Failure to recognize bzhi patter nwhen shr is present

[Bug target/104375] New: [x86] Failure to recognize bzhi patter nwhen shr is present

[gabravier at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

            Bug ID: 104375
           Summary: [x86] Failure to recognize bzhi patter nwhen shr is
                    present
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gabravier at gmail dot com
  Target Milestone: ---

#include <stdint.h>

uint64_t bextr_u64(uint64_t w, unsigned off, unsigned int len)
{
        return (w >> off) & ((1U << len) - 1U);
}

With -mbmi2, this can be optimized to using shrx followed by bzhi. This
transformation is done by LLVM, but not by GCC.


PS: Even in the case where the shr is removed and thus the bzhi pattern is
recognized (e.g. `return w & ((1U << len) - 1U);`), it is still not compiled
optimally as it for some reason decides to put the result of the bzhi in an
intermediary register before moving it to eax.

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
backend has 

16550(define_insn "*bmi2_bzhi_<mode>3_2"
16551  [(set (match_operand:SWI48 0 "register_operand" "=r")
16552        (and:SWI48
16553          (plus:SWI48
16554            (ashift:SWI48 (const_int 1)
16555                          (match_operand:QI 2 "register_operand" "r"))
16556            (const_int -1))
16557          (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
16558   (clobber (reg:CC FLAGS_REG))]
16559  "TARGET_BMI2"
16560  "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
16561  [(set_attr "type" "bitmanip")
16562   (set_attr "prefix" "vex")
16563   (set_attr "mode" "<MODE>")])


But there's extra zero_extend in pattern match.

315Failed to match this instruction:
316(parallel [
317        (set (reg:DI 90)
318            (zero_extend:DI (and:SI (plus:SI (reg:SI 91)
319                        (const_int -1 [0xffffffffffffffff]))
320                    (subreg:SI (reg:DI 95) 0))))
321        (clobber (reg:CC 17 flags))
322    ])

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:102237c9f2f2667eb73cb5473bd3a9a97296a414

commit r13-581-g102237c9f2f2667eb73cb5473bd3a9a97296a414
Author: liuhongt <hongtao.liu@intel.com>
Date:   Thu Apr 28 15:30:06 2022 +0800

    recognize bzhi pattern when there's zero_extendsidi.

    backend has

    16550(define_insn "*bmi2_bzhi_<mode>3_2"
    16551  [(set (match_operand:SWI48 0 "register_operand" "=r")
    16552        (and:SWI48
    16553          (plus:SWI48
    16554            (ashift:SWI48 (const_int 1)
    16555                          (match_operand:QI 2 "register_operand" "r"))
    16556            (const_int -1))
    16557          (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
    16558   (clobber (reg:CC FLAGS_REG))]
    16559  "TARGET_BMI2"
    16560  "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
    16561  [(set_attr "type" "bitmanip")
    16562   (set_attr "prefix" "vex")
    16563   (set_attr "mode" "<MODE>")])

    But there's extra zero_extend in pattern match.

    424Failed to match this instruction:
    425(parallel [
    426        (set (reg:DI 90)
    427            (zero_extend:DI (and:SI (plus:SI (ashift:SI (const_int 1
[0x1])
    428                            (subreg:QI (reg:SI 98) 0))
    429                        (const_int -1 [0xffffffffffffffff]))
    430                    (subreg:SI (reg:DI 95) 0))))
    431        (clobber (reg:CC 17 flags))
    432    ])

    Add new define_insn for it.

    gcc/ChangeLog:

            PR target/104375
            * config/i386/i386.md (*bmi2_bzhi_zero_extendsidi_4): New
            define_insn.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr104375.c: New test.

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

--- Comment #3 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed in GCC13.

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[gabravier at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

--- Comment #4 from Gabriel Ravier <gabravier at gmail dot com> ---
So should the bug be marked as fixed or... ?

[Bug target/104375] [x86] Failure to recognize bzhi pattern when shr is present

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104375

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED
   Target Milestone|---                         |13.0

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
.