[Bug target/106532] New: riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[Bug target/106532] New: riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

            Bug ID: 106532
           Summary: riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by
                    default for 32bit
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Keywords: build, ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: pinskia at gcc dot gnu.org
  Target Milestone: ---
            Target: riscv32-*-elf

Error message:
../../../src/libgcc/soft-fp/muldf3.c: In function ‘__muldf3’:
../../../src/libgcc/soft-fp/muldf3.c:51:1: error: unrecognizable insn:
   51 | }
      | ^
(insn 430 429 431 29 (set (reg:SI 332)
        (const_int 2048 [0x800])) "../../../src/libgcc/soft-fp/muldf3.c":46:3
-1
     (expr_list:REG_EQUAL (const_int 2048 [0x800])
        (nil)))
during RTL pass: vregs
../../../src/libgcc/soft-fp/muldf3.c:51:1: internal compiler error: in
extract_insn, at recog.cc:2791
# If this is the top-level multilib, build all the other

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |blocker
           Assignee|unassigned at gcc dot gnu.org      |pinskia at gcc dot gnu.org

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Mine, will debug in a few minutes.

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Created attachment 53414
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=53414&action=edit
testcase from -freport-bug

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Note with a non-modified sources fails with -O2 -march=rv32imac_zba_zbb_zbc_zbs

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #4 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Shorter testcase (uninitialized variable is required for the reduced testcase;
I don't know why yet):
int g (long B_e)
{
        long A_e;
        if (A_e != 2047)
          A_e -= 1023;
        return A_e + 1;
}

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Even more reduced (this is why uninitialized variable was needed to form the
2048 :) ):
int g (void)
{
        return 2048;
}

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Oh why oh why:
  /* Check whether the constant can be loaded in a single
     instruction with zbs extensions.  */
  if (TARGET_64BIT && TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op)))
    return false;


But:
  if (TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (value))
    {
      /* Simply BSETI.  */
      codes[0].code = UNKNOWN;
      codes[0].value = value;

      /* RISC-V sign-extends all 32bit values that live in a 32bit
         register.  To avoid paradoxes, we thus need to use the
         sign-extended (negative) representation (-1 << 31) for the
         value, if we want to build (1 << 31) in SImode.  This will
         then expand to an LUI instruction.  */
      if (mode == SImode && value == (HOST_WIDE_INT_1U << 31))
        codes[0].value = (HOST_WIDE_INT_M1U << 31);

      return 1;
    }

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So this has been broken since ZBS support was added in r12-4658-g4e1e0d79ecbe87
.
Removing TARGET_64BIT from the check in splittable_const_int_operand fixes this
testcase but I have not done any more testing.

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED
   Target Milestone|---                         |13.0

--- Comment #8 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Fixed for GCC 13 r13-1970-gffe4f55aa1bb18cc2793a4335450f34c33c9d01c

If someone wants to backport it for GCC 12. Be my guest.

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

Kito Cheng <kito at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |kito at gcc dot gnu.org

--- Comment #9 from Kito Cheng <kito at gcc dot gnu.org> ---
HI Andrew:

That's would be great if you can back port to GCC 12 branch, and thanks for
your quick fix :)

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |iwfinlay at gmail dot com

--- Comment #10 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
*** Bug 108284 has been marked as a duplicate of this bug. ***

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |david_harris at hmc dot edu

--- Comment #11 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
*** Bug 109687 has been marked as a duplicate of this bug. ***

[Bug target/106532] riscv fails to build enabling ZBA/ZBB/ZBC/ZBS by default for 32bit

[david_harris at hmc dot edu]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106532

--- Comment #12 from David Harris <david_harris at hmc dot edu> ---
Thank you for the speedy discovery and resolution.