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From: "jiawei at iscas dot ac.cn" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/108185] [RISC-V]RVV assemble not set vsetvli correct. Date: Tue, 03 Jan 2023 01:54:05 +0000 [thread overview] Message-ID: <bug-108185-4-ep1WRhuJ2l@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-108185-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108185 --- Comment #3 from jiawei <jiawei at iscas dot ac.cn> --- (In reply to Kito Cheng from comment #2) > It seems right to me? Yes, It have the same behavior with clang, but it could generate better assemble code like: vl1re8.v v24,0(a0) addi a4,a1,800 vs1r.v v24,0(a1) vsetvli a5,zero,e8,m1,ta,ma vlm v24,0(a0) vsm v24,0(a4) ret > > > ``` > $ riscv64-unknown-elf-gcc pr108185.c -march=rv64gcv -mabi=lp64d -O3 -S -o > - > .file "pr108185.c" > .option nopic > .attribute arch, > "rv64i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_v1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1 > p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" > .attribute unaligned_access, 0 > .attribute stack_align, 16 > .text > .align 1 > .globl foo5_3 > .type foo5_3, @function > foo5_3: > csrr t0,vlenb > slli t1,t0,1 > csrr a5,vlenb > sub sp,sp,t1 > slli a3,a5,1 > add a3,a3,sp > vl1re8.v v25,0(a0) # Load value from *(vint8m1_t*)in > sub a5,a3,a5 > vs1r.v v25,0(a1) # Store value to *(vint8m1_t*)out > vs1r.v v25,0(a5) # Store value to stack, although it's > unused. > addi a4,a1,800 > csrr t0,vlenb > slli t1,t0,1 > vsetvli a5,zero,e8,m1,ta,ma # Right vsetvli for vsm.v > vsm.v v25,0(a4) > add sp,sp,t1 > jr ra > .size foo5_3, .-foo5_3 > .ident "GCC: (g44b22ab81cf) 13.0.0 20221229 (experimental)" > ```
next prev parent reply other threads:[~2023-01-03 1:54 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-20 3:55 [Bug target/108185] New: " jiawei at iscas dot ac.cn 2022-12-20 3:58 ` [Bug target/108185] " jiawei at iscas dot ac.cn 2022-12-29 9:51 ` kito at gcc dot gnu.org 2023-01-03 1:54 ` jiawei at iscas dot ac.cn [this message] 2023-01-03 2:32 ` [Bug target/108185] [RISC-V] Sub-optimal code-gen for vsetvli: redundant stack store kito at gcc dot gnu.org 2023-02-03 3:05 ` juzhe.zhong at rivai dot ai 2023-03-07 13:45 ` cvs-commit at gcc dot gnu.org 2023-03-08 1:11 ` kito at gcc dot gnu.org 2023-03-23 8:40 ` cvs-commit at gcc dot gnu.org
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