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* [Bug target/109079] New: Missing optimization for x86 avx intrinsic _mm256_zeroall().
@ 2023-03-09 10:26 dorazzsoft at gmail dot com
2023-03-09 12:37 ` [Bug target/109079] " rguenth at gcc dot gnu.org
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: dorazzsoft at gmail dot com @ 2023-03-09 10:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109079
Bug ID: 109079
Summary: Missing optimization for x86 avx intrinsic
_mm256_zeroall().
Product: gcc
Version: 12.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: dorazzsoft at gmail dot com
Target Milestone: ---
Here is a simple code: https://godbolt.org/z/q9o5rf4dM
#include <immintrin.h>
void fn(float *out) {
_mm256_zeroall();
register __m256 r0;
r0 = _mm256_setzero_ps();
_mm256_storeu_ps(out, r0);
}
which is compiled into
fn:
vzeroall
vxorps xmm0, xmm0, xmm0
vmovups YMMWORD PTR [rdi], ymm0
vzeroupper
ret
There are both vzeroall and vxorps instructions in the code, but only one is
needed.
In my specific use case (matrix product), I want to initialize multiple
registers using vzeroall with _mm256_zeroall() to reduce code size and prevent
uninitialized variable warnings by setting all register variables as
_mm256_setzero_ps().
The missing optimization makes the leading _mm256_zeroall() instruction
useless.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/109079] Missing optimization for x86 avx intrinsic _mm256_zeroall().
2023-03-09 10:26 [Bug target/109079] New: Missing optimization for x86 avx intrinsic _mm256_zeroall() dorazzsoft at gmail dot com
@ 2023-03-09 12:37 ` rguenth at gcc dot gnu.org
2023-03-09 17:40 ` pinskia at gcc dot gnu.org
2023-03-09 22:20 ` [Bug rtl-optimization/109079] " ubizjak at gmail dot com
2 siblings, 0 replies; 4+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-03-09 12:37 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109079
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Keywords| |missed-optimization
Status|UNCONFIRMED |NEW
Target| |x86_64-*-*
Last reconfirmed| |2023-03-09
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
I think it wasn't intended to be used this way, but sure. Currently it's a
black-box in the target I think and so nothing sees the redundancy.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug target/109079] Missing optimization for x86 avx intrinsic _mm256_zeroall().
2023-03-09 10:26 [Bug target/109079] New: Missing optimization for x86 avx intrinsic _mm256_zeroall() dorazzsoft at gmail dot com
2023-03-09 12:37 ` [Bug target/109079] " rguenth at gcc dot gnu.org
@ 2023-03-09 17:40 ` pinskia at gcc dot gnu.org
2023-03-09 22:20 ` [Bug rtl-optimization/109079] " ubizjak at gmail dot com
2 siblings, 0 replies; 4+ messages in thread
From: pinskia at gcc dot gnu.org @ 2023-03-09 17:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109079
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Severity|normal |enhancement
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug rtl-optimization/109079] Missing optimization for x86 avx intrinsic _mm256_zeroall().
2023-03-09 10:26 [Bug target/109079] New: Missing optimization for x86 avx intrinsic _mm256_zeroall() dorazzsoft at gmail dot com
2023-03-09 12:37 ` [Bug target/109079] " rguenth at gcc dot gnu.org
2023-03-09 17:40 ` pinskia at gcc dot gnu.org
@ 2023-03-09 22:20 ` ubizjak at gmail dot com
2 siblings, 0 replies; 4+ messages in thread
From: ubizjak at gmail dot com @ 2023-03-09 22:20 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109079
Uroš Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|target |rtl-optimization
--- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Richard Biener from comment #1)
> I think it wasn't intended to be used this way, but sure. Currently it's a
> black-box in the target I think and so nothing sees the redundancy.
_mm256_zeroall is emitted as:
(insn 6 3 7 2 (parallel [
(unspec_volatile [
(const_int 0 [0])
] UNSPECV_VZEROALL)
(set (reg:V8SI 20 xmm0)
(const_vector:V8SI [
(const_int 0 [0]) repeated x8
]))
(set (reg:V8SI 21 xmm1)
(const_vector:V8SI [
(const_int 0 [0]) repeated x8
]))
...
(set (reg:V8SI 51 xmm15)
(const_vector:V8SI [
(const_int 0 [0]) repeated x8
]))
])
and _mm256_setzero_ps as:
(insn 7 6 8 2 (set (reg:V8SF 83)
(const_vector:V8SF [
(const_double:SF 0.0 [0x0.0p+0]) repeated x8
]))
There is mode mismatch between (insn 6) and (insn 7) so postreload CSE is not
able to eliminate (insn 7).
Using the following patch^w hack that changes the mode of vzeroall registers:
--cut here--
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index b4d9ab40ab9..cf15ca8f611 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1737,9 +1737,9 @@ (define_predicate "vzeroall_operation"
if (GET_CODE (elt) != SET
|| GET_CODE (SET_DEST (elt)) != REG
- || GET_MODE (SET_DEST (elt)) != V8SImode
+ || GET_MODE (SET_DEST (elt)) != V8SFmode
|| REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i)
- || SET_SRC (elt) != CONST0_RTX (V8SImode))
+ || SET_SRC (elt) != CONST0_RTX (V8SFmode))
return false;
}
return true;
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 172ec3bea4f..81e02086606 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -25244,8 +25244,8 @@ (define_expand "avx_vzeroall"
for (regno = 0; regno < nregs; regno++)
XVECEXP (operands[0], 0, regno + 1)
- = gen_rtx_SET (gen_rtx_REG (V8SImode, GET_SSE_REGNO (regno)),
- CONST0_RTX (V8SImode));
+ = gen_rtx_SET (gen_rtx_REG (V8SFmode, GET_SSE_REGNO (regno)),
+ CONST0_RTX (V8SFmode));
})
(define_insn "*avx_vzeroall"
--cut here--
the compiler is able to eliminate (insn 7) in postreload pass, producing:
fn:
vzeroall
vmovups %ymm0, (%rdi)
vzeroupper
ret
It looks to me that postreload CSE should be taught about the equivalence of
vector modes - a V8SFmode zero has the same bit representation as V8SImode zero
(and V4DImode, ...), as long as the mode size is the same.
Recategorizing as rtl-optimization.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-03-09 22:20 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-09 10:26 [Bug target/109079] New: Missing optimization for x86 avx intrinsic _mm256_zeroall() dorazzsoft at gmail dot com
2023-03-09 12:37 ` [Bug target/109079] " rguenth at gcc dot gnu.org
2023-03-09 17:40 ` pinskia at gcc dot gnu.org
2023-03-09 22:20 ` [Bug rtl-optimization/109079] " ubizjak at gmail dot com
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