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* [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load
@ 2020-11-06 21:07 wilson at gcc dot gnu.org
2022-02-04 21:17 ` [Bug tree-optimization/97747] [9/10/11/12 Regression] " pinskia at gcc dot gnu.org
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: wilson at gcc dot gnu.org @ 2020-11-06 21:07 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Bug ID: 97747
Summary: missed combine opt with logical ops after zero
extended load
Product: gcc
Version: 10.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: wilson at gcc dot gnu.org
Target Milestone: ---
Consider this testcase
struct
{
unsigned int a : 1;
unsigned int b : 1;
unsigned int c : 1;
unsigned int d : 1;
unsigned int pad1 : 28;
} s;
void
sub (void)
{
s.a = 1;
s.c = 1;
}
Compiling with -O2 -S for ARM I get
sub:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
movw r2, #:lower16:.LANCHOR0
movt r2, #:upper16:.LANCHOR0
ldrb r3, [r2] @ zero_extendqisi2
bic r3, r3, #5
orr r3, r3, #5
strb r3, [r2]
bx lr
The bic bit-clear instruction is obviously unnecessary.
In the combine dump file I see that we have
(insn 9 7 11 2 (set (reg:SI 120)
(and:SI (reg:SI 119 [ MEM <unsigned char> [(struct *)&sD.5619] ])
(const_int -6 [0xfffffffffffffffa]))) "tmp.c":13:7 90
{*arm_andsi3_insn}
(expr_list:REG_DEAD (reg:SI 119 [ MEM <unsigned char> [(struct
*)&sD.5619] ])
(nil)))
(insn 11 9 13 2 (set (reg:SI 122)
(ior:SI (reg:SI 120)
(const_int 5 [0x5]))) "tmp.c":13:7 106 {*iorsi3_insn}
(expr_list:REG_DEAD (reg:SI 120)
(nil)))
And the combiner does:
Trying 9 -> 11:
9: r120:SI=r119:SI&0xfffffffffffffffa
REG_DEAD r119:SI
11: r122:SI=r120:SI|0x5
REG_DEAD r120:SI
Failed to match this instruction:
(set (reg:SI 122)
(ior:SI (and:SI (reg:SI 119 [ MEM <unsigned char> [(struct *)&sD.5619] ])
(const_int 250 [0xfa]))
(const_int 5 [0x5])))
The problem here is that the ARM port generated a zero_extend for the load
byte, so combine knows that r120 has only 8 nonzero bits, it modified the -6 to
250 and then fails to notice that the and operation can be folded away because
in SImode the operation is no longer redundant with the modified constant.
On targets that do not generate the zero_extend, the and -6 operation gets
optimized away in combine. For instance, with the current RISC-V port I get
sub:
lui a4,%hi(s)
lbu a5,%lo(s)(a4)
ori a5,a5,5
sb a5,%lo(s)(a4)
ret
This likely fails on any target where movqi generates a zero extended load.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug tree-optimization/97747] [9/10/11/12 Regression] missed combine opt with logical ops after zero extended load
2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
@ 2022-02-04 21:17 ` pinskia at gcc dot gnu.org
2022-02-04 21:18 ` pinskia at gcc dot gnu.org
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: pinskia at gcc dot gnu.org @ 2022-02-04 21:17 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Last reconfirmed| |2022-02-04
Ever confirmed|0 |1
Known to fail| |8.2.0
Summary|missed combine opt with |[9/10/11/12 Regression]
|logical ops after zero |missed combine opt with
|extended load |logical ops after zero
| |extended load
Known to work| |7.5.0
Status|UNCONFIRMED |ASSIGNED
Component|rtl-optimization |tree-optimization
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Mine for GCC 13, bitfield lowering.
Note the store merging pass also messes up and creates:
_5 = _4 & 250;
_6 = _5 | 5;
Which can be optimized to just:
_6 = _4 | 5;
I might look at store merging first.
Note I think this might be a regression in code generation (store merging
caused the regressions).
GCC 7.5.0 produced:
ldr r2, .L3
ldrb r3, [r2] @ zero_extendqisi2
orr r3, r3, #5
strb r3, [r2]
bx lr
While GCC 8.2.0 produced:
ldr r2, .L3
ldrb r3, [r2] @ zero_extendqisi2
bic r3, r3, #5
orr r3, r3, #5
strb r3, [r2]
bx lr
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug tree-optimization/97747] [9/10/11/12 Regression] missed combine opt with logical ops after zero extended load
2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
2022-02-04 21:17 ` [Bug tree-optimization/97747] [9/10/11/12 Regression] " pinskia at gcc dot gnu.org
@ 2022-02-04 21:18 ` pinskia at gcc dot gnu.org
2022-10-19 9:23 ` [Bug tree-optimization/97747] [10/11/12/13 " rguenth at gcc dot gnu.org
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: pinskia at gcc dot gnu.org @ 2022-02-04 21:18 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |13.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug tree-optimization/97747] [10/11/12/13 Regression] missed combine opt with logical ops after zero extended load
2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
2022-02-04 21:17 ` [Bug tree-optimization/97747] [9/10/11/12 Regression] " pinskia at gcc dot gnu.org
2022-02-04 21:18 ` pinskia at gcc dot gnu.org
@ 2022-10-19 9:23 ` rguenth at gcc dot gnu.org
2023-04-26 6:55 ` [Bug tree-optimization/97747] [10/11/12/13/14 " rguenth at gcc dot gnu.org
2023-07-27 9:22 ` [Bug tree-optimization/97747] [11/12/13/14 " rguenth at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: rguenth at gcc dot gnu.org @ 2022-10-19 9:23 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P3 |P2
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug tree-optimization/97747] [10/11/12/13/14 Regression] missed combine opt with logical ops after zero extended load
2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
` (2 preceding siblings ...)
2022-10-19 9:23 ` [Bug tree-optimization/97747] [10/11/12/13 " rguenth at gcc dot gnu.org
@ 2023-04-26 6:55 ` rguenth at gcc dot gnu.org
2023-07-27 9:22 ` [Bug tree-optimization/97747] [11/12/13/14 " rguenth at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-04-26 6:55 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|13.0 |13.2
--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 13.1 is being released, retargeting bugs to GCC 13.2.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug tree-optimization/97747] [11/12/13/14 Regression] missed combine opt with logical ops after zero extended load
2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
` (3 preceding siblings ...)
2023-04-26 6:55 ` [Bug tree-optimization/97747] [10/11/12/13/14 " rguenth at gcc dot gnu.org
@ 2023-07-27 9:22 ` rguenth at gcc dot gnu.org
4 siblings, 0 replies; 6+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-07-27 9:22 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97747
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|13.2 |13.3
--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 13.2 is being released, retargeting bugs to GCC 13.3.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-07-27 9:22 UTC | newest]
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2020-11-06 21:07 [Bug rtl-optimization/97747] New: missed combine opt with logical ops after zero extended load wilson at gcc dot gnu.org
2022-02-04 21:17 ` [Bug tree-optimization/97747] [9/10/11/12 Regression] " pinskia at gcc dot gnu.org
2022-02-04 21:18 ` pinskia at gcc dot gnu.org
2022-10-19 9:23 ` [Bug tree-optimization/97747] [10/11/12/13 " rguenth at gcc dot gnu.org
2023-04-26 6:55 ` [Bug tree-optimization/97747] [10/11/12/13/14 " rguenth at gcc dot gnu.org
2023-07-27 9:22 ` [Bug tree-optimization/97747] [11/12/13/14 " rguenth at gcc dot gnu.org
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