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* [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'
@ 2021-03-30 4:25 asolokha at gmx dot com
2021-03-30 7:48 ` [Bug target/99822] [11 Regression] " ktkachov at gcc dot gnu.org
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: asolokha at gmx dot com @ 2021-03-30 4:25 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822
Bug ID: 99822
Summary: Assembler messages: Error: integer register expected
in the extended/shifted operand register at operand 3
-- `adds x1,xzr,#2'
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Keywords: assemble-failure
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: asolokha at gmx dot com
Target Milestone: ---
Target: aarch64-linux-gnu
GNU as 2.35.2 fails to assemble output of gcc-11.0.1-alpha20210328 snapshot
(g:499fa254ae8c9752d8c2cf3130b13ffddfd83546) generated w/ -O1 for the following
testcase:
int zt, bm, p5 = 1;
void __attribute__ ((cold))
l2 (unsigned long int hz)
{
__int128 d9 = 0;
unsigned long int *mg = hz ? &hz : (unsigned long int *) &d9;
while (d9 < 1)
{
bm = bm > d9;
bm = bm == (d9 = bm || hz);
hz = 0x197000000;
d9 = hz * hz;
while (p5 < 1)
{
bm = ((hz = 3) ? zt : 0) > 0x1001;
if (bm != 0)
{
__int128 *nd = (__int128 *) bm;
*nd /= 3;
}
*mg = 0x1001;
p5 -= *mg;
}
for (zt = 0; zt >= 0; zt += 2)
d9 = 0;
d9 += 2;
}
}
% aarch64-linux-gnu-gcc-11.0.1 -O1 -w -c drr4usrh.c
/tmp/ccu8CYtI.s: Assembler messages:
/tmp/ccu8CYtI.s:109: Error: integer register expected in the extended/shifted
operand register at operand 3 -- `adds x1,xzr,#2'
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'
2021-03-30 4:25 [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2' asolokha at gmx dot com
@ 2021-03-30 7:48 ` ktkachov at gcc dot gnu.org
2021-03-30 8:09 ` ktkachov at gcc dot gnu.org
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2021-03-30 7:48 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Known to work| |10.2.1
Known to fail| |11.0
Summary|Assembler messages: Error: |[11 Regression] Assembler
|integer register expected |messages: Error: integer
|in the extended/shifted |register expected in the
|operand register at operand |extended/shifted operand
|3 -- `adds x1,xzr,#2' |register at operand 3 --
| |`adds x1,xzr,#2'
Priority|P3 |P1
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
CC| |ktkachov at gcc dot gnu.org
Last reconfirmed| |2021-03-30
Target Milestone|--- |11.0
--- Comment #1 from ktkachov at gcc dot gnu.org ---
Confirmed.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'
2021-03-30 4:25 [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2' asolokha at gmx dot com
2021-03-30 7:48 ` [Bug target/99822] [11 Regression] " ktkachov at gcc dot gnu.org
@ 2021-03-30 8:09 ` ktkachov at gcc dot gnu.org
2021-03-30 14:44 ` cvs-commit at gcc dot gnu.org
2021-03-30 14:45 ` ktkachov at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2021-03-30 8:09 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot gnu.org
--- Comment #2 from ktkachov at gcc dot gnu.org ---
I'll take it.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'
2021-03-30 4:25 [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2' asolokha at gmx dot com
2021-03-30 7:48 ` [Bug target/99822] [11 Regression] " ktkachov at gcc dot gnu.org
2021-03-30 8:09 ` ktkachov at gcc dot gnu.org
@ 2021-03-30 14:44 ` cvs-commit at gcc dot gnu.org
2021-03-30 14:45 ` ktkachov at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2021-03-30 14:44 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822
--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkachov@gcc.gnu.org>:
https://gcc.gnu.org/g:19199a6f2b0f4ce4b100856c78706d56a16b1956
commit r11-7912-g19199a6f2b0f4ce4b100856c78706d56a16b1956
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Tue Mar 30 15:43:36 2021 +0100
aarch64: PR target/99822 Don't allow zero register in first operand of
SUBS/ADDS-immediate
In this PR we end up generating an invalid instruction:
adds x1,xzr,#2
because the pattern accepts zero as an operand in the comparison, but the
instruction doesn't.
Fix it by adjusting the predicate and constraints.
gcc/ChangeLog:
PR target/99822
* config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow
zero
in operand 1.
gcc/testsuite/ChangeLog:
PR target/99822
* gcc.c-torture/compile/pr99822.c: New test.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99822] [11 Regression] Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2'
2021-03-30 4:25 [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2' asolokha at gmx dot com
` (2 preceding siblings ...)
2021-03-30 14:44 ` cvs-commit at gcc dot gnu.org
@ 2021-03-30 14:45 ` ktkachov at gcc dot gnu.org
3 siblings, 0 replies; 5+ messages in thread
From: ktkachov at gcc dot gnu.org @ 2021-03-30 14:45 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99822
ktkachov at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |RESOLVED
Resolution|--- |FIXED
--- Comment #4 from ktkachov at gcc dot gnu.org ---
Fixed.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-03-30 4:25 [Bug target/99822] New: Assembler messages: Error: integer register expected in the extended/shifted operand register at operand 3 -- `adds x1,xzr,#2' asolokha at gmx dot com
2021-03-30 7:48 ` [Bug target/99822] [11 Regression] " ktkachov at gcc dot gnu.org
2021-03-30 8:09 ` ktkachov at gcc dot gnu.org
2021-03-30 14:44 ` cvs-commit at gcc dot gnu.org
2021-03-30 14:45 ` ktkachov at gcc dot gnu.org
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