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* [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p
@ 2022-01-12  8:27 Christophe Lyon
  0 siblings, 0 replies; 5+ messages in thread
From: Christophe Lyon @ 2022-01-12  8:27 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:0bc3de9e0f32880b94ac3fa405f8aff5f6e8244e

commit 0bc3de9e0f32880b94ac3fa405f8aff5f6e8244e
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Wed Oct 13 09:16:14 2021 +0000

    arm: Add support for VPR_REG in arm_class_likely_spilled_p
    
    VPR_REG is the only register in its class, so it should be handled by
    TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling
    default_class_likely_spilled_p.  No test fails without this patch, but
    it seems it should be implemented.
    
    2021-10-13  Christophe Lyon  <christophe.lyon@foss.st.com>
    
            gcc/
            * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.

Diff:
---
 gcc/config/arm/arm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index fa17bdb50d4..00077915444 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29317,7 +29317,7 @@ arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
 
-  return false;
+  return default_class_likely_spilled_p (rclass);
 }
 
 /* Implements target hook small_register_classes_for_mode_p.  */


^ permalink raw reply	[flat|nested] 5+ messages in thread
* [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p
@ 2022-02-22  9:07 Christophe Lyon
  0 siblings, 0 replies; 5+ messages in thread
From: Christophe Lyon @ 2022-02-22  9:07 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:4dac0db14034f334e586c401ddf5af49166dbade

commit 4dac0db14034f334e586c401ddf5af49166dbade
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Wed Oct 13 09:16:14 2021 +0000

    arm: Add support for VPR_REG in arm_class_likely_spilled_p
    
    VPR_REG is the only register in its class, so it should be handled by
    TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling
    default_class_likely_spilled_p.  No test fails without this patch, but
    it seems it should be implemented.
    
    2022-01-13  Christophe Lyon  <christophe.lyon@foss.st.com>
    
            gcc/
            * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.

Diff:
---
 gcc/config/arm/arm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index c3559ca8703..64a8f2dc7de 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29317,7 +29317,7 @@ arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
 
-  return false;
+  return default_class_likely_spilled_p (rclass);
 }
 
 /* Implements target hook small_register_classes_for_mode_p.  */


^ permalink raw reply	[flat|nested] 5+ messages in thread
* [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p
@ 2021-11-16 14:06 Christophe Lyon
  0 siblings, 0 replies; 5+ messages in thread
From: Christophe Lyon @ 2021-11-16 14:06 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:46e8cb239eaa70f1b0d1ec3e171cf026c9b1c597

commit 46e8cb239eaa70f1b0d1ec3e171cf026c9b1c597
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Wed Oct 13 09:16:14 2021 +0000

    arm: Add support for VPR_REG in arm_class_likely_spilled_p
    
    VPR_REG is the only register in its class, so it should be handled by
    TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling
    default_class_likely_spilled_p.  No test fails without this patch, but
    it seems it should be implemented.
    
    2021-10-13  Christophe Lyon  <christophe.lyon@foss.st.com>
    
            gcc/
            * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.

Diff:
---
 gcc/config/arm/arm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11dafc70067..9f52a152444 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29307,7 +29307,7 @@ arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
 
-  return false;
+  return default_class_likely_spilled_p (rclass);
 }
 
 /* Implements target hook small_register_classes_for_mode_p.  */


^ permalink raw reply	[flat|nested] 5+ messages in thread
* [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p
@ 2021-10-01 14:37 Christophe Lyon
  0 siblings, 0 replies; 5+ messages in thread
From: Christophe Lyon @ 2021-10-01 14:37 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:ab3ab19f86dd32943db260cd3566934f36a42a9a

commit ab3ab19f86dd32943db260cd3566934f36a42a9a
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Wed Sep 1 09:59:56 2021 +0000

    arm: Add support for VPR_REG in arm_class_likely_spilled_p
    
    VPR_REG is the only register in its class, so it should be handled by
    TARGET_CLASS_LIKELY_SPILLED_P.  No test fails without this patch, but
    it seems it should be implemented.
    
    2021-09-01  Christophe Lyon  <christophe.lyon@foss.st.com>
    
            gcc/
            * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.

Diff:
---
 gcc/config/arm/arm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11dafc70067..1222cb0d0fe 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29307,6 +29307,9 @@ arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
 
+  if (TARGET_HAVE_MVE && (rclass == VPR_REG))
+    return true;
+
   return false;
 }


^ permalink raw reply	[flat|nested] 5+ messages in thread
* [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p
@ 2021-09-29  7:30 Christophe Lyon
  0 siblings, 0 replies; 5+ messages in thread
From: Christophe Lyon @ 2021-09-29  7:30 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:cfc54488a90a0c9485419af0ddfe09d9b07e765a

commit cfc54488a90a0c9485419af0ddfe09d9b07e765a
Author: Christophe Lyon <christophe.lyon@foss.st.com>
Date:   Wed Sep 1 09:59:56 2021 +0000

    arm: Add support for VPR_REG in arm_class_likely_spilled_p
    
    VPR_REG is the only register in its class, so it should be handled by
    TARGET_CLASS_LIKELY_SPILLED_P.  No test fails without this patch, but
    it seems it should be implemented.
    
    2021-09-01  Christophe Lyon  <christophe.lyon@foss.st.com>
    
            gcc/
            * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.

Diff:
---
 gcc/config/arm/arm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11dafc70067..1222cb0d0fe 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29307,6 +29307,9 @@ arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
 
+  if (TARGET_HAVE_MVE && (rclass == VPR_REG))
+    return true;
+
   return false;
 }


^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-02-22  9:07 UTC | newest]

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