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* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-01 6:33 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-01 6:33 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a0b928c193dbf6447600056fa8f540baa077b574
commit a0b928c193dbf6447600056fa8f540baa077b574
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 1 02:32:55 2022 -0400
Revert patch.
2022-06-30 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 26 +++++++-------------------
gcc/config/rs6000/rs6000-c.cc | 10 ++++------
gcc/config/rs6000/rs6000-overload.def | 12 +++---------
3 files changed, 14 insertions(+), 34 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 277d9e2f159..e96b89c449b 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,21 +2902,19 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
- VSEEQP_KF xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
+ VSEEQP xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
- VSESQP_KF xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
+ VSESQP xsxsigqp_kf {}
-; Note we cannot overload this function since it does not have KFmode
-; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
- unsigned long long);
- VSIEQPF_KF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
+ unsigned long long);
+ VSIEQPF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2970,16 +2968,6 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
- const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
- VSEEQP_TF xsxexpqp_tf {ieeeld}
-
- const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
- VSESQP_TF xsxsigqp_tf {ieeeld}
-
- const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
- unsigned long long);
- VSIEQPF_TF xsiexpqpf_tf {}
-
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index b9d3aa06e40..155233bfbcc 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,13 +1939,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant that
- expects _Float128 argument (or long double if long doubles are
- IEEE 128-bit). Otherwise, expect __int128 argument. */
+ /* If first argument is of float variety, choose variant
+ that expects __ieee128 argument. Otherwise, expect
+ __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = ((arg1_mode == TFmode)
- ? RS6000_BIF_VSIEQPF_TF
- : RS6000_BIF_VSIEQPF_KF);
+ instance_code = RS6000_BIF_VSIEQPF;
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 546883ece19..511a3821d5b 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,17 +4506,13 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP_KF
- unsigned int __builtin_vec_scalar_extract_exp (long double);
- VSEEQP_TF
+ VSEEQP
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP_KF
- unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
- VSESQP_TF
+ VSESQP
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4526,9 +4522,7 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF_KF
- long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
- VSIEQPF_TF
+ VSIEQPF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-08 20:41 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-08 20:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:27c92a6bba11374111d502ce91eede523cac3d05
commit 27c92a6bba11374111d502ce91eede523cac3d05
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 8 16:40:59 2022 -0400
Revert patch.
2022-07-08 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs600.cc (create_complex_muldiv_inner): New
function.
(create_complex_muldiv): Rewrite function to handle both multiply
and divide. Set the decl assembler name to change the name to the
external function.
* ChangeLog.meissner: Update.
gcc/testsuite/
Revert patch.
* gcc.target/powerpc/mulkc3-2.c: Revert patch #7.
* gcc.target/powerpc/divkc3-2.c: Likewise.
libgcc/
Revert patch.
* config/rs6000/float128-ifunc.c: Revert patch #7.
* config/rs6000/quad-float128.h: Likewise.
Diff:
---
gcc/ChangeLog.meissner | 24 +----
gcc/config/rs6000/rs6000.cc | 160 +++++++++-------------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 ++
libgcc/config/rs6000/quad-float128.h | 5 +
6 files changed, 62 insertions(+), 137 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 1282fe3f334..7eb6a381596 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,26 +1,4 @@
-==================== work093, patch #15
-
-Rework setting 128-bit complex multiply and divide.
-
-2022-07-08 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs600.cc (create_complex_muldiv_inner): New
- function.
- (create_complex_muldiv): Rewrite function to handle both multiply
- and divide. Set the decl assembler name to change the name to the
- external function.
-
-gcc/testsuite/
-
- * gcc.target/powerpc/mulkc3-2.c: Revert patch #7.
- * gcc.target/powerpc/divkc3-2.c: Likewise.
-
-libgcc/
-
- * config/rs6000/float128-ifunc.c: Revert patch #7.
- * config/rs6000/quad-float128.h: Likewise.
+==================== work093, patch #15 (reverted)
==================== work093, patch #14
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 94cd4bb464e..541b4679907 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11031,6 +11031,26 @@ init_float128_ibm (machine_mode mode)
}
}
+/* Create a decl for either complex long double multiply or complex long double
+ divide when long double is IEEE 128-bit floating point. We can't use
+ __multc3 and __divtc3 because the original long double using IBM extended
+ double used those names. The complex multiply/divide functions are encoded
+ as builtin functions with a complex result and 4 scalar inputs. */
+
+static void
+create_complex_muldiv (const char *name, built_in_function fncode, tree fntype)
+{
+ tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
+ name, NULL_TREE);
+
+ set_builtin_decl (fncode, fndecl, true);
+
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "create complex %s, fncode: %d\n", name, (int) fncode);
+
+ return;
+}
+
/* Set up IEEE 128-bit floating point routines. Use different names if the
arguments can be passed in a vector register. The historical PowerPC
implementation of IEEE 128-bit floating point used _q_<op> for the names, so
@@ -11126,107 +11146,6 @@ init_float128_ieee (machine_mode mode)
}
}
-/* Create a decls for complex long double multiply and complex long double
- divide for the 128-bit floating point types.
-
- When long double is IEEE 128-bit floating point, we can't use __multc3 and
- __divtc3 because the original long double using IBM extended double used
- those names.
-
- Similarly for __ibm128, we want to use __multc3 and __divtc3.
-
- For these cases, we create a decl with a different name, and then set the
- ASM name so that we don't have to change libgcc to provide these extra
- names. We can't just use the same name because we will get an abort if a
- built-in function uses the same name.
-
- The complex multiply/divide functions are encoded as builtin functions with
- a complex result and 4 scalar inputs. */
-
-/* Inner function to create a single complex multiply or complex divide
- function with MUL_OR_DIV, LIB_MODE_NAME, ASM_MODE_NAME, FNCODE, and FNTYPE.
-
- MUL_OR_DIV is either "mul" or "div" depending on whether we are creating
- multiply or divide.
-
- LIB_MODE_NAME is "ic", "kc", or "tc" (i.e. the 2 letter lower case spelling
- for the complex type being created).
-
- ASM_MODE_NAME is "kc" or "tc" (i.e. the 2 letter lower case spelling that
- gives the function to be called).
-
- FNCODE is the function code of the multiply/divide built-in function.
-
- FNTYPE is the tree type node of the function. */
-
-static void
-create_complex_muldiv_inner (const char *mul_or_div,
- const char *lib_mode_name,
- const char *asm_mode_name,
- built_in_function fncode,
- tree fntype)
-{
- char *asm_name = ACONCAT (("__", mul_or_div, asm_mode_name, "3", NULL));
- char *name = ACONCAT (("__", mul_or_div, lib_mode_name, "3_", asm_mode_name,
- NULL));
-
- tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
- asm_name, NULL_TREE);
-
- set_builtin_decl (fncode, fndecl, true);
-
- if (TARGET_DEBUG_BUILTIN)
- fprintf (stderr, "create complex %s (%s), fncode: %d\n", name, asm_name,
- (int) fncode);
-
- return;
-}
-
-/* Create both complex multiply and complex divide for a given 128-bit floating
- point type with LIB_MODE_NAME, ASM_MODE_NAME, COMPLEX_MODE, and ARG_TYPE.
-
- LIB_MODE_NAME is "ic", "kc", or "tc" (i.e. the 2 letter lower case spelling
- for the complex type being created).
-
- ASM_MODE_NAME is "kc" or "tc" (i.e. the 2 letter lower case spelling that
- gives the function to be called).
-
- COMPLEX_MODE is the mode of the complex type (i.e. KCmode, ICmode, or
- TCmode).
-
- ARG_TYPE is the type of scalar 128-bit floating point type (i.e. the
- _Float128, __ibm128, or long double type nodes). */
-
-static void
-create_complex_muldiv (const char *lib_mode_name,
- const char *asm_mode_name,
- machine_mode complex_mode,
- tree arg_type)
-{
- tree complex_type = (arg_type == long_double_type_node
- ? complex_long_double_type_node
- : build_complex_type (arg_type));
- tree fntype = build_function_type_list (complex_type, arg_type, arg_type,
- arg_type, arg_type, NULL_TREE);
-
- /* Build complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("mul", lib_mode_name, asm_mode_name, mul_fncode,
- fntype);
-
- /* Build complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("div", lib_mode_name, asm_mode_name, div_fncode,
- fntype);
- return;
-}
-
static void
rs6000_init_libfuncs (void)
{
@@ -11249,27 +11168,44 @@ rs6000_init_libfuncs (void)
init_float128_ieee (TFmode);
}
- /* Set up to call the appropriate __mul{kc,tc}3 and __div{kc,tc}3 for the
- 128-bit floating point types, using kc3 for IEEE 128-bit and tc3 for IBM
- 128-bit. We only call this for the functions that don't use the default
- names.
+ /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
+ 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
+ both IEEE long double and for explicit _Float128/__float128) because
+ c_builtin_function will complain if we create two built-in functions with
+ the same name. Instead we use an alias name for the case when long double
+ uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
+ for this name.
We need to only execute this once. If we have clone or target attributes,
this will be called a second time. We need to create the built-in
function only once. */
static bool complex_muldiv_init_p = false;
- if (!complex_muldiv_init_p
- && (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128))
+ if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
+ && !complex_muldiv_init_p)
{
complex_muldiv_init_p = true;
- /* Create __ibm128 complex multiply divide. */
- create_complex_muldiv ("ic", "tc", ICmode, ibm128_float_type_node);
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ /* Create complex multiply. */
+ built_in_function mul_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
+
+ /* Create complex divide. */
+ built_in_function div_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
- if (TARGET_LONG_DOUBLE_128 && TARGET_IEEEQUAD)
- /* Create long double (IEEE 128-bit) complex multiply/divide. */
- create_complex_muldiv ("tc", "kc", TCmode, long_double_type_node);
+ create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
}
}
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index e34ed40bac2..0cfcea837ed 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divkc3" } } */
+/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index eee6de9e2a5..78ef1dc00f0 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __mulkc3" } } */
+/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 73cbca2fc9a..30d46bcb233 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,3 +359,9 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
+
+TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
+
+TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index ae0622c744c..a684d0e1bcf 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,6 +191,11 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
+/* Complex long double multiply/divide if long double uses the IEEE 128-bit
+ encoding. */
+extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-08 20:18 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-08 20:18 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:767468d9636f3def94db004d7e97d2fb626640e8
commit 767468d9636f3def94db004d7e97d2fb626640e8
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 8 16:17:47 2022 -0400
Revert patch.
2022-07-08 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs600.cc (create_complex_muldiv_inner): New
function.
(create_complex_muldiv): Rewrite function to handle both multiply
and divide. Set the decl assembler name to change the name to the
external function.
gcc/testsuite/
Revert patch.
* gcc.target/powerpc/mulkc3-2.c: Revert patch #7.
* gcc.target/powerpc/divkc3-2.c: Likewise.
libgcc/
Revert patch.
* config/rs6000/float128-ifunc.c: Revert patch #7.
* config/rs6000/quad-float128.h: Likewise.
Diff:
---
gcc/config/rs6000/rs6000.cc | 160 +++++++++-------------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 ++
libgcc/config/rs6000/quad-float128.h | 5 +
5 files changed, 61 insertions(+), 114 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index b482f5eee99..541b4679907 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11031,6 +11031,26 @@ init_float128_ibm (machine_mode mode)
}
}
+/* Create a decl for either complex long double multiply or complex long double
+ divide when long double is IEEE 128-bit floating point. We can't use
+ __multc3 and __divtc3 because the original long double using IBM extended
+ double used those names. The complex multiply/divide functions are encoded
+ as builtin functions with a complex result and 4 scalar inputs. */
+
+static void
+create_complex_muldiv (const char *name, built_in_function fncode, tree fntype)
+{
+ tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
+ name, NULL_TREE);
+
+ set_builtin_decl (fncode, fndecl, true);
+
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "create complex %s, fncode: %d\n", name, (int) fncode);
+
+ return;
+}
+
/* Set up IEEE 128-bit floating point routines. Use different names if the
arguments can be passed in a vector register. The historical PowerPC
implementation of IEEE 128-bit floating point used _q_<op> for the names, so
@@ -11126,107 +11146,6 @@ init_float128_ieee (machine_mode mode)
}
}
-/* Create a decls for complex long double multiply and complex long double
- divide for the 128-bit floating point types.
-
- When long double is IEEE 128-bit floating point, we can't use __multc3 and
- __divtc3 because the original long double using IBM extended double used
- those names.
-
- Similarly for __ibm128, we want to use __multc3 and __divtc3.
-
- For these cases, we create a decl with a different name, and then set the
- ASM name so that we don't have to change libgcc to provide these extra
- names. We can't just use the same name because we will get an abort if a
- built-in function uses the same name.
-
- The complex multiply/divide functions are encoded as builtin functions with
- a complex result and 4 scalar inputs. */
-
-/* Inner function to create a single complex multiply or complex divide
- function.
-
- Mul_or_div is either "mul" or "div" depending on whether we are creating
- multiply or divide.
-
- Lib_mode_name is "ic", "kc", or "tc" (i.e. the 2 letter mode for the complex
- type being created).
-
- Asm_mode_name is "kc" or "tc" (i.e. the 2 letter mode for the function that
- will be called).
-
- Fncode is the function code of the multiply/divide built-in function.
-
- Fntype is the tree type node of the function. */
-
-static void
-create_complex_muldiv_inner (const char *mul_or_div,
- const char *lib_mode_name,
- const char *asm_mode_name,
- built_in_function fncode,
- tree fntype)
-{
- char *asm_name = ACONCAT (("__", mul_or_div, asm_mode_name, "3", NULL));
- char *name = ACONCAT (("__", mul_or_div, lib_mode_name, "3_", asm_mode_name,
- NULL));
-
- tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
- asm_name, NULL_TREE);
-
- set_builtin_decl (fncode, fndecl, true);
-
- if (TARGET_DEBUG_BUILTIN)
- fprintf (stderr, "create complex %s (%s), fncode: %d\n", name, asm_name,
- (int) fncode);
-
- return;
-}
-
-/* Create both complex multiply and complex divide for a given 128-bit floating
- point type.
-
- Lib_mode_name is "ic", "kc", or "tc" (i.e. the 2 letter mode for the complex
- type being created).
-
- Asm_mode_name is "kc" or "tc" (i.e. the 2 letter mode for the function that
- will be called).
-
- Complex_mode is the mode of the complex type (i.e. KCmode, ICmode, or
- TCmode).
-
- Arg_type is the type of scalar 128-bit floating point type (i.e. the
- _Float128, __ibm128, or long double type nodes). */
-
-static void
-create_complex_muldiv (const char *lib_mode_name,
- const char *asm_mode_name,
- machine_mode complex_mode,
- tree arg_type)
-{
- tree complex_type = (arg_type == long_double_type_node
- ? complex_long_double_type_node
- : build_complex_type (arg_type));
- tree fntype = build_function_type_list (complex_type, arg_type, arg_type,
- arg_type, arg_type, NULL_TREE);
-
- /* Build complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("mul", lib_mode_name, asm_mode_name, mul_fncode,
- fntype);
-
- /* Build complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("div", lib_mode_name, asm_mode_name, div_fncode,
- fntype);
- return;
-}
-
static void
rs6000_init_libfuncs (void)
{
@@ -11249,27 +11168,44 @@ rs6000_init_libfuncs (void)
init_float128_ieee (TFmode);
}
- /* Set up to call the appropriate __mul{kc,tc}3 and __div{kc,tc}3 for the
- 128-bit floating point types, using kc3 for IEEE 128-bit and tc3 for IBM
- 128-bit. We only call this for the functions that don't use the default
- names.
+ /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
+ 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
+ both IEEE long double and for explicit _Float128/__float128) because
+ c_builtin_function will complain if we create two built-in functions with
+ the same name. Instead we use an alias name for the case when long double
+ uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
+ for this name.
We need to only execute this once. If we have clone or target attributes,
this will be called a second time. We need to create the built-in
function only once. */
static bool complex_muldiv_init_p = false;
- if (!complex_muldiv_init_p
- && (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128))
+ if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
+ && !complex_muldiv_init_p)
{
complex_muldiv_init_p = true;
- /* Create __ibm128 complex multiply divide. */
- create_complex_muldiv ("ic", "tc", ICmode, ibm128_float_type_node);
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ /* Create complex multiply. */
+ built_in_function mul_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
+
+ /* Create complex divide. */
+ built_in_function div_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
- if (TARGET_LONG_DOUBLE_128 && TARGET_IEEEQUAD)
- /* Create long double (IEEE 128-bit) complex multiply/divide. */
- create_complex_muldiv ("tc", "kc", TCmode, long_double_type_node);
+ create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
}
}
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index e34ed40bac2..0cfcea837ed 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divkc3" } } */
+/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index eee6de9e2a5..78ef1dc00f0 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __mulkc3" } } */
+/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 73cbca2fc9a..30d46bcb233 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,3 +359,9 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
+
+TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
+
+TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index ae0622c744c..a684d0e1bcf 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,6 +191,11 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
+/* Complex long double multiply/divide if long double uses the IEEE 128-bit
+ encoding. */
+extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-08 20:09 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-08 20:09 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:48c6fae5b924e12954298b948033d4baa84c8e89
commit 48c6fae5b924e12954298b948033d4baa84c8e89
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 8 16:09:28 2022 -0400
Revert patch.
Rework setting 128-bit complex multiply and divide.
2022-07-08 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs600.cc (create_complex_muldiv_inner): New
function.
(create_complex_muldiv): Rewrite function to handle both multiply
and divide. Set the decl assembler name to change the name to the
external function.
gcc/testsuite/
Revert patch.
* gcc.target/powerpc/mulkc3-2.c: Revert patch #7.
* gcc.target/powerpc/divkc3-2.c: Likewise.
libgcc/
Revert patch.
* config/rs6000/float128-ifunc.c: Revert patch #7.
* config/rs6000/quad-float128.h: Likewise.
Diff:
---
gcc/config/rs6000/rs6000.cc | 160 +++++++++-------------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 ++
libgcc/config/rs6000/quad-float128.h | 5 +
5 files changed, 61 insertions(+), 114 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 9017f9c4876..541b4679907 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -11031,6 +11031,26 @@ init_float128_ibm (machine_mode mode)
}
}
+/* Create a decl for either complex long double multiply or complex long double
+ divide when long double is IEEE 128-bit floating point. We can't use
+ __multc3 and __divtc3 because the original long double using IBM extended
+ double used those names. The complex multiply/divide functions are encoded
+ as builtin functions with a complex result and 4 scalar inputs. */
+
+static void
+create_complex_muldiv (const char *name, built_in_function fncode, tree fntype)
+{
+ tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
+ name, NULL_TREE);
+
+ set_builtin_decl (fncode, fndecl, true);
+
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "create complex %s, fncode: %d\n", name, (int) fncode);
+
+ return;
+}
+
/* Set up IEEE 128-bit floating point routines. Use different names if the
arguments can be passed in a vector register. The historical PowerPC
implementation of IEEE 128-bit floating point used _q_<op> for the names, so
@@ -11126,107 +11146,6 @@ init_float128_ieee (machine_mode mode)
}
}
-/* Create a decls for complex long double multiply and complex long double
- divide for the 128-bit floating point types.
-
- When long double is IEEE 128-bit floating point, we can't use __multc3 and
- __divtc3 because the original long double using IBM extended double used
- those names.
-
- Similarly for __ibm128, we want to use __multc3 and __divtc3.
-
- For these cases, we create a decl with a different name, and then set the
- ASM name so that we don't have to change libgcc to provide these extra
- names. We can't just use the same name because we will get an abort if a
- built-in function uses the same name.
-
- The complex multiply/divide functions are encoded as builtin functions with
- a complex result and 4 scalar inputs. */
-
-/* Inner function to create a single complex multiply or complex divide
- function.
-
- Mul_or_div is either "mul" or "div" depending on whether we are creating
- multiply or divide.
-
- Lib_mode_name is "ic", "kc", or "tc" (i.e. the 2 letter mode for the complex
- type being created).
-
- Asm_mode_name is "kc" or "tc" (i.e. the 2 letter mode for the function that
- will be called).
-
- Fncode is the function code of the multiply/divide built-in function.
-
- Fntype is the tree type node of the function. */
-
-static void
-create_complex_muldiv_inner (const char *mul_or_div,
- const char *lib_mode_name,
- const char *asm_mode_name,
- built_in_function fncode,
- tree fntype)
-{
- char *asm_name = ACONCAT (("__", mul_or_div, asm_mode_name, "3", NULL));
- char *name = ACONCAT (("__", mul_or_div, lib_mode_name, "3_", asm_mode_name,
- NULL));
-
- tree fndecl = add_builtin_function (name, fntype, fncode, BUILT_IN_NORMAL,
- asm_name, NULL_TREE);
-
- set_builtin_decl (fncode, fndecl, true);
-
- if (1 || TARGET_DEBUG_BUILTIN)
- fprintf (stderr, "create complex %s (%s), fncode: %d\n", name, asm_name,
- (int) fncode);
-
- return;
-}
-
-/* Create both complex multiply and complex divide for a given 128-bit floating
- point type.
-
- Lib_mode_name is "ic", "kc", or "tc" (i.e. the 2 letter mode for the complex
- type being created).
-
- Asm_mode_name is "kc" or "tc" (i.e. the 2 letter mode for the function that
- will be called).
-
- Complex_mode is the mode of the complex type (i.e. KCmode, ICmode, or
- TCmode).
-
- Arg_type is the type of scalar 128-bit floating point type (i.e. the
- _Float128, __ibm128, or long double type nodes). */
-
-static void
-create_complex_muldiv (const char *lib_mode_name,
- const char *asm_mode_name,
- machine_mode complex_mode,
- tree arg_type)
-{
- tree complex_type = (arg_type == long_double_type_node
- ? complex_long_double_type_node
- : build_complex_type (arg_type));
- tree fntype = build_function_type_list (complex_type, arg_type, arg_type,
- arg_type, arg_type, NULL_TREE);
-
- /* Build complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("mul", lib_mode_name, asm_mode_name, mul_fncode,
- fntype);
-
- /* Build complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + complex_mode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv_inner ("div", lib_mode_name, asm_mode_name, div_fncode,
- fntype);
- return;
-}
-
static void
rs6000_init_libfuncs (void)
{
@@ -11249,27 +11168,44 @@ rs6000_init_libfuncs (void)
init_float128_ieee (TFmode);
}
- /* Set up to call the appropriate __mul{kc,tc}3 and __div{kc,tc}3 for the
- 128-bit floating point types, using kc3 for IEEE 128-bit and tc3 for IBM
- 128-bit. We only call this for the functions that don't use the default
- names.
+ /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
+ 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
+ both IEEE long double and for explicit _Float128/__float128) because
+ c_builtin_function will complain if we create two built-in functions with
+ the same name. Instead we use an alias name for the case when long double
+ uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
+ for this name.
We need to only execute this once. If we have clone or target attributes,
this will be called a second time. We need to create the built-in
function only once. */
static bool complex_muldiv_init_p = false;
- if (!complex_muldiv_init_p
- && (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128))
+ if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
+ && !complex_muldiv_init_p)
{
complex_muldiv_init_p = true;
- /* Create __ibm128 complex multiply divide. */
- create_complex_muldiv ("ic", "tc", ICmode, ibm128_float_type_node);
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ /* Create complex multiply. */
+ built_in_function mul_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
+
+ /* Create complex divide. */
+ built_in_function div_fncode =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
- if (TARGET_LONG_DOUBLE_128 && TARGET_IEEEQUAD)
- /* Create long double (IEEE 128-bit) complex multiply/divide. */
- create_complex_muldiv ("tc", "kc", TCmode, long_double_type_node);
+ create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
}
}
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index e34ed40bac2..0cfcea837ed 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divkc3" } } */
+/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index eee6de9e2a5..78ef1dc00f0 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __mulkc3" } } */
+/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 73cbca2fc9a..30d46bcb233 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,3 +359,9 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
+
+TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
+
+TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
+ __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index ae0622c744c..a684d0e1bcf 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,6 +191,11 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
+/* Complex long double multiply/divide if long double uses the IEEE 128-bit
+ encoding. */
+extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
+
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-07 20:14 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-07 20:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8bab85c05eea92fe644832c450de113879206bd9
commit 8bab85c05eea92fe644832c450de113879206bd9
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 7 16:13:02 2022 -0400
Revert patch.
2022-07-07 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/predicate.md (kf_or_tf_operand): New predicate.
* config/rs6000/rs6000.md (add<mode>3_odd): Use kf_or_tf_operand
instead of altivec_register_operand.
(sub<mode>3_odd): Likewise.
(mul<mode>3_odd): Likewise.
(div<mode>3_odd): Likewise.
(sqrt<mode>2_odd): Likewise.
(fma<mode>4_odd): Likewise.
(fms<mode>4_odd): Likewise.
(nfma<mode>4_odd): Likewise.
(nfms<mode>4_odd): Likewise.
* config/rs6000/vsx.md (xsxexpqp_<mode>): Likewise.
(xsxsigqp_<mode>): Likewise.
(xsiexpqpf_<mode>): Likewise.
(xscmpexpqp_<code>_<mode>): Likewise.
(xscmpexpqp_<code>_<mode>): Likewise.
(xststdcqp_<mode>): Likewise.
(xststdcnegqp_<mode>): Likewise.
(xststdcqp_<mode>): Likewise.
2022-07-07 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): If we
have certain KFmode built-in functions, convert to TFmode if a
long double was passed, and long double is IEEE 128-bit. Also if
the modes are different, call convert_to_mode instead of
copy_to_mode_reg.
2022-07-07 Michael Meissner <meissner@linux.ibm.com>
gcc/
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 42 ++---------------------
gcc/config/rs6000/predicates.md | 26 --------------
gcc/config/rs6000/rs6000-builtin.cc | 68 +------------------------------------
gcc/config/rs6000/rs6000.md | 42 +++++++++++------------
gcc/config/rs6000/vsx.md | 20 +++++------
5 files changed, 34 insertions(+), 164 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d2fd8420538..edfbf0c47d9 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,44 +1,6 @@
-==================== work093, patch #9
+==================== work093, patch #9 (reverted)
-Allow KF/TF conversions in IEEE 128-bit insns.
-
-2022-07-07 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/predicate.md (kf_or_tf_operand): New predicate.
- * config/rs6000/rs6000.md (add<mode>3_odd): Use kf_or_tf_operand
- instead of altivec_register_operand.
- (sub<mode>3_odd): Likewise.
- (mul<mode>3_odd): Likewise.
- (div<mode>3_odd): Likewise.
- (sqrt<mode>2_odd): Likewise.
- (fma<mode>4_odd): Likewise.
- (fms<mode>4_odd): Likewise.
- (nfma<mode>4_odd): Likewise.
- (nfms<mode>4_odd): Likewise.
- * config/rs6000/vsx.md (xsxexpqp_<mode>): Likewise.
- (xsxsigqp_<mode>): Likewise.
- (xsiexpqpf_<mode>): Likewise.
- (xscmpexpqp_<code>_<mode>): Likewise.
- (xscmpexpqp_<code>_<mode>): Likewise.
- (xststdcqp_<mode>): Likewise.
- (xststdcnegqp_<mode>): Likewise.
- (xststdcqp_<mode>): Likewise.
-
-==================== work093, patch #8
-
-Fixup KFmode to TFmode built-in functions.
-
-2022-07-07 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): If we
- have certain KFmode built-in functions, convert to TFmode if a
- long double was passed, and long double is IEEE 128-bit. Also if
- the modes are different, call convert_to_mode instead of
- copy_to_mode_reg.
+==================== work093, patch #8 (reverted)
==================== work093, patch #7
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 873dbbb22f9..b1fcc69bb60 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -2064,29 +2064,3 @@
else
return false;
})
-
-;; Return 1 if the argument is KFmode or TFmode (when TFmode is IEEE 128-bit).
-;; Include various conversions between these formats. This allows passing long
-;; double to IEEE 128-bit built-ins without separate conversions.
-;;
-;; Since all of the instructions that operate on IEEE 128-bit require Altivec
-;; registers, check that the register is an Altivec register.
-(define_predicate "kf_or_tf_operand"
- (match_code "reg,subreg,float_extend,float_truncate")
-{
- if (mode == VOIDmode)
- mode = GET_MODE (op);
-
- if (!FLOAT128_IEEE_P (mode))
- return 0;
-
- if (GET_CODE (op) == FLOAT_EXTEND || GET_CODE (op) == FLOAT_TRUNCATE)
- {
- op = XEXP (op, 0);
- mode = GET_MODE (op);
- if (!FLOAT128_IEEE_P (mode))
- return 0;
- }
-
- return altivec_register_operand (op, mode);
-})
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 64e3a375dd5..457e463087f 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3290,70 +3290,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
- /* If long double is IEEE 128-bit, we may need to convert from the KFmode
- builtin function to the TFmode builtin function if the argument is long
- double (i.e. TFmode). */
- if (FLOAT128_IEEE_P (TFmode) && call_expr_nargs (exp) >= 1)
- {
- if (TYPE_MODE (TREE_TYPE (CALL_EXPR_ARG (exp, 0))) == TFmode)
- switch (icode)
- {
- case CODE_FOR_sqrtkf2_odd:
- icode = CODE_FOR_sqrttf2_odd;
- break;
- case CODE_FOR_trunckfdf2_odd:
- icode = CODE_FOR_trunctfdf2_odd;
- break;
- case CODE_FOR_addkf3_odd:
- icode = CODE_FOR_addtf3_odd;
- break;
- case CODE_FOR_subkf3_odd:
- icode = CODE_FOR_subtf3_odd;
- break;
- case CODE_FOR_mulkf3_odd:
- icode = CODE_FOR_multf3_odd;
- break;
- case CODE_FOR_divkf3_odd:
- icode = CODE_FOR_divtf3_odd;
- break;
- case CODE_FOR_fmakf4_odd:
- icode = CODE_FOR_fmatf4_odd;
- break;
- case CODE_FOR_xsxexpqp_kf:
- icode = CODE_FOR_xsxexpqp_tf;
- break;
- case CODE_FOR_xsxsigqp_kf:
- icode = CODE_FOR_xsxsigqp_tf;
- break;
- case CODE_FOR_xststdcnegqp_kf:
- icode = CODE_FOR_xststdcnegqp_tf;
- break;
- case CODE_FOR_xsiexpqp_kf:
- icode = CODE_FOR_xsiexpqp_tf;
- break;
- case CODE_FOR_xsiexpqpf_kf:
- icode = CODE_FOR_xsiexpqpf_tf;
- break;
- case CODE_FOR_xststdcqp_kf:
- icode = CODE_FOR_xststdcqp_tf;
- break;
- case CODE_FOR_xscmpexpqp_eq_kf:
- icode = CODE_FOR_xscmpexpqp_eq_tf;
- break;
- case CODE_FOR_xscmpexpqp_lt_kf:
- icode = CODE_FOR_xscmpexpqp_lt_tf;
- break;
- case CODE_FOR_xscmpexpqp_gt_kf:
- icode = CODE_FOR_xscmpexpqp_gt_tf;
- break;
- case CODE_FOR_xscmpexpqp_unordered_kf:
- icode = CODE_FOR_xscmpexpqp_unordered_tf;
- break;
- default:
- break;
- }
- }
-
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3655,9 +3591,7 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
for (int i = 0; i < nargs; i++)
if (!insn_data[icode].operand[i+k].predicate (op[i], mode[i+k]))
- op[i] = ((mode[i+k] == GET_MODE (op[i]) || GET_MODE (op[i]) == VOIDmode)
- ? copy_to_mode_reg (mode[i+k], op[i])
- : convert_to_mode (mode[i+k], op[i], false));
+ op[i] = copy_to_mode_reg (mode[i+k], op[i]);
rtx pat;
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e70438b519b..ec39358ebe8 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -15180,8 +15180,8 @@
(define_insn "add<mode>3_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_ADD_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsaddqpo %0,%1,%2"
@@ -15191,8 +15191,8 @@
(define_insn "sub<mode>3_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_SUB_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssubqpo %0,%1,%2"
@@ -15202,8 +15202,8 @@
(define_insn "mul<mode>3_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_MUL_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmulqpo %0,%1,%2"
@@ -15213,8 +15213,8 @@
(define_insn "div<mode>3_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_DIV_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsdivqpo %0,%1,%2"
@@ -15224,7 +15224,7 @@
(define_insn "sqrt<mode>2_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_SQRT_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssqrtqpo %0,%1"
@@ -15234,9 +15234,9 @@
(define_insn "fma<mode>4_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 3 "kf_or_tf_operand" "0")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
+ (match_operand:IEEE128 3 "altivec_register_operand" "0")]
UNSPEC_FMA_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmaddqpo %0,%1,%2"
@@ -15246,10 +15246,10 @@
(define_insn "*fms<mode>4_odd"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "%v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
(neg:IEEE128
- (match_operand:IEEE128 3 "kf_or_tf_operand" "0"))]
+ (match_operand:IEEE128 3 "altivec_register_operand" "0"))]
UNSPEC_FMA_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmsubqpo %0,%1,%2"
@@ -15260,9 +15260,9 @@
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(neg:IEEE128
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "%v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 3 "kf_or_tf_operand" "0")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
+ (match_operand:IEEE128 3 "altivec_register_operand" "0")]
UNSPEC_FMA_ROUND_TO_ODD)))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmaddqpo %0,%1,%2"
@@ -15273,10 +15273,10 @@
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(neg:IEEE128
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "%v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
(neg:IEEE128
- (match_operand:IEEE128 3 "kf_or_tf_operand" "0"))]
+ (match_operand:IEEE128 3 "altivec_register_operand" "0"))]
UNSPEC_FMA_ROUND_TO_ODD)))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmsubqpo %0,%1,%2"
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 87efdaa1756..e226a93bbe5 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5087,7 +5087,7 @@
;; VSX Scalar Extract Exponent Quad-Precision
(define_insn "xsxexpqp_<mode>"
[(set (match_operand:DI 0 "altivec_register_operand" "=v")
- (unspec:DI [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")]
+ (unspec:DI [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_VSX_SXEXPDP))]
"TARGET_P9_VECTOR"
"xsxexpqp %0,%1"
@@ -5105,7 +5105,7 @@
;; VSX Scalar Extract Significand Quad-Precision
(define_insn "xsxsigqp_<mode>"
[(set (match_operand:TI 0 "altivec_register_operand" "=v")
- (unspec:TI [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")]
+ (unspec:TI [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_VSX_SXSIG))]
"TARGET_P9_VECTOR"
"xsxsigqp %0,%1"
@@ -5124,7 +5124,7 @@
(define_insn "xsiexpqpf_<mode>"
[(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:DI 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SIEXPQP))]
"TARGET_P9_VECTOR"
@@ -5200,8 +5200,8 @@
[(set (match_dup 3)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ [(match_operand:IEEE128 1 "vsx_register_operand" "v")
+ (match_operand:IEEE128 2 "vsx_register_operand" "v")]
UNSPEC_VSX_SCMPEXPQP)
(const_int 0)))
(set (match_operand:SI 0 "register_operand" "=r")
@@ -5221,8 +5221,8 @@
(define_insn "*xscmpexpqp"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
(compare:CCFP
- (unspec:IEEE128 [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
- (match_operand:IEEE128 2 "kf_or_tf_operand" "v")]
+ (unspec:IEEE128 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SCMPEXPQP)
(match_operand:SI 3 "zero_constant" "j")))]
"TARGET_P9_VECTOR"
@@ -5238,7 +5238,7 @@
[(set (match_dup 3)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:SI 2 "u7bit_cint_operand" "n")]
UNSPEC_VSX_STSTDC)
(const_int 0)))
@@ -5276,7 +5276,7 @@
[(set (match_dup 2)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(const_int 0)]
UNSPEC_VSX_STSTDC)
(const_int 0)))
@@ -5310,7 +5310,7 @@
[(set (match_operand:CCFP 0 "" "=y")
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "kf_or_tf_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:SI 2 "u7bit_cint_operand" "n")]
UNSPEC_VSX_STSTDC)
(const_int 0)))]
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-06 22:04 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-06 22:04 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8388ac9a457d4340ce56d82dae899d6a482cd562
commit 8388ac9a457d4340ce56d82dae899d6a482cd562
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Jul 6 18:03:52 2022 -0400
Revert patch.
2022-07-06 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
create a new tree node for __ibm128, even if long double uses the
IBM 128-bit format. Always create a new tree node for __float128,
even if long double uses the IEEE 128-bit format.
(rs6000_expand_builtin): Remove all of the code that changed
KFmode built-in functions into TFmode, since these functions now
support overloading between KFmode and TFmode.
* config/rs6000/rs600.cc (reg_offset_addressing_ok_p): Allow
IFmode to use offset addresses.
(init_float128_ibm): Remove checks for hardware floating point for
the IBM 128-bit comparisons.
(init_float128_ieee): Do not create __mulkc3 and __divkc3 since
__float128 always creates these functions.
(rs6000_init_libfuncs): Create complex multiply and divide for
long double if long double uses the IEEE 128-bit encoding.
(rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
128-bit floating point is supported. Allow IFmode if either IEEE
128-bit floating point is supported or long double is IBM
128-bit.
(rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do
not return TFmode, even if long double uses the IEEE 128-bit
format.
(rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode,
even if long double uses the IEEE 128-bit encoding.
libgcc/
Revert patch.
* config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
support.
(__divtc3_ieee128): Likewise.
* config/rs6000/quad-float128.h (__multc3_ieee128): Add
Declaration.
(__divtc3_ieee128): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 90 +++++++++++++++++++++++--
gcc/config/rs6000/rs6000.cc | 122 ++++++++++++++++------------------
libgcc/config/rs6000/float128-ifunc.c | 6 --
libgcc/config/rs6000/quad-float128.h | 5 --
4 files changed, 140 insertions(+), 83 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 457e463087f..2e346d24db6 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -717,12 +717,18 @@ rs6000_init_builtins (void)
format is IBM extended double.
For IEEE 128-bit floating point, always create the type __float128. */
- if (TARGET_LONG_DOUBLE_128 || TARGET_FLOAT128_TYPE)
+ if (TARGET_LONG_DOUBLE_128 && (!TARGET_IEEEQUAD || TARGET_FLOAT128_TYPE))
{
- ibm128_float_type_node = make_node (REAL_TYPE);
- TYPE_PRECISION (ibm128_float_type_node) = 128;
- SET_TYPE_MODE (ibm128_float_type_node, IFmode);
- layout_type (ibm128_float_type_node);
+ if (!TARGET_IEEEQUAD)
+ ibm128_float_type_node = long_double_type_node;
+ else
+ {
+ ibm128_float_type_node = make_node (REAL_TYPE);
+ TYPE_PRECISION (ibm128_float_type_node) = 128;
+ SET_TYPE_MODE (ibm128_float_type_node, IFmode);
+ layout_type (ibm128_float_type_node);
+ }
+ t = build_qualified_type (ibm128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ibm128_float_type_node,
"__ibm128");
}
@@ -731,7 +737,11 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__float128");
}
@@ -3290,6 +3300,58 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
+
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3439,6 +3501,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
gcc_unreachable ();
}
+ if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
+ {
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ }
+
/* TRUE iff the built-in function returns void. */
bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
/* Position of first argument (0 for void-returning functions, else 1). */
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 19d1415034f..3ff16b8ae04 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -8532,7 +8532,6 @@ reg_offset_addressing_ok_p (machine_mode mode)
case E_TImode:
case E_TFmode:
case E_KFmode:
- case E_IFmode:
/* AltiVec/VSX vector modes. Only reg+reg addressing was valid until the
ISA 3.0 vector d-form addressing mode was added. While TImode is not
a vector mode, if we want to use the VSX registers to move it around,
@@ -10978,23 +10977,26 @@ init_float128_ibm (machine_mode mode)
set_optab_libfunc (smul_optab, mode, "__gcc_qmul");
set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv");
- set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
- set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
- set_optab_libfunc (ne_optab, mode, "__gcc_qne");
- set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
- set_optab_libfunc (ge_optab, mode, "__gcc_qge");
- set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
- set_optab_libfunc (le_optab, mode, "__gcc_qle");
- set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
-
- set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
- set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
- set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
- set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
- set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
- set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
- set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
- set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ if (!TARGET_HARD_FLOAT)
+ {
+ set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
+ set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
+ set_optab_libfunc (ne_optab, mode, "__gcc_qne");
+ set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
+ set_optab_libfunc (ge_optab, mode, "__gcc_qge");
+ set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
+ set_optab_libfunc (le_optab, mode, "__gcc_qle");
+ set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
+
+ set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
+ set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
+ set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
+ set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
+ set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
+ set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
+ set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
+ set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ }
}
else
{
@@ -11062,6 +11064,32 @@ init_float128_ieee (machine_mode mode)
{
if (FLOAT128_VECTOR_P (mode))
{
+ static bool complex_muldiv_init_p = false;
+
+ /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If
+ we have clone or target attributes, this will be called a second
+ time. We want to create the built-in function only once. */
+ if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p)
+ {
+ complex_muldiv_init_p = true;
+ built_in_function fncode_mul =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+ built_in_function fncode_div =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ create_complex_muldiv ("__mulkc3", fncode_mul, fntype);
+ create_complex_muldiv ("__divkc3", fncode_div, fntype);
+ }
+
set_optab_libfunc (add_optab, mode, "__addkf3");
set_optab_libfunc (sub_optab, mode, "__subkf3");
set_optab_libfunc (neg_optab, mode, "__negkf2");
@@ -11166,46 +11194,6 @@ rs6000_init_libfuncs (void)
else
init_float128_ieee (TFmode);
}
-
- /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
- 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
- both IEEE long double and for explicit _Float128/__float128) because
- c_builtin_function will complain if we create two built-in functions with
- the same name. Instead we use an alias name for the case when long double
- uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
- for this name.
-
- We need to only execute this once. If we have clone or target attributes,
- this will be called a second time. We need to create the built-in
- function only once. */
- static bool complex_muldiv_init_p = false;
-
- if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
- && !complex_muldiv_init_p)
- {
- complex_muldiv_init_p = true;
-
- tree fntype = build_function_type_list (complex_long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- NULL_TREE);
-
- /* Create complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
-
- /* Create complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
- }
}
/* Emit a potentially record-form instruction, setting DST from SRC.
@@ -23828,9 +23816,7 @@ rs6000_scalar_mode_supported_p (scalar_mode mode)
if (DECIMAL_FLOAT_MODE_P (mode))
return default_decimal_float_supported_p ();
- else if (TARGET_FLOAT128_TYPE && mode == KFmode)
- return true;
- else if ((TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128) && mode == IFmode)
+ else if (TARGET_FLOAT128_TYPE && (mode == KFmode || mode == IFmode))
return true;
else
return default_scalar_mode_supported_p (mode);
@@ -23848,9 +23834,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
- /* We only return true for KFmode if IEEE 128-bit types are supported. */
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23884,7 +23874,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23908,7 +23898,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23926,7 +23916,7 @@ rs6000_c_mode_for_suffix (char suffix)
if (TARGET_FLOAT128_TYPE)
{
if (suffix == 'q' || suffix == 'Q')
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
/* At the moment, we are not defining a suffix for IBM extended double.
If/when the default for -mabi=ieeelongdouble is changed, and we want
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 30d46bcb233..73cbca2fc9a 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,9 +359,3 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
-
-TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
-
-TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index a684d0e1bcf..ae0622c744c 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,11 +191,6 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
-/* Complex long double multiply/divide if long double uses the IEEE 128-bit
- encoding. */
-extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-07-01 7:09 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-07-01 7:09 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d901f77921abff1dfe895682c4d287846dad51c4
commit d901f77921abff1dfe895682c4d287846dad51c4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 1 03:09:18 2022 -0400
Revert patch.
Overload IEEE 128-bit extract and insert support.
2022-07-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
gcc/testsuite/
Revert patch.
* gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the
expected error message.
* gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 26 ++++++----------------
gcc/config/rs6000/rs6000-c.cc | 10 ++++-----
gcc/config/rs6000/rs6000-overload.def | 12 +++-------
| 2 +-
| 2 +-
.../gcc.target/powerpc/bfp/scalar-insert-exp-10.c | 2 +-
6 files changed, 17 insertions(+), 37 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 277d9e2f159..e96b89c449b 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,21 +2902,19 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
- VSEEQP_KF xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
+ VSEEQP xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
- VSESQP_KF xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
+ VSESQP xsxsigqp_kf {}
-; Note we cannot overload this function since it does not have KFmode
-; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
- unsigned long long);
- VSIEQPF_KF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
+ unsigned long long);
+ VSIEQPF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2970,16 +2968,6 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
- const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
- VSEEQP_TF xsxexpqp_tf {ieeeld}
-
- const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
- VSESQP_TF xsxsigqp_tf {ieeeld}
-
- const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
- unsigned long long);
- VSIEQPF_TF xsiexpqpf_tf {}
-
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index b9d3aa06e40..155233bfbcc 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,13 +1939,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant that
- expects _Float128 argument (or long double if long doubles are
- IEEE 128-bit). Otherwise, expect __int128 argument. */
+ /* If first argument is of float variety, choose variant
+ that expects __ieee128 argument. Otherwise, expect
+ __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = ((arg1_mode == TFmode)
- ? RS6000_BIF_VSIEQPF_TF
- : RS6000_BIF_VSIEQPF_KF);
+ instance_code = RS6000_BIF_VSIEQPF;
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 546883ece19..511a3821d5b 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,17 +4506,13 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP_KF
- unsigned int __builtin_vec_scalar_extract_exp (long double);
- VSEEQP_TF
+ VSEEQP
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP_KF
- unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
- VSESQP_TF
+ VSESQP
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4526,9 +4522,7 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF_KF
- long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
- VSIEQPF_TF
+ VSIEQPF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
index 14c6554f417..850ff620490 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
@@ -11,7 +11,7 @@ get_exponent (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq.*' requires" } */
+ return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq' requires" } */
}
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
index 9800cf65017..32a53c6fffd 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
@@ -11,5 +11,5 @@ get_significand (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq.*' requires" } */
+ return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq' requires" } */
}
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
index 4018c8fa08a..769d3b0546a 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
@@ -13,5 +13,5 @@ insert_exponent (__ieee128 *significand_p,
__ieee128 significand = *significand_p;
unsigned long long int exponent = *exponent_p;
- return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp.*' requires" } */
+ return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp' requires" } */
}
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-06-30 20:25 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-06-30 20:25 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:fbe8920ce1728a64bd288430080f11525c68f0c2
commit fbe8920ce1728a64bd288430080f11525c68f0c2
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 30 16:24:56 2022 -0400
Revert patch.
2022-06-30 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove
converting KFmode IEEE insert and extract built-in functions to
TFmode insert and extract built-in functions when long double is
IEEE 128-bit.
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 9 +++++++++
gcc/config/rs6000/rs6000-builtins.def | 26 +++++++-------------------
gcc/config/rs6000/rs6000-c.cc | 10 ++++------
gcc/config/rs6000/rs6000-overload.def | 12 +++---------
4 files changed, 23 insertions(+), 34 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 49a4e6ed7b4..2e346d24db6 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3318,12 +3318,21 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
if (FLOAT128_IEEE_P (TFmode))
switch (icode)
{
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
case CODE_FOR_xststdcnegqp_kf:
icode = CODE_FOR_xststdcnegqp_tf;
break;
case CODE_FOR_xsiexpqp_kf:
icode = CODE_FOR_xsiexpqp_tf;
break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
case CODE_FOR_xststdcqp_kf:
icode = CODE_FOR_xststdcqp_tf;
break;
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 277d9e2f159..e96b89c449b 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,21 +2902,19 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
- VSEEQP_KF xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
+ VSEEQP xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
- VSESQP_KF xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
+ VSESQP xsxsigqp_kf {}
-; Note we cannot overload this function since it does not have KFmode
-; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
- unsigned long long);
- VSIEQPF_KF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
+ unsigned long long);
+ VSIEQPF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2970,16 +2968,6 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
- const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
- VSEEQP_TF xsxexpqp_tf {ieeeld}
-
- const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
- VSESQP_TF xsxsigqp_tf {ieeeld}
-
- const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
- unsigned long long);
- VSIEQPF_TF xsiexpqpf_tf {}
-
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index b9d3aa06e40..155233bfbcc 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,13 +1939,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant that
- expects _Float128 argument (or long double if long doubles are
- IEEE 128-bit). Otherwise, expect __int128 argument. */
+ /* If first argument is of float variety, choose variant
+ that expects __ieee128 argument. Otherwise, expect
+ __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = ((arg1_mode == TFmode)
- ? RS6000_BIF_VSIEQPF_TF
- : RS6000_BIF_VSIEQPF_KF);
+ instance_code = RS6000_BIF_VSIEQPF;
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 546883ece19..511a3821d5b 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,17 +4506,13 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP_KF
- unsigned int __builtin_vec_scalar_extract_exp (long double);
- VSEEQP_TF
+ VSEEQP
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP_KF
- unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
- VSESQP_TF
+ VSESQP
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4526,9 +4522,7 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF_KF
- long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
- VSIEQPF_TF
+ VSIEQPF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
^ permalink raw reply [flat|nested] 9+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Revert patch.
@ 2022-06-30 18:34 Michael Meissner
0 siblings, 0 replies; 9+ messages in thread
From: Michael Meissner @ 2022-06-30 18:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:632526bbf7a53f8e2286d5a7da91068aed05b8c3
commit 632526bbf7a53f8e2286d5a7da91068aed05b8c3
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 30 14:33:11 2022 -0400
Revert patch.
Overload IEEE 128-bit scalar eq, gt, lt, and unordered built-ins.
2022-06-30 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove
converting KFmode comparison built-in functions to TFmode
comparison built-in functions when long double is IEEE 128-bit.
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_cmp_exp_qp_eq_kf): Rename KFmode comparison
built-in functions to have a KF suffix to allow overloading.
(__builtin_vsx_scalar_cmp_exp_qp_gt_kf): Likewise.
(__builtin_vsx_scalar_cmp_exp_qp_lt_kf): Likewise.
(__builtin_vsx_scalar_cmp_exp_qp_unordered_kf): Likewise.
(__builtin_vsx_scalar_cmp_exp_qp_eq_tf): Add TFmode comparison
built-in functions.
(__builtin_vsx_scalar_cmp_exp_qp_gt_tf): Likewise.
(__builtin_vsx_scalar_cmp_exp_qp_lt_tf): Likewise.
(__builtin_vsx_scalar_cmp_exp_qp_unordered_tf): Likewise.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_cmp_exp_eq): Add TFmode overloaded
functions.
(__builtin_vec_scalar_cmp_exp_gt): Likewise.
(__builtin_vec_scalar_cmp_exp_lt): Likewise.
(__builtin_vec_scalar_cmp_exp_unordered): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 12 ++++++++++++
gcc/config/rs6000/rs6000-builtins.def | 32 ++++++++------------------------
gcc/config/rs6000/rs6000-overload.def | 16 ++++------------
3 files changed, 24 insertions(+), 36 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 3c30b3290a5..2e346d24db6 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3336,6 +3336,18 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
case CODE_FOR_xststdcqp_kf:
icode = CODE_FOR_xststdcqp_tf;
break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
default:
break;
}
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e96b89c449b..d72ff8cb7fe 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2880,18 +2880,18 @@
fpmath _Float128 __builtin_mulf128_round_to_odd_kf (_Float128, _Float128);
MULF128_ODD_KF mulkf3_odd {}
- const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_kf (_Float128, _Float128);
- VSCEQPEQ_KF xscmpexpqp_eq_kf {}
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+ VSCEQPEQ xscmpexpqp_eq_kf {}
- const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_kf (_Float128, _Float128);
- VSCEQPGT_KF xscmpexpqp_gt_kf {}
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
+ VSCEQPGT xscmpexpqp_gt_kf {}
- const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_kf (_Float128, _Float128);
- VSCEQPLT_KF xscmpexpqp_lt_kf {}
+ const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
+ VSCEQPLT xscmpexpqp_lt_kf {}
const signed int \
- __builtin_vsx_scalar_cmp_exp_qp_unordered_kf (_Float128, _Float128);
- VSCEQPUO_KF xscmpexpqp_unordered_kf {}
+ __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
+ VSCEQPUO xscmpexpqp_unordered_kf {}
fpmath _Float128 __builtin_sqrtf128_round_to_odd_kf (_Float128);
SQRTF128_ODD_KF sqrtkf2_odd {}
@@ -2942,22 +2942,6 @@
long double);
MULF128_ODD_TF multf3_odd {ieeeld}
- const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_tf (long double, \
- long double);
- VSCEQPEQ_TF xscmpexpqp_eq_tf {ieeeld}
-
- const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_tf (long double, \
- long double);
- VSCEQPGT_TF xscmpexpqp_gt_kf {ieeeld}
-
- const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_tf (long double, \
- long double);
- VSCEQPLT_TF xscmpexpqp_lt_tf {ieeeld}
-
- const signed int \
- __builtin_vsx_scalar_cmp_exp_qp_unordered_tf (_Float128, _Float128);
- VSCEQPUO_TF xscmpexpqp_unordered_tf {ieeeld}
-
fpmath long double __builtin_sqrtf128_round_to_odd_tf (long double);
SQRTF128_ODD_TF sqrttf2_odd {ieeeld}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 511a3821d5b..f406a16a882 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4474,33 +4474,25 @@
signed int __builtin_vec_scalar_cmp_exp_eq (double, double);
VSCEDPEQ
signed int __builtin_vec_scalar_cmp_exp_eq (_Float128, _Float128);
- VSCEQPEQ_KF
- signed int __builtin_vec_scalar_cmp_exp_eq (long double, long double);
- VSCEQPEQ_TF
+ VSCEQPEQ
[VEC_VSCEGT, scalar_cmp_exp_gt, __builtin_vec_scalar_cmp_exp_gt]
signed int __builtin_vec_scalar_cmp_exp_gt (double, double);
VSCEDPGT
signed int __builtin_vec_scalar_cmp_exp_gt (_Float128, _Float128);
- VSCEQPGT_KF
- signed int __builtin_vec_scalar_cmp_exp_gt (long double, long double);
- VSCEQPGT_TF
+ VSCEQPGT
[VEC_VSCELT, scalar_cmp_exp_lt, __builtin_vec_scalar_cmp_exp_lt]
signed int __builtin_vec_scalar_cmp_exp_lt (double, double);
VSCEDPLT
signed int __builtin_vec_scalar_cmp_exp_lt (_Float128, _Float128);
- VSCEQPLT_KF
- signed int __builtin_vec_scalar_cmp_exp_lt (long double, long double);
- VSCEQPLT_TF
+ VSCEQPLT
[VEC_VSCEUO, scalar_cmp_exp_unordered, __builtin_vec_scalar_cmp_exp_unordered]
signed int __builtin_vec_scalar_cmp_exp_unordered (double, double);
VSCEDPUO
signed int __builtin_vec_scalar_cmp_exp_unordered (_Float128, _Float128);
- VSCEQPUO_KF
- signed int __builtin_vec_scalar_cmp_exp_unordered (long double, long double);
- VSCEQPUO_TF
+ VSCEQPUO
[VEC_VSEE, scalar_extract_exp, __builtin_vec_scalar_extract_exp]
unsigned int __builtin_vec_scalar_extract_exp (double);
^ permalink raw reply [flat|nested] 9+ messages in thread
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