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* [gcc(refs/users/meissner/heads/work097)] Revert patch.
@ 2022-08-10 5:33 Michael Meissner
0 siblings, 0 replies; 5+ messages in thread
From: Michael Meissner @ 2022-08-10 5:33 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5ea487122f4f86eda46e67fa738bb359039ac11c
commit 5ea487122f4f86eda46e67fa738bb359039ac11c
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Aug 10 01:32:00 2022 -0400
Revert patch.
2022-08-09 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Use
float128_type_node, not ieee128_float_type_mode.
(rs6000_init_builtins): Always use the _Float128 type for the __float128
keyword. Do not use the long double type.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
float128_type_node, not ieee128_float_type_mode. Simplify if
statements.
(rs6000_cpu_cpp_builtins): Delete ieee128_float_type_mode.
* config/rs6000/rs6000.cc (rs6000_libgcc_floating_mode_supported_p):
Always use KFmode for _Float128 and __float128.
(rs6000_floatn_mode): Likewise.
(rs6000_c_mode_for_suffix): Always use KFmode for _Float128 and
__float128. Add 'w' and 'W' suffix for __ibm128 constants.
* config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
(ieee128_float_type_node): Likewise.
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 35 -----------------------------------
gcc/config/rs6000/rs6000-builtin.cc | 12 +++++++++---
gcc/config/rs6000/rs6000-c.cc | 16 +++++++---------
gcc/config/rs6000/rs6000.cc | 36 ++++++++++++++++++++++++------------
gcc/config/rs6000/rs6000.h | 2 ++
5 files changed, 42 insertions(+), 59 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d660cbf6974..4bc6bdb00a9 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,38 +1,3 @@
-==================== work097, patch003
-
-Use _Float128 type for __float128.
-
-In the past if the long double type was IEEE 128-bit, the __float128 type would
-use the long double type, and TFmode would be used for the mode for both
-_Float128 and long double types.
-
-This patch always uses the _Float128 type for __float128, and it always uses
-KFmode for the mode. Right now, a similar change for __ibm128 has not been
-made.
-
-In making these changes, I noticed that there was an internal tree for holding
-the __float128 type. This code removes that internal tree variable.
-
-2022-08-09 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Use
- float128_type_node, not ieee128_float_type_mode.
- (rs6000_init_builtins): Always use the _Float128 type for the __float128
- keyword. Do not use the long double type.
- * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
- float128_type_node, not ieee128_float_type_mode. Simplify if
- statements.
- (rs6000_cpu_cpp_builtins): Delete ieee128_float_type_mode.
- * config/rs6000/rs6000.cc (rs6000_libgcc_floating_mode_supported_p):
- Always use KFmode for _Float128 and __float128.
- (rs6000_floatn_mode): Likewise.
- (rs6000_c_mode_for_suffix): Always use KFmode for _Float128 and
- __float128. Add 'w' and 'W' suffix for __ibm128 constants.
- * config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
- (ieee128_float_type_node): Likewise.
-
==================== work097, patch002
Rework 128-bit complex multiply and divide.
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index c53a2d32a6f..755a6b95db0 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -434,7 +434,7 @@ const char *rs6000_type_string (tree type_node)
return "ss";
else if (type_node == ibm128_float_type_node)
return "__ibm128";
- else if (type_node == float128_type_node)
+ else if (type_node == ieee128_float_type_node)
return "__ieee128";
else if (type_node == opaque_V4SI_type_node)
return "opaque";
@@ -733,10 +733,16 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- t = build_qualified_type (float128_type_node, TYPE_QUAL_CONST);
- lang_hooks.types.register_builtin_type (float128_type_node,
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
+ lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
}
+ else
+ ieee128_float_type_node = NULL_TREE;
/* Vector pair and vector quad support. */
vector_pair_type_node = make_node (OPAQUE_TYPE);
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d0c4e0fca87..11de8389fd6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -578,15 +578,13 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
{
rs6000_define_or_undefine_macro (define_p, "__FLOAT128__");
if (define_p)
- {
- rs6000_define_or_undefine_macro (true, "__float128=__ieee128");
- rs6000_define_or_undefine_macro (true, "__SIZEOF_FLOAT128__=16");
- }
+ rs6000_define_or_undefine_macro (true, "__float128=__ieee128");
else
- {
- rs6000_define_or_undefine_macro (false, "__float128");
- rs6000_define_or_undefine_macro (false, "__SIZEOF_FLOAT128__");
- }
+ rs6000_define_or_undefine_macro (false, "__float128");
+ if (ieee128_float_type_node && define_p)
+ rs6000_define_or_undefine_macro (true, "__SIZEOF_FLOAT128__=16");
+ else
+ rs6000_define_or_undefine_macro (false, "__SIZEOF_FLOAT128__");
}
/* OPTION_MASK_FLOAT128_HARDWARE can be turned on if -mcpu=power9 is used or
via the target attribute/pragma. */
@@ -626,7 +624,7 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__FLOAT128_TYPE__");
if (ibm128_float_type_node)
builtin_define ("__SIZEOF_IBM128__=16");
- if (TARGET_FLOAT128_KEYWORD)
+ if (ieee128_float_type_node)
builtin_define ("__SIZEOF_IEEE128__=16");
#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
builtin_define ("__BUILTIN_CPU_SUPPORTS__");
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c63c1ac173c..eddf8c8afe7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -23678,14 +23678,14 @@ rs6000_eh_return_filter_mode (void)
return TARGET_32BIT ? SImode : word_mode;
}
-/* Target hook for translate_mode_attribute. In the past, we used to convert
- KFmode and KCmode to TFmode and TCmode if long double is IEEE 128-bit. We
- no longer do this because we always use the standard float128_type_node for
- __float128, and we no longer try to use the long double type. */
+/* Target hook for translate_mode_attribute. */
static machine_mode
rs6000_translate_mode_attribute (machine_mode mode)
{
- if (FLOAT128_IBM_P (mode) && ibm128_float_type_node == long_double_type_node)
+ if ((FLOAT128_IEEE_P (mode)
+ && ieee128_float_type_node == long_double_type_node)
+ || (FLOAT128_IBM_P (mode)
+ && ibm128_float_type_node == long_double_type_node))
return COMPLEX_MODE_P (mode) ? E_TCmode : E_TFmode;
return mode;
}
@@ -23724,8 +23724,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23759,7 +23764,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23783,7 +23788,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23798,11 +23803,18 @@ rs6000_floatn_mode (int n, bool extended)
static machine_mode
rs6000_c_mode_for_suffix (char suffix)
{
- if (TARGET_FLOAT128_TYPE && (suffix == 'q' || suffix == 'Q'))
- return KFmode;
+ if (TARGET_FLOAT128_TYPE)
+ {
+ if (suffix == 'q' || suffix == 'Q')
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
- if (TARGET_IBM128 && (suffix == 'w' || suffix == 'W'))
- return FLOAT128_IBM_P (TFmode) ? TFmode : IFmode;
+ /* At the moment, we are not defining a suffix for IBM extended double.
+ If/when the default for -mabi=ieeelongdouble is changed, and we want
+ to support __ibm128 constants in legacy library code, we may need to
+ re-evalaute this decision. Currently, c-lex.cc only supports 'w' and
+ 'q' as machine dependent suffixes. The x86_64 port uses 'w' for
+ __float80 constants. */
+ }
return VOIDmode;
}
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 4a1f6875747..f58f5f3f355 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2268,6 +2268,7 @@ enum rs6000_builtin_type_index
RS6000_BTI_dfloat64, /* dfloat64_type_node */
RS6000_BTI_dfloat128, /* dfloat128_type_node */
RS6000_BTI_void, /* void_type_node */
+ RS6000_BTI_ieee128_float, /* ieee 128-bit floating point */
RS6000_BTI_ibm128_float, /* IBM 128-bit floating point */
RS6000_BTI_const_str, /* pointer to const char * */
RS6000_BTI_vector_pair, /* unsigned 256-bit types (vector pair). */
@@ -2362,6 +2363,7 @@ enum rs6000_builtin_type_index
#define dfloat64_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat64])
#define dfloat128_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat128])
#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void])
+#define ieee128_float_type_node (rs6000_builtin_types[RS6000_BTI_ieee128_float])
#define ibm128_float_type_node (rs6000_builtin_types[RS6000_BTI_ibm128_float])
#define const_str_type_node (rs6000_builtin_types[RS6000_BTI_const_str])
#define vector_pair_type_node (rs6000_builtin_types[RS6000_BTI_vector_pair])
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/meissner/heads/work097)] Revert patch.
@ 2022-08-12 20:56 Michael Meissner
0 siblings, 0 replies; 5+ messages in thread
From: Michael Meissner @ 2022-08-12 20:56 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:195a05f224137b836acd2ba33fdb11cd4b13bdde
commit 195a05f224137b836acd2ba33fdb11cd4b13bdde
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Aug 12 16:55:58 2022 -0400
Revert patch.
Make __float128 use the _Float128 type.
2022-08-12 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always use the
_Float128 type for __float128. Don't use the long double type.
* config/rs6000/rs6000.cc (rs6000_libgcc_floating_mode_supported_p):
Always use KFmode for Float128 mode.
(rs6000_floatn_mode): Likewise.
(rs6000_c_mode_for_suffix): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 8 ++++----
gcc/config/rs6000/rs6000.cc | 13 +++++++++----
2 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 69a2aedc5f2..bfb14c4a870 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -733,10 +733,10 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- /* Always make the type used by __float128 to be the same as the
- _Float128 type. The C23 standard will want long double to be a
- different type than _Float128, so don't use the long double type. */
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 88fc4f1fdc5..eddf8c8afe7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -23724,8 +23724,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23759,7 +23764,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23783,7 +23788,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23801,7 +23806,7 @@ rs6000_c_mode_for_suffix (char suffix)
if (TARGET_FLOAT128_TYPE)
{
if (suffix == 'q' || suffix == 'Q')
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
/* At the moment, we are not defining a suffix for IBM extended double.
If/when the default for -mabi=ieeelongdouble is changed, and we want
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/meissner/heads/work097)] Revert patch.
@ 2022-08-12 2:39 Michael Meissner
0 siblings, 0 replies; 5+ messages in thread
From: Michael Meissner @ 2022-08-12 2:39 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:3dfe6754647f527dbe49bdbc1e34c065276ad537
commit 3dfe6754647f527dbe49bdbc1e34c065276ad537
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Aug 11 22:39:09 2022 -0400
Revert patch.
2022-08-11 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always use the
_Float128 type for __float128. Don't use the long double type.
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 11 +----------
gcc/config/rs6000/rs6000-builtin.cc | 8 ++++----
2 files changed, 5 insertions(+), 14 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 2e6a3764991..4ae59e38377 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,13 +1,4 @@
-==================== work097, patch008
-
-Make __float128 use the _Float128 type.
-
-2022-08-11 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always use the
- _Float128 type for __float128. Don't use the long double type.
+==================== work097, patch008 was reverted
==================== work097, patch007
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 1cc97fa49b3..e34a8f0cebf 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -733,10 +733,10 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- /* Always make the type used by __float128 to be the same as the
- _Float128 type. The C23 standard will want long double to be a
- different type than _Float128, so don't use the long double type. */
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/meissner/heads/work097)] Revert patch.
@ 2022-08-10 18:45 Michael Meissner
0 siblings, 0 replies; 5+ messages in thread
From: Michael Meissner @ 2022-08-10 18:45 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:bfe95056d95934d6e330ae9a75f2746082a6d72d
commit bfe95056d95934d6e330ae9a75f2746082a6d72d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Aug 10 14:44:34 2022 -0400
Revert patch.
2022-08-10 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patch.
* config/rs6000/predicates.md (ieee128_operand): New predicate.
(ibm128_operand): Likewise.
* config/rs6000/rs6000.md (unpack<mode>): Use ibm128_operand instead of
register_operand.
(unpack<mode>_dm): Likewise.
(unpack<mode>_nodm): Likewise.
(pack<mode>_hard): Likewise.
(unpack<mode>): Likewise.
(trunc<mode>sf2_hw): Use ieee128_operand instead of
altivec_register_operand.
(add<mode>3_odd): Likewise.
(sub<mode>3_odd): Likewise.
(mul<mode>3_odd): Likewise.
(div<mode>3_odd): Likewise.
(sqrt<mode>2_odd): Likewise.
(fma<mode>4_odd): Likewise.
(fms<mode>4_odd): Likewise.
(nfma<mode>4_odd): Likewise.
(nfms<mode>4_odd): Likewise.
(trunc<mode>df2_odd): Likewise.
* config/rs6000/vsx.md (xsxexpqp_<mode>): Use ieee128_operand instead of
altivec_register_operand.
(xsxsigqp_<mode>): Likewise.
(xsiexpqpf_<mode>): Likewise.
(xsiexpqp_<mode>): Likewise.
(xscmpexpqp_<code>_<mode>): Likewise.
(xscmpexpqp_<code>_<mode>): Likewise.
(xststdcqp_<mode>): Likewise.
(xststdcnegqp_<mode>): Likewise.
(xststdcqp_<mode): Likewise.
Diff:
---
gcc/config/rs6000/predicates.md | 37 -------------------
gcc/config/rs6000/rs6000.md | 80 ++++++++++++++++++++---------------------
gcc/config/rs6000/vsx.md | 24 ++++++-------
3 files changed, 52 insertions(+), 89 deletions(-)
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 2839ca73d95..b1fcc69bb60 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -119,43 +119,6 @@
return VSX_REGNO_P (REGNO (op));
})
-;; Return 1 if op is an IEEE 128-bit floating point type that is in a
-;; traditional Altivec register in order to do one of the IEEE 128-bit hardware
-;; instructions. We allow the operand mode to be different from the mode in
-;; the call to allow using either KFmode or TFmode, assuming the mode supports
-;; IEEE 128-bits. This way combinations of long double and __float128 will
-;; work when long double uses the IEEE 128-bit format without having to have
-;; insns that recognize the pattern with convert insns used.
-(define_predicate "ieee128_operand"
- (match_code "reg,subreg")
-{
- if (GET_MODE (op) != VOIDmode)
- mode = GET_MODE (op);
-
- if (!FLOAT128_IEEE_P (mode))
- return 0;
-
- return altivec_register_operand (op, mode);
-})
-
-;; Return 1 if op is an IBM 128-bit floating point type. We allow the operand
-;; mode to be different from the mode in the call to allow using either IFmode
-;; or TFmode, assuming the mode supports IBM 128-bits. This way combinations
-;; of long double and __ibm128 will work when long double uses the IBM 128-bit
-;; format without having to have insns that recognize the pattern with convert
-;; insns used.
-(define_predicate "ibm128_operand"
- (match_code "reg,subreg")
-{
- if (GET_MODE (op) != VOIDmode)
- mode = GET_MODE (op);
-
- if (!FLOAT128_IBM_P (mode))
- return 0;
-
- return register_operand (op, mode);
-})
-
;; Return 1 if op is a vector register that operates on floating point vectors
;; (either altivec or VSX).
(define_predicate "vfloat_operand"
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4a2dc089151..e17252bb8de 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -14614,7 +14614,7 @@
(define_expand "unpack<mode>"
[(set (match_operand:<FP128_64> 0 "nonimmediate_operand")
(unspec:<FP128_64>
- [(match_operand:FMOVE128 1 "ibm128_operand")
+ [(match_operand:FMOVE128 1 "register_operand")
(match_operand:QI 2 "const_0_to_1_operand")]
UNSPEC_UNPACK_128BIT))]
"FLOAT128_2REG_P (<MODE>mode)"
@@ -14623,7 +14623,7 @@
(define_insn_and_split "unpack<mode>_dm"
[(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,d,r,m")
(unspec:<FP128_64>
- [(match_operand:FMOVE128 1 "ibm128_operand" "d,d,r,d,r")
+ [(match_operand:FMOVE128 1 "register_operand" "d,d,r,d,r")
(match_operand:QI 2 "const_0_to_1_operand" "i,i,i,i,i")]
UNSPEC_UNPACK_128BIT))]
"TARGET_POWERPC64 && TARGET_DIRECT_MOVE && FLOAT128_2REG_P (<MODE>mode)"
@@ -14646,7 +14646,7 @@
(define_insn_and_split "unpack<mode>_nodm"
[(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,m")
(unspec:<FP128_64>
- [(match_operand:FMOVE128 1 "ibm128_operand" "d,d,r")
+ [(match_operand:FMOVE128 1 "register_operand" "d,d,r")
(match_operand:QI 2 "const_0_to_1_operand" "i,i,i")]
UNSPEC_UNPACK_128BIT))]
"(!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE) && FLOAT128_2REG_P (<MODE>mode)"
@@ -14680,7 +14680,7 @@
})
(define_insn_and_split "pack<mode>_hard"
- [(set (match_operand:FMOVE128 0 "ibm128_operand" "=&d")
+ [(set (match_operand:FMOVE128 0 "register_operand" "=&d")
(unspec:FMOVE128
[(match_operand:<FP128_64> 1 "register_operand" "d")
(match_operand:<FP128_64> 2 "register_operand" "d")]
@@ -14733,7 +14733,7 @@
(define_insn "unpack<mode>"
[(set (match_operand:DI 0 "register_operand" "=wa,wa")
- (unspec:DI [(match_operand:FMOVE128_VSX 1 "ibm128_operand" "0,wa")
+ (unspec:DI [(match_operand:FMOVE128_VSX 1 "register_operand" "0,wa")
(match_operand:QI 2 "const_0_to_1_operand" "O,i")]
UNSPEC_UNPACK_128BIT))]
"VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
@@ -14747,7 +14747,7 @@
[(set_attr "type" "vecperm")])
(define_insn "pack<mode>"
- [(set (match_operand:FMOVE128_VSX 0 "ibm128_operand" "=wa")
+ [(set (match_operand:FMOVE128_VSX 0 "register_operand" "=wa")
(unspec:FMOVE128_VSX
[(match_operand:DI 1 "register_operand" "wa")
(match_operand:DI 2 "register_operand" "wa")]
@@ -14984,7 +14984,7 @@
(define_insn_and_split "trunc<mode>sf2_hw"
[(set (match_operand:SF 0 "vsx_register_operand" "=wa")
(float_truncate:SF
- (match_operand:IEEE128 1 "ieee128_operand" "v")))
+ (match_operand:IEEE128 1 "altivec_register_operand" "v")))
(clobber (match_scratch:DF 2 "=v"))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"#"
@@ -15213,10 +15213,10 @@
;; IEEE 128-bit instructions with round to odd semantics
(define_insn "add<mode>3_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_ADD_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsaddqpo %0,%1,%2"
@@ -15224,10 +15224,10 @@
(set_attr "size" "128")])
(define_insn "sub<mode>3_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_SUB_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssubqpo %0,%1,%2"
@@ -15235,10 +15235,10 @@
(set_attr "size" "128")])
(define_insn "mul<mode>3_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_MUL_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmulqpo %0,%1,%2"
@@ -15246,10 +15246,10 @@
(set_attr "size" "128")])
(define_insn "div<mode>3_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_DIV_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsdivqpo %0,%1,%2"
@@ -15257,9 +15257,9 @@
(set_attr "size" "128")])
(define_insn "sqrt<mode>2_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_SQRT_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xssqrtqpo %0,%1"
@@ -15267,11 +15267,11 @@
(set_attr "size" "128")])
(define_insn "fma<mode>4_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")
- (match_operand:IEEE128 3 "ieee128_operand" "0")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
+ (match_operand:IEEE128 3 "altivec_register_operand" "0")]
UNSPEC_FMA_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmaddqpo %0,%1,%2"
@@ -15279,12 +15279,12 @@
(set_attr "size" "128")])
(define_insn "*fms<mode>4_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "%v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
(neg:IEEE128
- (match_operand:IEEE128 3 "ieee128_operand" "0"))]
+ (match_operand:IEEE128 3 "altivec_register_operand" "0"))]
UNSPEC_FMA_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsmsubqpo %0,%1,%2"
@@ -15292,12 +15292,12 @@
(set_attr "size" "128")])
(define_insn "*nfma<mode>4_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(neg:IEEE128
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "%v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")
- (match_operand:IEEE128 3 "ieee128_operand" "0")]
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
+ (match_operand:IEEE128 3 "altivec_register_operand" "0")]
UNSPEC_FMA_ROUND_TO_ODD)))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmaddqpo %0,%1,%2"
@@ -15305,13 +15305,13 @@
(set_attr "size" "128")])
(define_insn "*nfms<mode>4_odd"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(neg:IEEE128
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "%v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "%v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")
(neg:IEEE128
- (match_operand:IEEE128 3 "ieee128_operand" "0"))]
+ (match_operand:IEEE128 3 "altivec_register_operand" "0"))]
UNSPEC_FMA_ROUND_TO_ODD)))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xsnmsubqpo %0,%1,%2"
@@ -15320,7 +15320,7 @@
(define_insn "trunc<mode>df2_odd"
[(set (match_operand:DF 0 "vsx_register_operand" "=v")
- (unspec:DF [(match_operand:IEEE128 1 "ieee128_operand" "v")]
+ (unspec:DF [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_TRUNC_ROUND_TO_ODD))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscvqpdpo %0,%1"
@@ -15330,8 +15330,8 @@
;; IEEE 128-bit comparisons
(define_insn "*cmp<mode>_hw"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
- (compare:CCFP (match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")))]
+ (compare:CCFP (match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
"TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
"xscmpuqp %0,%1,%2"
[(set_attr "type" "veccmp")
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index c6b6b67d612..e226a93bbe5 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5087,7 +5087,7 @@
;; VSX Scalar Extract Exponent Quad-Precision
(define_insn "xsxexpqp_<mode>"
[(set (match_operand:DI 0 "altivec_register_operand" "=v")
- (unspec:DI [(match_operand:IEEE128 1 "ieee128_operand" "v")]
+ (unspec:DI [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_VSX_SXEXPDP))]
"TARGET_P9_VECTOR"
"xsxexpqp %0,%1"
@@ -5105,7 +5105,7 @@
;; VSX Scalar Extract Significand Quad-Precision
(define_insn "xsxsigqp_<mode>"
[(set (match_operand:TI 0 "altivec_register_operand" "=v")
- (unspec:TI [(match_operand:IEEE128 1 "ieee128_operand" "v")]
+ (unspec:TI [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
UNSPEC_VSX_SXSIG))]
"TARGET_P9_VECTOR"
"xsxsigqp %0,%1"
@@ -5122,9 +5122,9 @@
;; VSX Scalar Insert Exponent Quad-Precision Floating Point Argument
(define_insn "xsiexpqpf_<mode>"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:DI 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SIEXPQP))]
"TARGET_P9_VECTOR"
@@ -5133,7 +5133,7 @@
;; VSX Scalar Insert Exponent Quad-Precision
(define_insn "xsiexpqp_<mode>"
- [(set (match_operand:IEEE128 0 "ieee128_operand" "=v")
+ [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
(unspec:IEEE128 [(match_operand:TI 1 "altivec_register_operand" "v")
(match_operand:DI 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SIEXPQP))]
@@ -5200,8 +5200,8 @@
[(set (match_dup 3)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ [(match_operand:IEEE128 1 "vsx_register_operand" "v")
+ (match_operand:IEEE128 2 "vsx_register_operand" "v")]
UNSPEC_VSX_SCMPEXPQP)
(const_int 0)))
(set (match_operand:SI 0 "register_operand" "=r")
@@ -5221,8 +5221,8 @@
(define_insn "*xscmpexpqp"
[(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
(compare:CCFP
- (unspec:IEEE128 [(match_operand:IEEE128 1 "ieee128_operand" "v")
- (match_operand:IEEE128 2 "ieee128_operand" "v")]
+ (unspec:IEEE128 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
+ (match_operand:IEEE128 2 "altivec_register_operand" "v")]
UNSPEC_VSX_SCMPEXPQP)
(match_operand:SI 3 "zero_constant" "j")))]
"TARGET_P9_VECTOR"
@@ -5238,7 +5238,7 @@
[(set (match_dup 3)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:SI 2 "u7bit_cint_operand" "n")]
UNSPEC_VSX_STSTDC)
(const_int 0)))
@@ -5276,7 +5276,7 @@
[(set (match_dup 2)
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(const_int 0)]
UNSPEC_VSX_STSTDC)
(const_int 0)))
@@ -5310,7 +5310,7 @@
[(set (match_operand:CCFP 0 "" "=y")
(compare:CCFP
(unspec:IEEE128
- [(match_operand:IEEE128 1 "ieee128_operand" "v")
+ [(match_operand:IEEE128 1 "altivec_register_operand" "v")
(match_operand:SI 2 "u7bit_cint_operand" "n")]
UNSPEC_VSX_STSTDC)
(const_int 0)))]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [gcc(refs/users/meissner/heads/work097)] Revert patch.
@ 2022-08-10 17:24 Michael Meissner
0 siblings, 0 replies; 5+ messages in thread
From: Michael Meissner @ 2022-08-10 17:24 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8d97984593c8d4321ecc3b1e794612540857b113
commit 8d97984593c8d4321ecc3b1e794612540857b113
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Aug 10 13:23:58 2022 -0400
Revert patch.
2022-08-10 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Use
float128_type_node, not ieee128_float_type_mode.
(rs6000_init_builtins): Always use the _Float128 type for the __float128
keyword. Do not use the long double type.
(rs6000_expand_builtin): Rework converting KFmode and IFmode built-in
functions to TFmode.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
float128_type_node, not ieee128_float_type_mode. Simplify if
statements.
(rs6000_cpu_cpp_builtins): Delete ieee128_float_type_mode.
* config/rs6000/rs6000.cc (rs6000_libgcc_floating_mode_supported_p):
Always use KFmode for _Float128 and __float128.
(rs6000_floatn_mode): Likewise.
(rs6000_c_mode_for_suffix): Always use KFmode for _Float128 and
__float128. Add 'w' and 'W' suffix for __ibm128 constants.
* config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
(ieee128_float_type_node): Likewise.
* ChangeLog.meissner: Update.
Diff:
---
gcc/ChangeLog.meissner | 37 +-------
gcc/config/rs6000/rs6000-builtin.cc | 183 +++++++++++++++++++-----------------
gcc/config/rs6000/rs6000-c.cc | 16 ++--
gcc/config/rs6000/rs6000.cc | 36 ++++---
gcc/config/rs6000/rs6000.h | 2 +
5 files changed, 131 insertions(+), 143 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c293e41907a..dc7c9c8e599 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,39 +1,4 @@
-==================== work097, patch004
-
-Use _Float128 type for __float128.
-
-In the past if the long double type was IEEE 128-bit, the __float128 type would
-use the long double type, and TFmode would be used for the mode for both
-_Float128 and long double types.
-
-This patch always uses the _Float128 type for __float128, and it always uses
-KFmode for the mode. Right now, a similar change for __ibm128 has not been
-made.
-
-In making these changes, I noticed that there was an internal tree for holding
-the __float128 type. This code removes that internal tree variable.
-
-2022-08-10 Michael Meissner <meissner@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_type_string): Use
- float128_type_node, not ieee128_float_type_mode.
- (rs6000_init_builtins): Always use the _Float128 type for the __float128
- keyword. Do not use the long double type.
- (rs6000_expand_builtin): Rework converting KFmode and IFmode built-in
- functions to TFmode.
- * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
- float128_type_node, not ieee128_float_type_mode. Simplify if
- statements.
- (rs6000_cpu_cpp_builtins): Delete ieee128_float_type_mode.
- * config/rs6000/rs6000.cc (rs6000_libgcc_floating_mode_supported_p):
- Always use KFmode for _Float128 and __float128.
- (rs6000_floatn_mode): Likewise.
- (rs6000_c_mode_for_suffix): Always use KFmode for _Float128 and
- __float128. Add 'w' and 'W' suffix for __ibm128 constants.
- * config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
- (ieee128_float_type_node): Likewise.
+==================== work097, patch004 was reverted
==================== work097, patch003 was reverted
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index f09e5f684d3..755a6b95db0 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -434,7 +434,7 @@ const char *rs6000_type_string (tree type_node)
return "ss";
else if (type_node == ibm128_float_type_node)
return "__ibm128";
- else if (type_node == float128_type_node)
+ else if (type_node == ieee128_float_type_node)
return "__ieee128";
else if (type_node == opaque_V4SI_type_node)
return "opaque";
@@ -733,10 +733,16 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- t = build_qualified_type (float128_type_node, TYPE_QUAL_CONST);
- lang_hooks.types.register_builtin_type (float128_type_node,
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
+ lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
}
+ else
+ ieee128_float_type_node = NULL_TREE;
/* Vector pair and vector quad support. */
vector_pair_type_node = make_node (OPAQUE_TYPE);
@@ -3287,89 +3293,78 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
- if (TARGET_FLOAT128_TYPE || TARGET_IBM128)
- {
- bifdata *bifaddr = &rs6000_builtin_info[uns_fcode];
- bool found_tfmode = false;
- int nargs = bifaddr->nargs;
- for (int i = 0; i < nargs; i++)
- {
- tree arg = CALL_EXPR_ARG (exp, i);
- if (arg != error_mark_node && TYPE_MODE (TREE_TYPE (arg)) == TFmode)
- {
- found_tfmode = true;
- break;
- }
- }
-
- /* Map all of the explicit KFmode functions to the TFmode alternate. */
- if (found_tfmode && FLOAT128_IEEE_P (TFmode))
- switch (icode)
- {
- case CODE_FOR_sqrtkf2_odd:
- icode = CODE_FOR_sqrttf2_odd;
- break;
- case CODE_FOR_trunckfdf2_odd:
- icode = CODE_FOR_trunctfdf2_odd;
- break;
- case CODE_FOR_addkf3_odd:
- icode = CODE_FOR_addtf3_odd;
- break;
- case CODE_FOR_subkf3_odd:
- icode = CODE_FOR_subtf3_odd;
- break;
- case CODE_FOR_mulkf3_odd:
- icode = CODE_FOR_multf3_odd;
- break;
- case CODE_FOR_divkf3_odd:
- icode = CODE_FOR_divtf3_odd;
- break;
- case CODE_FOR_fmakf4_odd:
- icode = CODE_FOR_fmatf4_odd;
- break;
- case CODE_FOR_xsxexpqp_kf:
- icode = CODE_FOR_xsxexpqp_tf;
- break;
- case CODE_FOR_xsxsigqp_kf:
- icode = CODE_FOR_xsxsigqp_tf;
- break;
- case CODE_FOR_xststdcnegqp_kf:
- icode = CODE_FOR_xststdcnegqp_tf;
- break;
- case CODE_FOR_xsiexpqp_kf:
- icode = CODE_FOR_xsiexpqp_tf;
- break;
- case CODE_FOR_xsiexpqpf_kf:
- icode = CODE_FOR_xsiexpqpf_tf;
- break;
- case CODE_FOR_xststdcqp_kf:
- icode = CODE_FOR_xststdcqp_tf;
- break;
- case CODE_FOR_xscmpexpqp_eq_kf:
- icode = CODE_FOR_xscmpexpqp_eq_tf;
- break;
- case CODE_FOR_xscmpexpqp_lt_kf:
- icode = CODE_FOR_xscmpexpqp_lt_tf;
- break;
- case CODE_FOR_xscmpexpqp_gt_kf:
- icode = CODE_FOR_xscmpexpqp_gt_tf;
- break;
- case CODE_FOR_xscmpexpqp_unordered_kf:
- icode = CODE_FOR_xscmpexpqp_unordered_tf;
- break;
- default:
- break;
- }
-
- /* Map all of the IFmode builtins to TFmode if long double is IBM. */
- else if (found_tfmode && FLOAT128_IBM_P (TFmode))
- {
- if (icode == CODE_FOR_unpackif)
- icode = CODE_FOR_unpacktf;
- else if (icode == CODE_FOR_packif)
- icode = CODE_FOR_packtf;
- }
- }
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
@@ -3511,6 +3506,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
gcc_unreachable ();
}
+ if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
+ {
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ }
+
/* TRUE iff the built-in function returns void. */
bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
/* Position of first argument (0 for void-returning functions, else 1). */
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d0c4e0fca87..11de8389fd6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -578,15 +578,13 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
{
rs6000_define_or_undefine_macro (define_p, "__FLOAT128__");
if (define_p)
- {
- rs6000_define_or_undefine_macro (true, "__float128=__ieee128");
- rs6000_define_or_undefine_macro (true, "__SIZEOF_FLOAT128__=16");
- }
+ rs6000_define_or_undefine_macro (true, "__float128=__ieee128");
else
- {
- rs6000_define_or_undefine_macro (false, "__float128");
- rs6000_define_or_undefine_macro (false, "__SIZEOF_FLOAT128__");
- }
+ rs6000_define_or_undefine_macro (false, "__float128");
+ if (ieee128_float_type_node && define_p)
+ rs6000_define_or_undefine_macro (true, "__SIZEOF_FLOAT128__=16");
+ else
+ rs6000_define_or_undefine_macro (false, "__SIZEOF_FLOAT128__");
}
/* OPTION_MASK_FLOAT128_HARDWARE can be turned on if -mcpu=power9 is used or
via the target attribute/pragma. */
@@ -626,7 +624,7 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__FLOAT128_TYPE__");
if (ibm128_float_type_node)
builtin_define ("__SIZEOF_IBM128__=16");
- if (TARGET_FLOAT128_KEYWORD)
+ if (ieee128_float_type_node)
builtin_define ("__SIZEOF_IEEE128__=16");
#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
builtin_define ("__BUILTIN_CPU_SUPPORTS__");
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index c63c1ac173c..eddf8c8afe7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -23678,14 +23678,14 @@ rs6000_eh_return_filter_mode (void)
return TARGET_32BIT ? SImode : word_mode;
}
-/* Target hook for translate_mode_attribute. In the past, we used to convert
- KFmode and KCmode to TFmode and TCmode if long double is IEEE 128-bit. We
- no longer do this because we always use the standard float128_type_node for
- __float128, and we no longer try to use the long double type. */
+/* Target hook for translate_mode_attribute. */
static machine_mode
rs6000_translate_mode_attribute (machine_mode mode)
{
- if (FLOAT128_IBM_P (mode) && ibm128_float_type_node == long_double_type_node)
+ if ((FLOAT128_IEEE_P (mode)
+ && ieee128_float_type_node == long_double_type_node)
+ || (FLOAT128_IBM_P (mode)
+ && ibm128_float_type_node == long_double_type_node))
return COMPLEX_MODE_P (mode) ? E_TCmode : E_TFmode;
return mode;
}
@@ -23724,8 +23724,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23759,7 +23764,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23783,7 +23788,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23798,11 +23803,18 @@ rs6000_floatn_mode (int n, bool extended)
static machine_mode
rs6000_c_mode_for_suffix (char suffix)
{
- if (TARGET_FLOAT128_TYPE && (suffix == 'q' || suffix == 'Q'))
- return KFmode;
+ if (TARGET_FLOAT128_TYPE)
+ {
+ if (suffix == 'q' || suffix == 'Q')
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
- if (TARGET_IBM128 && (suffix == 'w' || suffix == 'W'))
- return FLOAT128_IBM_P (TFmode) ? TFmode : IFmode;
+ /* At the moment, we are not defining a suffix for IBM extended double.
+ If/when the default for -mabi=ieeelongdouble is changed, and we want
+ to support __ibm128 constants in legacy library code, we may need to
+ re-evalaute this decision. Currently, c-lex.cc only supports 'w' and
+ 'q' as machine dependent suffixes. The x86_64 port uses 'w' for
+ __float80 constants. */
+ }
return VOIDmode;
}
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 4a1f6875747..f58f5f3f355 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2268,6 +2268,7 @@ enum rs6000_builtin_type_index
RS6000_BTI_dfloat64, /* dfloat64_type_node */
RS6000_BTI_dfloat128, /* dfloat128_type_node */
RS6000_BTI_void, /* void_type_node */
+ RS6000_BTI_ieee128_float, /* ieee 128-bit floating point */
RS6000_BTI_ibm128_float, /* IBM 128-bit floating point */
RS6000_BTI_const_str, /* pointer to const char * */
RS6000_BTI_vector_pair, /* unsigned 256-bit types (vector pair). */
@@ -2362,6 +2363,7 @@ enum rs6000_builtin_type_index
#define dfloat64_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat64])
#define dfloat128_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat128])
#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void])
+#define ieee128_float_type_node (rs6000_builtin_types[RS6000_BTI_ieee128_float])
#define ibm128_float_type_node (rs6000_builtin_types[RS6000_BTI_ibm128_float])
#define const_str_type_node (rs6000_builtin_types[RS6000_BTI_const_str])
#define vector_pair_type_node (rs6000_builtin_types[RS6000_BTI_vector_pair])
^ permalink raw reply [flat|nested] 5+ messages in thread
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