[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:07ba27de0c8d44a47c12b22b128475bf82cd3fbb

commit 07ba27de0c8d44a47c12b22b128475bf82cd3fbb
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Oct 10 17:52:30 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-10   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index dc19dd754a6..dece9f67a91 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -71,7 +71,7 @@ gcc/
 	(isa attribute): Add dmf and mma_fpr attributes.
 	(enabled attribute): Add support for dmf and mma_fpr attributes.
 
-==================== dmf001, patch #3
+==================== dmf001, patch #1
 
 Add -mcpu=future/-mdmf instrastructure.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:fb5909911a33de343ce808bb54cccba0074d6170

commit fb5909911a33de343ce808bb54cccba0074d6170
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 27 01:17:32 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-27   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c760cc16dfd..9bab68181eb 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,17 @@
+==================== dmf001, patch #24
+
+Make more changes to make DMF002 branch merge easier.
+
+2022-10-27   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md: Make various changes made in DMF002
+	branch to make cherry picking changes easier.
+	* config/rs6000/mma.md: Likewise.
+	* config/rs6000/predicates.md: Likewise.
+	* config/rs6000/rs6000.cc: Likewise.
+
 ==================== dmf001, patch #23
 
 Make changes to make DMF002 branch merge easier.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:3c269508e8016e6f4a4ca6cace7b2317feff93f3

commit 3c269508e8016e6f4a4ca6cace7b2317feff93f3
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Oct 26 23:37:20 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-26   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 833c0ee7e5f..c760cc16dfd 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,23 @@
+==================== dmf001, patch #23
+
+Make changes to make DMF002 branch merge easier.
+
+2022-10-26   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md: Make various changes made in DMF002
+	branch to make cherry picking changes easier.
+	* config/rs6000/mma.md: Likewise.
+	* config/rs6000/predicates.md: Likewise.
+	* config/rs6000/rs6000-c.cc: Likewise.
+	* config/rs6000/rs6000-call.cc: Likewise.
+	* config/rs6000/rs6000-cpus.def: Likewise.
+	* config/rs6000/rs6000.cc: Likewise.
+	* config/rs6000/rs6000.h: Likewise.
+	* config/rs6000/rs6000.md: Likewise.
+	* config/rs6000/rs6000.opt: Likewise.
+
 ==================== dmf001, patch #22
 
 Adjust -mlagen again.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:5845184ec534cf4a729a6683c0da1860012da676

commit 5845184ec534cf4a729a6683c0da1860012da676
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 20 02:05:38 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-20   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 72e4bf80062..833c0ee7e5f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,18 @@
+==================== dmf001, patch #22
+
+Adjust -mlagen again.
+
+2022-10-20   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_file_start): Define just plagen, not
+	plagen1, plagen2, or plagen3.
+	* config/rs6000/rs6000.md (plagendi3_nora): Generate plagen, not
+	plagen1, plagen2, or plagen3.
+	(plagendi3): Likewise.
+	(plagendi3_noshift): Likewise.
+
 ==================== dmf001, patch #21
 
 Adjust -mlagen.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:5b6e278ebaece9268676f9ec51e90a00b29d71ba

commit 5b6e278ebaece9268676f9ec51e90a00b29d71ba
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 20 00:11:30 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-19   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index fdeb4a29eeb..72e4bf80062 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,16 @@
+==================== dmf001, patch #21
+
+Adjust -mlagen.
+
+2022-10-19   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_file_start): Change the macros for
+	lagen and plagen so they are the same size as the new instruction.
+	Obviously, you won't be able to run the program.
+	* config/rs6000/rs6000.md (lagendi3): Remove early clobber.
+
 ==================== dmf001, patch #20
 
 Add -mlagen.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:a7f0958462c15063ea130cf1a622ca6213442d0a

commit a7f0958462c15063ea130cf1a622ca6213442d0a
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Oct 19 00:15:50 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 1e92999706d..3f629a7f6c1 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,13 @@
+==================== dmf001, patch #19
+
+Add mangling for __dmr.
+
+2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_mangle_type): Add mangling for __dmr.
+
 ==================== dmf001, patch #18
 
 Add Dwarf support for DMR registers.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:625accfb05875d922f219ecaec12c47fb7c0c9ce

commit 625accfb05875d922f219ecaec12c47fb7c0c9ce
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 18 23:52:46 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6921720d6e5..1e92999706d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,14 @@
+==================== dmf001, patch #18
+
+Add Dwarf support for DMR registers.
+
+2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_memory_move_cost): Tweak last change.
+	(rs6000_debugger_regno): Add support for DMF registers.
+
 ==================== dmf001, patch #17
 
 Update DMR move costs.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8b6fd3fee914d7031848632118f20a5fb004261c

commit 8b6fd3fee914d7031848632118f20a5fb004261c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 18 23:46:39 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000.cc (rs6000_debugger_regno): Add support for DMF
            registers.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 9d5d1ce1930..9b9fa75d8ba 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -22724,7 +22724,8 @@ rs6000_memory_move_cost (machine_mode mode, reg_class_t rclass,
   else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS))
     ret = 4 * hard_regno_nregs (FIRST_ALTIVEC_REGNO, mode);
   else if (reg_classes_intersect_p (rclass, DMF_REGS))
-    ret = 4 + rs6000_register_move_cost (mode, rclass, VSX_REGS);
+    ret = (rs6000_dmf_register_move_cost (mode, VSX_REGS)
+	   + rs6000_memory_move_cost (mode, VSX_REGS, false));
   else
     ret = 4 + rs6000_register_move_cost (mode, rclass, GENERAL_REGS);
 
@@ -24099,6 +24100,10 @@ rs6000_debugger_regno (unsigned int regno, unsigned int format)
     return 67;
   if (regno == 64)
     return 64;
+  /* XXX: This is a guess.  The GCC register number for FIRST_DMF_REGNO is 111,
+     but the frame pointer regnum above uses that.  */
+  if (DMF_REGNO_P (regno))
+    return regno - FIRST_DMF_REGNO + 112;
 
   gcc_unreachable ();
 }

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b2a58fbc9562f0924f86f9b0fd9e914aa83f2ee1

commit b2a58fbc9562f0924f86f9b0fd9e914aa83f2ee1
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 18 18:36:09 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d548749f746..6921720d6e5 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,18 @@
+==================== dmf001, patch #17
+
+Update DMR move costs.
+
+2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_secondary_reload_memory): Account for
+	extra instructions needed to load/store DMF registers using VSX
+	registers.
+	(rs6000_dmf_register_move_cost): New helper function.
+	(rs6000_register_move_cost): Add costs for moving DMF registers.
+	(rs6000_memory_move_cost): Add support for DMF registers.
+
 ==================== dmf001, patch #16
 
 Add initial __dmr support.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8d8ffe7c3f4af8e68d365488367b32b40d503067

commit 8d8ffe7c3f4af8e68d365488367b32b40d503067
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 18 18:25:59 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index f14c3956d65..d548749f746 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,31 @@
+==================== dmf001, patch #16
+
+Add initial __dmr support.
+
+2022-10-18   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (UNSPEC_DMF_INSERT512_UPPER): New unspec.
+	(UNSPEC_DMF_INSERT512_LOWER): Likewise.
+	(UNSPEC_DMF_EXTRACT512): Likewise.
+	(UNSPEC_DMR_RELOAD_FROM_MEMORY): Likewise.
+	(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
+	(movtdo): New expander and define_insn_and_split.
+	(movtdo_insert512_upper): New insn.
+	(movtdo_insert512_lower): Likewise.
+	(movtdo_extract512): Likewise.
+	(reload_dmf_from_memory): Likewise.
+	(reload_dmf_to_memory): Likewise.
+	* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add __dmr
+	support.
+	(rs6000_init_builtins): Likewise.
+	* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Enable
+	TDOmode in DMF registers.
+	(rs6000_init_hard_regno_mode_ok): Add __dmr support.
+	(rs6000_secondary_reload_memory): Likewise.
+	(rs6000_secondary_reload_simple_move): Likewise.
+
 ==================== dmf001, patch #15
 
 Initial support for __dmr type.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:17af0e493e9c70071d77562769810204b7281088

commit 17af0e493e9c70071d77562769810204b7281088
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Oct 17 19:18:29 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-17   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index cd0de0e4348..ba6cb792369 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,13 @@
+==================== dmf001, patch #14
+
+Update comment.
+
+2022-10-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movxo): Update comment.
+
 ==================== dmf001, patch #13
 
 Use DMF names instead of MMF for instructions.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:9b86371808ffbc38273c36c8fc99419ef3a14089

commit 9b86371808ffbc38273c36c8fc99419ef3a14089
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Oct 14 20:12:29 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 65b9f7e5652..cd0de0e4348 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,37 @@
+==================== dmf001, patch #13
+
+Use DMF names instead of MMF for instructions.
+
+2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (vvi4i4i8_insn): New int attribute.
+	(avvi4i4i8_insn): Likewise.
+	(vvi4i4i2_insn): Likewise.
+	(avvi4i4i2_insn): Likewise.
+	(vvi4i4_insn): Likewise.
+	(avvi4i4_insn): Likewise.
+	(pvi4i2_insn): Likewise.
+	(apvi4i2_insn): Likewise.
+	(vvi4i4i4_insn): Likewise.
+	(avvi4i4i4_insn): Likewise.
+	(mma_<vv>): On DMF systems, emit the DMF instruction name instead of the
+	MMF instruction name.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>"): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+
 ==================== dmf001, patch #12
 
 Document wD constraint.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:547e18bd87b1d88fdbdba3c85b333bcac3cd65ad

commit 547e18bd87b1d88fdbdba3c85b333bcac3cd65ad
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Oct 14 20:05:45 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 2016b4793a2..65b9f7e5652 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,39 @@
+==================== dmf001, patch #12
+
+Document wD constraint.
+
+2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* doc/md.texi (PowerPC constraints): Document the wD constraint.
+
+==================== dmf001, patch #11
+
+Change mma_fpr to not_dmf.
+
+2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (mma_<vv>): Use isa attribute 'not_dmf' instead
+	of 'mma_fpr'.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>"): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/rs6000.md (isa attribute): Rename mma_fpr to not_dmf.
+	(enabled attribute): Likewise.
+
 ==================== dmf001, patch #10, patch reverted.
 
 ==================== dmf001, patch #9

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:fbea3374246c844d117848ac865fd12cc94fbd8b

commit fbea3374246c844d117848ac865fd12cc94fbd8b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Oct 14 13:36:29 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 44 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index eb51fd476f3..11f48eb01fd 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,47 @@
+==================== dmf001, patch #10
+
+Make wD switch between FPRs and DMFs.
+
+2022-10-14   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* constraints.md (wD): Change wD to be FPR registers for power10 and DMF
+	registers for DMF systems.
+	* config/rs6000/mma.md (vvi4i4i8_insn): New int attribute.
+	(avvi4i4i8_insn): Likewise.
+	(vvi4i4i2_insn): Likewise.
+	(avvi4i4i2_insn): Likewise.
+	(vvi4i4_insn): Likewise.
+	(avvi4i4_insn): Likewise.
+	(pvi4i2_insn): Likewise.
+	(apvi4i2_insn): Likewise.
+	(vvi4i4i4_insn): Likewise.
+	(avvi4i4i4_insn): Likewise.
+	(mma_<vv>): Use wD constraint for accumulator inputs and outputs.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/s6000.cc (rs6000_debug_reg_global): Print what register
+	class wD implements.
+	(rs6000_init_hard_regno_mode_ok): Set up to make wD constraint choose
+	DMF accumualators on DMF systems and FPR registers on MMA systems
+	without DMF.
+	(print_operand): Add %d<n> output modifier, to print 'dm' or nothing to
+	switch MMA instructions being generated.
+	* config/rs6000/rs6000.h (enum rs6000_reg_class_enum): Add wD option.
+	* doc/md.texi (PowerPC constraints): Document the wD constraint.
+
 ==================== dmf001, patch #9
 
 Use MMA instruction instead of the renamed DMF instruction.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:a9c17cd40b87e8d69d20d998353af861a781a1d9

commit a9c17cd40b87e8d69d20d998353af861a781a1d9
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Oct 13 13:59:34 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-13   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3157bf1aedd..eb51fd476f3 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,38 @@
+==================== dmf001, patch #9
+
+Use MMA instruction instead of the renamed DMF instruction.
+
+2022-10-13   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (vvi4i4i8_dmf): Delete.
+	(avvi4i4i8_dmf): Likewise.
+	(vvi4i4i2_dmf): Likewise.
+	(avvi4i4i2_dmf): Likewise.
+	(vvi4i4_dmf): Likewise.
+	(avvi4i4_dmf): Likewise.
+	(pvi4i2_dmf): Likewise.
+	(apvi4i2_dmf): Likewise.
+	(vvi4i4i4_dmf): Likewise.
+	(avvi4i4i4_dmf): Likewise.
+	(mma_<vv>): Use MMA instruction instead of the renamed DMF
+	instruction.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4>): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2>): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+	* config/rs6000/rs6000.cc (print_operand): Rework %A error message.
+
 ==================== dmf001, patch #8
 
 Switch to DMF syntax and DMR for all MMA operations.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:eb0362095d098f6185c3746d15f7bd9593091e80

commit eb0362095d098f6185c3746d15f7bd9593091e80
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 11 22:32:51 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a7c1eaa578e..3157bf1aedd 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,45 @@
+==================== dmf001, patch #8
+
+Switch to DMF syntax and DMR for all MMA operations.
+
+2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (vvi4i4i8_dmf): New int attribute.
+	(avvi4i4i8_dmf): Likewise.
+	(vvi4i4i2_dmf): Likewise.
+	(avvi4i4i2_dmf): Likewise.
+	(vvi4i4_dmf): Likewise.
+	(avvi4i4_dmf): Likewise.
+	(pvi4i2_dmf): Likewise.
+	(apvi4i2_dmf): Likewise.
+	(vvi4i4i4_dmf): Likewise.
+	(avvi4i4i4_dmf): Likewise.
+	(movxo_dmf): Spell dmxxextfmdr512 correctly.
+	(mma_assemble_acc_dmf): Likewise.
+	(mma_disassemble_acc_dmf): Likewise.
+	(mma_<acc>): Change from using fpr_reg_operand in expand to just
+	register_operand.  Limit insn to just non-DMF case.
+	(mma_xxsetaccz): Break into 2 insns, depending on non-DMF vs. DMF.
+	(mma_xxsetaccz_p10): Rename from mma_xxsetaccz.
+	(mma_xxsetaccz_dmf): Use normal UNSPEC for DMF, not UNSPEC_VOLATILE.
+	(mma_<vv>): Add support for running on DMF systems, generating the DMF
+	instruction and using the DMF accumulator.
+	(mma_<avv>): Likewise.
+	(mma_<pv>): Likewise.
+	(mma_<apv>): Likewise.
+	(mma_<vvi4i4i8>): Likewise.
+	(mma_<avvi4i4i8>): Likewise.
+	(mma_<vvi4i4i2>): Likewise.
+	(mma_<avvi4i4i2>): Likewise.
+	(mma_<vvi4i4>): Likewise.
+	(mma_<avvi4i4): Likewise.
+	(mma_<pvi4i2>): Likewise.
+	(mma_<apvi4i2): Likewise.
+	(mma_<vvi4i4i4>): Likewise.
+	(mma_<avvi4i4i4>): Likewise.
+
 ==================== dmf001, patch #7
 
 Implement DMF mma_assemble_acc and mma_disassemble_acc

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:6c1bdb469aa5419c5205ad7bd24d3299d8d9a0d1

commit 6c1bdb469aa5419c5205ad7bd24d3299d8d9a0d1
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 11 19:19:15 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d86dcb4e079..a7c1eaa578e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,31 @@
+==================== dmf001, patch #7
+
+Implement DMF mma_assemble_acc and mma_disassemble_acc
+
+2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (UNSPEC_MMA_ASSEMBLE_ACC_DMF): New unspec.
+	(movxo_dmf): Use 'mma' type, not 'vecmove'.
+	(mma_assemble_acc): Split handling for non-DMF and DMF usage.
+	(mma_assemble_acc_p10): Rename from mma_assemble_acc to handle non-DMF
+	case.
+	(mma_assemble_acc_dmf): Build the accumulator from two vector pairs.
+	(mma_disassemble_acc_p10): Rename from mma_disassemble_acc to handle non-DMF
+	case.
+	(mma_disassemble_acc_dmf): Implement on DMF to use dmxxexttdmr256.
+
+==================== dmf001, patch #6
+
+Add accumulator_operand.
+
+2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/predicates.md (accumulator_operand): New predicate.
+
 ==================== dmf001, patch #5
 
 Make %A warn about not using accumulators.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:6b5cc56f1460f9b83f8548aa681e2348dda30c13

commit 6b5cc56f1460f9b83f8548aa681e2348dda30c13
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 11 12:02:12 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index dece9f67a91..d86dcb4e079 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,24 @@
+==================== dmf001, patch #5
+
+Make %A warn about not using accumulators.
+
+2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (print_operand): Under -mdmf, for output
+          modifier %A, make sure the argument is an accumulator.
+
+==================== dmf001, patch #4
+
+Fix dmxxextdmr512 order.
+
+2022-10-11   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movxo_dmf): Updat operand order.
+
 ==================== dmf001, patch #3
 
 Add initial DMR register support for XOmode.

[gcc(refs/users/meissner/heads/dmf001)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:e79b6684d4f2074fcfcb72d0010bb4c0789b77f8

commit e79b6684d4f2074fcfcb72d0010bb4c0789b77f8
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Oct 10 17:51:42 2022 -0400

    Update ChangeLog.meissner.
    
    2022-10-10   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 107 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 107 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a0706e92964..dc19dd754a6 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,110 @@
+==================== dmf001, patch #3
+
+Add initial DMR register support for XOmode.
+
+2022-10-10   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movxo_p10): Rename from movxo, and limit its use
+	to non-DMF systems.
+	(movxo_dmf): New insn.
+	(mma_<acc>): NOP prime/de-prime usage when -mdmf is used.
+	* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow
+	XOmode in DMR registers or Altivec registers if -mdmf.
+	(rs6000_setup_reg_addr_masks): Add support to allow TDOmode in DMF
+	registers, and also in Altivec registers if -mdmf.  TDOmode registers
+	can do offset addressing but not indexed addressing.
+	(rs6000_init_hard_regno_mode_ok): Add support for TDOmode.
+	(reg_offset_addressing_ok_p): Likewise.
+	(rs6000_emit_move): Warn about using SUBREGs with TDOmode.
+	(rs6000_preferred_reload_class): DMF registers can't be loaded or
+	stored.  With -mdmf, XOmode can go in Altivec registers.  TDOmode needs
+	to use VSX registers for load/store.
+	(rs6000_compute_pressure_classes): Add DMF registers to the pressure
+	classses.
+	(rs6000_split_multireg_move): If -mdmf, we don't need to prime or
+	de-prime the acculators.  Add initial support for TDOmode.
+	(rs6000_invalid_conversion): Warn about converting __dmr types.
+	* config/rs6000/rs6000.h (DMF_REG_CLASS_P): New macro.
+
+==================== dmf001, patch #2
+
+Add initial DMR register support.
+
+2022-10-07   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/constraints.md (wD): New constraint.
+	* config/rs6000/predicates.md (dmf_operand): New predicate.
+	* config/rs6000/rs6000-modes.def (TDOmode): New opaque mode.
+	* config/rs6000/rs6000.cc (rs6000_reg_type): Add support for DMF
+	registers.
+	(rs6000_reload_reg_type): Likewise.
+	(LAST_RELOAD_REG_CLASS): Likewise.
+	(reload_reg_map): Likewise.
+	(addr_mask_type): Grow to 16 bits.
+	(RELOAD_REG_NO_MEMORY): New RELOAD_REG macro.
+	(rs6000_reg_names): Add DMR registers.
+	(alt_reg_names): Likewise.
+	(rs6000_hard_regno_nregs_internal): Add support for DMF registers.
+	(rs6000_hard_regno_mode_ok_uncached): Likewise.
+	(rs6000_modes_tieable_p): Likewise.
+	(rs6000_debug_addr_mask): Likewise.
+	(rs6000_debug_reg_global): Likewise.
+	(rs6000_setup_reg_addr_masks): Likewise.
+	(rs6000_init_hard_regno_mode_ok): Likewise.
+	* config/rs6000/rs6000.h (UNITS_PER_DMF_WORD): New macro.
+	(FIRST_PSEUDO_REGISTER): Add support for DMF registers.
+	(FIXED_REGISTERS): Likewise.
+	(CALL_REALLY_USED_REGISTERS): Likewise.
+	(REG_ALLOC_ORDER): Likewise.
+	(DMF_REGNO_P): New macro.
+	(enum reg_class): Likewise.
+	(REG_CLASS_NAMES): Likewise.
+	(REG_CLASS_CONTENTS): Likewise.
+	(REGISTER_NAMES): Likewise.
+	(ADDITIONAL_REGISTER_NAMES): Likewise.
+	* config/rs6000/rs6000.md (FIRST_DMF_REGNO): New constant.
+	(LAST_DMF_REGNO): New constant.
+	(isa attribute): Add dmf and mma_fpr attributes.
+	(enabled attribute): Add support for dmf and mma_fpr attributes.
+
+==================== dmf001, patch #3
+
+Add -mcpu=future/-mdmf instrastructure.
+
+2022-10-07   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+	__DMF__ if dmf support is enabled.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): New macro.
+	(POWERPC_MASKS): Add -mblock-ops-vector-pair and -mdmf.
+	(future cpu): Add -mcpu=future and -mtune=future support.
+	* config/rs6000/rs6000-opts.h (processor_type): Add PROCESSOR_FUTURE.
+	* config/rs6000/rs6000-tables.op: Regenerate.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Add
+	-mcpu=future and -mtune=future support, but for now make them mostly
+	equivalent to power10.  Add -mdmf checking.
+	(rs6000_machine_from_flags): Likewise.
+	(rs6000_reassociation_width): Likewise.
+	(rs6000_adjust_cost): Likewise.
+	(rs6000_issue_rate): Likewise.
+	(rs6000_sched_reorder): Likewise.
+	(rs6000_sched_reorder2): Likewise.
+	(rs6000_register_move_cost): Likewise.
+	(rs6000_opt_masks): Add -mdmf.
+	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add -mcpu=future support.
+	* config/rs6000/rs6000.md (cpu attribute): Add future.
+	(isa attribute): Add dmf.
+	(enabled attribute): Likewise.
+	* config/rs6000/rs6000.opt (-mdmf): New option.
+
+==================== dmf001, base line
+
 2022-10-06   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch