[gcc(refs/users/meissner/heads/work119)] Update ChangeLog.*

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:c5af745c7de80750d4c2e769a5bda1705b8ebe4c

commit c5af745c7de80750d4c2e769a5bda1705b8ebe4c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Apr 17 16:02:48 2023 -0400

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.meissner | 99 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 99 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index bf4cb40ab10..49592e20a32 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,102 @@
+==================== Branch work119, patch #21 ====================
+
+Improve 64->128 bit zero extension on PowerPC
+
+2023-04-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/108958
+	* gcc/config/rs6000.md (zero_extendditi2): New insn.
+
+gcc/testsuite/
+
+	PR target/108958
+	* gcc.target/powerpc/zero-extend-di-ti.c: New test.
+
+==================== Branch work119, patch #20 ====================
+
+Fix splat of extract for long long and double.
+
+2023-04-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/99293
+	* gcc/config/rs6000/vsx.md (vsx_splat_extract_<mode>): New combiner
+	insn.
+
+gcc/testsuite/
+
+	PR target/108958
+	* gcc.target/powerpc/pr99293.c: New test.
+	* gcc.target/powerpc/builtins-1.c: Update insn count.
+
+
+==================== Branch work119, patch #1 ====================
+
+Make load/cmp fusion know about prefixed loads.
+
+I posted a version of patch on March 21st and a second version on March 24th.
+This patch makes some code changes suggested in the genfusion.pl code from the
+last 2 patch submissions.  The fusion.md that is produced by genfusion.pl is
+the same in all 3 versions.
+
+I changed the genfusion.pl to match the suggestion for code layout.  I also
+used the correct comment for each of the instructions (in the 2nd patch, the
+when I rewrote the comments about ld and lwa being DS format instructions, I
+had put the ld comment in the section handling lwa, and vice versa).
+
+I also removed lp64 from the new test.  When I first added the prefixed code,
+it was only done for 64-bit, but now it is allowed for 32-bit.  However, the
+case that shows up (lwa) would not hit in 32-bit, since it only generates lwz
+and not lwa.  It also would not generate ld.  But the test does pass when it is
+built with -m32.
+
+The issue with the bug is the power10 load GPR + cmpi -1/0/1 fusion
+optimization generates illegal assembler code.
+
+Ultimately the code was dying because the fusion load + compare -1/0/1 patterns
+did not handle the possibility that the load might be prefixed.
+
+The main cause is the constraints for the individual loads in the fusion did not
+match the machine.  In particular, LWA is a ds format instruction when it is
+unprefixed.  The code did not also set the prefixed attribute correctly.
+
+This patch rewrites the genfusion.pl script so that it will have more accurate
+constraints for the LWA and LD instructions (which are DS instructions).  The
+updated genfusion.pl was then run to update fusion.md.  Finally, the code for
+the "prefixed" attribute is modified so that it considers load + compare
+immediate patterns to be like the normal load insns in checking whether
+operand[1] is a prefixed instruction.
+
+I have tested this code on a power9 little endian system (with long double
+being IEEE 128-bit and IBM 128-bit), a power10 little endian system, and a
+power8 big endian system, testing both 32-bit and 64-bit code generation.  Can
+I put this code into the master branch, and after a waiting period, apply it to
+the GCC 12 and GCC 11 branches (the bug does show up in those branches, and the
+patch applies without change).
+
+2023-04-17   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	PR target/105325
+	* gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Improve generation
+	of the ld and lwa instructions which use the DS encoding instead of D.
+	Use the YZ constraint for these loads.	Handle prefixed loads better.
+	Set the sign_extend attribute as appropriate.
+	* gcc/config/rs6000/fusion.md: Regenerate.
+	* gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi
+	instructions to the list of instructions that might have a prefixed load
+	instruction.
+
+gcc/testsuite/
+
+	PR target/105325
+	* g++.target/powerpc/pr105325.C: New test.
+	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust insn counts.
+
 ==================== Branch work119, baseline ====================
 
 2023-04-17   Michael Meissner  <meissner@linux.ibm.com>