public inbox for gcc-cvs@sourceware.org help / color / mirror / Atom feed
From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Allow consant element vec_extract to be loaded into vector registers. Date: Fri, 28 Apr 2023 18:08:25 +0000 (GMT) [thread overview] Message-ID: <20230428180825.B41473857731@sourceware.org> (raw) https://gcc.gnu.org/g:ab2977bdf39f57e12321b53c1dcb3fc3e1b1a5fa commit ab2977bdf39f57e12321b53c1dcb3fc3e1b1a5fa Author: Michael Meissner <meissner@linux.ibm.com> Date: Fri Apr 28 14:08:08 2023 -0400 Allow consant element vec_extract to be loaded into vector registers. This patch allows vec_extract of V4SI, V8HI, and V16QI vector types with a constant element number to be loaded into vector registers directly. It also will be split before register allocation. In doing so, I restricted the optimization to only occur if the memory address did not use an Altivec style address with AND -16. 2023-04-28 Michael Meissner <meissner@linux.ibm.com> gcc/ * config/rs6000/vsx.md (VSX_EX_ISA): New mode attribute. (vsx_extract_<mode>_load): Allow vector registers to be loaded. Do insn split before register allocation. Restrict vector addresses to not use Altivec addressing. Diff: --- gcc/config/rs6000/vsx.md | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 42336bbf36b..ecf1279c95b 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -223,6 +223,12 @@ (V8HI "v") (V4SI "wa")]) +;; Mode attribute to give the isa constraint for accessing Altivec registers +;; with vector extract and insert operations. +(define_mode_attr VSX_EX_ISA [(V16QI "p9v") + (V8HI "p9v") + (V4SI "p8v")]) + ;; Mode iterator for binary floating types other than double to ;; optimize convert to that floating point type from an extract ;; of an integer type @@ -3971,23 +3977,26 @@ } [(set_attr "type" "mfvsr")]) -;; Optimize extracting a single scalar element from memory. +;; Extract a V16QI/V8HI/V4SI element from memory with a constant element +;; number. For vector registers, we require X-form addressing. (define_insn_and_split "*vsx_extract_<mode>_load" - [(set (match_operand:<VEC_base> 0 "register_operand" "=r") + [(set (match_operand:<VEC_base> 0 "register_operand" "=r,<VSX_EX>") (vec_select:<VEC_base> - (match_operand:VSX_EXTRACT_I 1 "memory_operand" "m") - (parallel [(match_operand:QI 2 "<VSX_EXTRACT_PREDICATE>" "n")]))) - (clobber (match_scratch:DI 3 "=&b"))] + (match_operand:VSX_EXTRACT_I 1 "memory_operand" "m,Q") + (parallel [(match_operand:QI 2 "<VSX_EXTRACT_PREDICATE>" "n,n")]))) + (clobber (match_scratch:DI 3 "=&b,&b"))] "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_DIRECT_MOVE_64BIT" "#" - "&& reload_completed" + "&& 1" [(set (match_dup 0) (match_dup 4))] { - operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], - operands[3], <VEC_base>mode); + operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], + operands[2], operands[3], + <VEC_base>mode); } - [(set_attr "type" "load") - (set_attr "length" "8")]) + [(set_attr "type" "load,fpload") + (set_attr "length" "8") + (set_attr "isa" "*,<VSX_EX_ISA>")]) ;; Variable V16QI/V8HI/V4SI extract from a register (define_insn_and_split "vsx_extract_<mode>_var"
next reply other threads:[~2023-04-28 18:08 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-04-28 18:08 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2023-04-29 3:11 Michael Meissner 2023-04-28 22:56 Michael Meissner 2023-04-28 22:36 Michael Meissner 2023-04-28 18:13 Michael Meissner 2023-04-27 22:03 Michael Meissner 2023-04-25 1:54 Michael Meissner 2023-04-24 23:20 Michael Meissner
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230428180825.B41473857731@sourceware.org \ --to=meissner@gcc.gnu.org \ --cc=gcc-cvs@gcc.gnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).