[PATCH v2 00/13] Address space support for x86

[PATCH v2 00/13] Address space support for x86

[Richard Henderson]

Changes since v1:

  * Documentation for __seg_* and __SEG_*.
  * Add a couple more test cases, suggested by comments on v1.
  * Fix operands_equal_p and cselib wrt address spaces.
  * Emit DW_AT_segment for x86 segments.

I think this includes all of the feedback from v1, except wrt
PR66768, which I'll probably defer to Bin Cheng in the end.


r~


Richard Henderson (13):
  Change default of non-overlapping address space conversion
  Relax ADDR_SPACE_GENERIC_P checks for default address space hooks
  i386: Handle address spaces in movabs patterns
  i386: Disallow address spaces with string insns
  i386: Add address spaces for fs/gs segments
  i386: Replace ix86_address_seg with addr_space_t
  i386: Add address space for tls
  Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
  Fix PR 66768
  Avoid CSE of MEMs in different address spaces
  Test case for conversion from __seg_tls:0
  Document the x86 address spaces
  Add hook for modifying debug info for address spaces

 gcc/config/i386/i386-c.c                     |   8 +
 gcc/config/i386/i386-protos.h                |   8 +-
 gcc/config/i386/i386.c                       | 317 +++++++++++++++++++--------
 gcc/config/i386/i386.h                       |   3 +-
 gcc/config/i386/i386.md                      |  91 ++++++--
 gcc/config/i386/predicates.md                |   8 +-
 gcc/config/i386/rdos.h                       |   2 +-
 gcc/cselib.c                                 |  22 +-
 gcc/doc/extend.texi                          |  46 +++-
 gcc/doc/tm.texi                              |  12 +
 gcc/doc/tm.texi.in                           |   4 +
 gcc/dwarf2out.c                              |  48 ++--
 gcc/expr.c                                   |  30 ++-
 gcc/fold-const.c                             |  20 +-
 gcc/gimple.c                                 |  12 +-
 gcc/target.def                               |  19 ++
 gcc/targhooks.c                              |  56 +++--
 gcc/targhooks.h                              |   2 +
 gcc/testsuite/gcc.target/i386/addr-space-1.c |  11 +
 gcc/testsuite/gcc.target/i386/addr-space-2.c |  11 +
 gcc/testsuite/gcc.target/i386/addr-space-3.c |  10 +
 gcc/tree-ssa-address.c                       |   2 +-
 22 files changed, 548 insertions(+), 194 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-3.c

-- 
2.4.3

[PATCH v2 11/13] Test case for conversion from __seg_tls:0

[Richard Henderson]

---
 gcc/testsuite/gcc.target/i386/addr-space-3.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-3.c

diff --git a/gcc/testsuite/gcc.target/i386/addr-space-3.c b/gcc/testsuite/gcc.target/i386/addr-space-3.c
new file mode 100644
index 0000000..63f1f03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/addr-space-3.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler "[fg]s:0" } } */
+
+void test(int *y)
+{
+  int *x = (int __seg_tls *)0;
+  if (x == y)
+    asm("");
+}
-- 
2.4.3

[PATCH v2 04/13] i386: Disallow address spaces with string insns

[Richard Henderson]

While cmps and movs allow a segment override of the ds:esi
source, the es:edi source/destination cannot be overriden.
Simplify things in the backend for now by disallowing
segments for string insns entirely.
---
 gcc/config/i386/i386-protos.h |  1 +
 gcc/config/i386/i386.c        | 61 ++++++++++++++++++++++++++++++++-----------
 gcc/config/i386/i386.md       | 59 +++++++++++++++++++++++++++++------------
 3 files changed, 89 insertions(+), 32 deletions(-)

diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 6a17ef4..5e46833 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -141,6 +141,7 @@ extern void ix86_split_ashr (rtx *, rtx, machine_mode);
 extern void ix86_split_lshr (rtx *, rtx, machine_mode);
 extern rtx ix86_find_base_term (rtx);
 extern bool ix86_check_movabs (rtx, int);
+extern bool ix86_check_no_addr_space (rtx);
 extern void ix86_split_idivmod (machine_mode, rtx[], bool);
 
 extern rtx assign_386_stack_local (machine_mode, enum ix86_stack_slot);
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c800145..8f2c0f2 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -10537,6 +10537,20 @@ ix86_check_movabs (rtx insn, int opnum)
   gcc_assert (MEM_P (mem));
   return volatile_ok || !MEM_VOLATILE_P (mem);
 }
+
+/* Return false if INSN contains a MEM with a non-default address space.  */
+bool
+ix86_check_no_addr_space (rtx insn)
+{
+  subrtx_var_iterator::array_type array;
+  FOR_EACH_SUBRTX_VAR (iter, array, PATTERN (insn), ALL)
+    {
+      rtx x = *iter;
+      if (MEM_P (x) && !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)))
+	return false;
+    }
+  return true;
+}
 \f
 /* Initialize the table of extra 80387 mathematical constants.  */
 
@@ -25660,7 +25674,7 @@ expand_set_or_movmem_constant_prologue (rtx dst, rtx *srcp, rtx destreg,
 /* Return true if ALG can be used in current context.  
    Assume we expand memset if MEMSET is true.  */
 static bool
-alg_usable_p (enum stringop_alg alg, bool memset)
+alg_usable_p (enum stringop_alg alg, bool memset, bool have_as)
 {
   if (alg == no_stringop)
     return false;
@@ -25669,12 +25683,19 @@ alg_usable_p (enum stringop_alg alg, bool memset)
   /* Algorithms using the rep prefix want at least edi and ecx;
      additionally, memset wants eax and memcpy wants esi.  Don't
      consider such algorithms if the user has appropriated those
-     registers for their own purposes.	*/
+     registers for their own purposes, or if we have a non-default
+     address space, since some string insns cannot override the segment.  */
   if (alg == rep_prefix_1_byte
       || alg == rep_prefix_4_byte
       || alg == rep_prefix_8_byte)
-    return !(fixed_regs[CX_REG] || fixed_regs[DI_REG]
-             || (memset ? fixed_regs[AX_REG] : fixed_regs[SI_REG]));
+    {
+      if (have_as)
+	return false;
+      if (fixed_regs[CX_REG]
+	  || fixed_regs[DI_REG]
+	  || (memset ? fixed_regs[AX_REG] : fixed_regs[SI_REG]))
+	return false;
+    }
   return true;
 }
 
@@ -25682,7 +25703,8 @@ alg_usable_p (enum stringop_alg alg, bool memset)
 static enum stringop_alg
 decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
 	    unsigned HOST_WIDE_INT min_size, unsigned HOST_WIDE_INT max_size,
-	    bool memset, bool zero_memset, int *dynamic_check, bool *noalign)
+	    bool memset, bool zero_memset, bool have_as,
+	    int *dynamic_check, bool *noalign)
 {
   const struct stringop_algs * algs;
   bool optimize_for_speed;
@@ -25714,7 +25736,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
   for (i = 0; i < MAX_STRINGOP_ALGS; i++)
     {
       enum stringop_alg candidate = algs->size[i].alg;
-      bool usable = alg_usable_p (candidate, memset);
+      bool usable = alg_usable_p (candidate, memset, have_as);
       any_alg_usable_p |= usable;
 
       if (candidate != libcall && candidate && usable)
@@ -25730,17 +25752,17 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
 
   /* If user specified the algorithm, honnor it if possible.  */
   if (ix86_stringop_alg != no_stringop
-      && alg_usable_p (ix86_stringop_alg, memset))
+      && alg_usable_p (ix86_stringop_alg, memset, have_as))
     return ix86_stringop_alg;
   /* rep; movq or rep; movl is the smallest variant.  */
   else if (!optimize_for_speed)
     {
       *noalign = true;
       if (!count || (count & 3) || (memset && !zero_memset))
-	return alg_usable_p (rep_prefix_1_byte, memset)
+	return alg_usable_p (rep_prefix_1_byte, memset, have_as)
 	       ? rep_prefix_1_byte : loop_1_byte;
       else
-	return alg_usable_p (rep_prefix_4_byte, memset)
+	return alg_usable_p (rep_prefix_4_byte, memset, have_as)
 	       ? rep_prefix_4_byte : loop;
     }
   /* Very tiny blocks are best handled via the loop, REP is expensive to
@@ -25763,7 +25785,8 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
 	    {
 	      enum stringop_alg candidate = algs->size[i].alg;
 
-	      if (candidate != libcall && alg_usable_p (candidate, memset))
+	      if (candidate != libcall
+		  && alg_usable_p (candidate, memset, have_as))
 		{
 		  alg = candidate;
 		  alg_noalign = algs->size[i].noalign;
@@ -25783,7 +25806,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
 		  else if (!any_alg_usable_p)
 		    break;
 		}
-	      else if (alg_usable_p (candidate, memset))
+	      else if (alg_usable_p (candidate, memset, have_as))
 		{
 		  *noalign = algs->size[i].noalign;
 		  return candidate;
@@ -25800,7 +25823,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
      choice in ix86_costs.  */
   if ((TARGET_INLINE_ALL_STRINGOPS || TARGET_INLINE_STRINGOPS_DYNAMICALLY)
       && (algs->unknown_size == libcall
-	  || !alg_usable_p (algs->unknown_size, memset)))
+	  || !alg_usable_p (algs->unknown_size, memset, have_as)))
     {
       enum stringop_alg alg;
 
@@ -25817,7 +25840,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
       if (max <= 0)
 	max = 4096;
       alg = decide_alg (count, max / 2, min_size, max_size, memset,
-			zero_memset, dynamic_check, noalign);
+			zero_memset, have_as, dynamic_check, noalign);
       gcc_assert (*dynamic_check == -1);
       if (TARGET_INLINE_STRINGOPS_DYNAMICALLY)
 	*dynamic_check = max;
@@ -25825,7 +25848,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size,
 	gcc_assert (alg != libcall);
       return alg;
     }
-  return (alg_usable_p (algs->unknown_size, memset)
+  return (alg_usable_p (algs->unknown_size, memset, have_as)
 	  ? algs->unknown_size : libcall);
 }
 
@@ -26031,6 +26054,7 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
   unsigned HOST_WIDE_INT max_size = -1;
   unsigned HOST_WIDE_INT probable_max_size = -1;
   bool misaligned_prologue_used = false;
+  bool have_as;
 
   if (CONST_INT_P (align_exp))
     align = INTVAL (align_exp);
@@ -26068,11 +26092,15 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
   if (count > (HOST_WIDE_INT_1U << 30))
     return false;
 
+  have_as = !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (dst));
+  if (!issetmem)
+    have_as |= !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (src));
+
   /* Step 0: Decide on preferred algorithm, desired alignment and
      size of chunks to be copied by main loop.  */
   alg = decide_alg (count, expected_size, min_size, probable_max_size,
 		    issetmem,
-		    issetmem && val_exp == const0_rtx,
+		    issetmem && val_exp == const0_rtx, have_as,
 		    &dynamic_check, &noalign);
   if (alg == libcall)
     return false;
@@ -26686,6 +26714,9 @@ ix86_expand_strlen (rtx out, rtx src, rtx eoschar, rtx align)
       /* Can't use this if the user has appropriated eax, ecx, or edi.  */
       if (fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
         return false;
+      /* Can't use this for non-default address spaces.  */
+      if (!ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (src)))
+	return false;
 
       scratch2 = gen_reg_rtx (Pmode);
       scratch3 = gen_reg_rtx (Pmode);
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ccb672d..2cb94fe 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -16159,6 +16159,10 @@
 	      (clobber (reg:CC FLAGS_REG))])]
   ""
 {
+  /* Can't use this for non-default address spaces.  */
+  if (!ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (operands[3])))
+    FAIL;
+
   rtx adjust = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[1])));
 
   /* If .md ever supports :P for Pmode, these can be directly
@@ -16199,7 +16203,8 @@
 	(plus:P (match_dup 3)
 		(const_int 8)))]
   "TARGET_64BIT
-   && !(fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+   && !(fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^movsq"
   [(set_attr "type" "str")
    (set_attr "memory" "both")
@@ -16214,7 +16219,8 @@
    (set (match_operand:P 1 "register_operand" "=S")
 	(plus:P (match_dup 3)
 		(const_int 4)))]
-  "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^movs{l|d}"
   [(set_attr "type" "str")
    (set_attr "memory" "both")
@@ -16229,7 +16235,8 @@
    (set (match_operand:P 1 "register_operand" "=S")
 	(plus:P (match_dup 3)
 		(const_int 2)))]
-  "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^movsw"
   [(set_attr "type" "str")
    (set_attr "memory" "both")
@@ -16245,7 +16252,8 @@
 	(plus:P (match_dup 3)
 		(const_int 1)))]
   "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])"
-  "%^movsb"
+  "%^movsb
+   && ix86_check_no_addr_space (insn)"
   [(set_attr "type" "str")
    (set_attr "memory" "both")
    (set (attr "prefix_rex")
@@ -16280,7 +16288,8 @@
 	(mem:BLK (match_dup 4)))
    (use (match_dup 5))]
   "TARGET_64BIT
-   && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+   && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} movsq"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16299,7 +16308,8 @@
    (set (mem:BLK (match_dup 3))
 	(mem:BLK (match_dup 4)))
    (use (match_dup 5))]
-  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} movs{l|d}"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16316,7 +16326,8 @@
    (set (mem:BLK (match_dup 3))
 	(mem:BLK (match_dup 4)))
    (use (match_dup 5))]
-  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} movsb"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16356,6 +16367,10 @@
 	      (clobber (reg:CC FLAGS_REG))])]
   ""
 {
+  /* Can't use this for non-default address spaces.  */
+  if (!ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (operands[1])))
+    FAIL;
+
   if (GET_MODE (operands[1]) != GET_MODE (operands[2]))
     operands[1] = adjust_address_nv (operands[1], GET_MODE (operands[2]), 0);
 
@@ -16391,7 +16406,8 @@
 		(const_int 8)))
    (unspec [(const_int 0)] UNSPEC_STOS)]
   "TARGET_64BIT
-   && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
+   && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^stosq"
   [(set_attr "type" "str")
    (set_attr "memory" "store")
@@ -16404,7 +16420,8 @@
 	(plus:P (match_dup 1)
 		(const_int 4)))
    (unspec [(const_int 0)] UNSPEC_STOS)]
-  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^stos{l|d}"
   [(set_attr "type" "str")
    (set_attr "memory" "store")
@@ -16417,7 +16434,8 @@
 	(plus:P (match_dup 1)
 		(const_int 2)))
    (unspec [(const_int 0)] UNSPEC_STOS)]
-  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^stosw"
   [(set_attr "type" "str")
    (set_attr "memory" "store")
@@ -16430,7 +16448,8 @@
 	(plus:P (match_dup 1)
 		(const_int 1)))
    (unspec [(const_int 0)] UNSPEC_STOS)]
-  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^stosb"
   [(set_attr "type" "str")
    (set_attr "memory" "store")
@@ -16462,7 +16481,8 @@
    (use (match_operand:DI 2 "register_operand" "a"))
    (use (match_dup 4))]
   "TARGET_64BIT
-   && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+   && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} stosq"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16479,7 +16499,8 @@
 	(const_int 0))
    (use (match_operand:SI 2 "register_operand" "a"))
    (use (match_dup 4))]
-  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} stos{l|d}"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16495,7 +16516,8 @@
 	(const_int 0))
    (use (match_operand:QI 2 "register_operand" "a"))
    (use (match_dup 4))]
-  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^rep{%;} stosb"
   [(set_attr "type" "str")
    (set_attr "prefix_rep" "1")
@@ -16616,7 +16638,8 @@
    (clobber (match_operand:P 0 "register_operand" "=S"))
    (clobber (match_operand:P 1 "register_operand" "=D"))
    (clobber (match_operand:P 2 "register_operand" "=c"))]
-  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^repz{%;} cmpsb"
   [(set_attr "type" "str")
    (set_attr "mode" "QI")
@@ -16656,7 +16679,8 @@
    (clobber (match_operand:P 0 "register_operand" "=S"))
    (clobber (match_operand:P 1 "register_operand" "=D"))
    (clobber (match_operand:P 2 "register_operand" "=c"))]
-  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^repz{%;} cmpsb"
   [(set_attr "type" "str")
    (set_attr "mode" "QI")
@@ -16697,7 +16721,8 @@
 		   (match_operand:P 4 "register_operand" "0")] UNSPEC_SCAS))
    (clobber (match_operand:P 1 "register_operand" "=D"))
    (clobber (reg:CC FLAGS_REG))]
-  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])"
+  "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])
+   && ix86_check_no_addr_space (insn)"
   "%^repnz{%;} scasb"
   [(set_attr "type" "str")
    (set_attr "mode" "QI")
-- 
2.4.3

[PATCH v2 05/13] i386: Add address spaces for fs/gs segments

[Richard Henderson]

---
 gcc/config/i386/i386-c.c                     |   6 +
 gcc/config/i386/i386-protos.h                |   3 +
 gcc/config/i386/i386.c                       | 176 +++++++++++++++++----------
 gcc/testsuite/gcc.target/i386/addr-space-1.c |  11 ++
 4 files changed, 131 insertions(+), 65 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-1.c

diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index a3c0342..3f28f6c 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -586,6 +586,9 @@ ix86_target_macros (void)
 			       ix86_tune,
 			       ix86_fpmath,
 			       cpp_define);
+
+  cpp_define (parse_in, "__SEG_FS");
+  cpp_define (parse_in, "__SEG_GS");
 }
 
 \f
@@ -600,6 +603,9 @@ ix86_register_pragmas (void)
   /* Update pragma hook to allow parsing #pragma GCC target.  */
   targetm.target_option.pragma_parse = ix86_pragma_target_parse;
 
+  c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
+  c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
+
 #ifdef REGISTER_SUBTARGET_PRAGMAS
   REGISTER_SUBTARGET_PRAGMAS ();
 #endif
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 5e46833..f942ef5 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -326,3 +326,6 @@ struct ix86_first_cycle_multipass_data_
 # define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DATA_T	\
   struct ix86_first_cycle_multipass_data_
 #endif /* RTX_CODE */
+
+const addr_space_t ADDR_SPACE_SEG_FS = 1;
+const addr_space_t ADDR_SPACE_SEG_GS = 2;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8f2c0f2..5f2fc04 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -79,6 +79,7 @@ along with GCC; see the file COPYING3.  If not see
 static rtx legitimize_dllimport_symbol (rtx, bool);
 static rtx legitimize_pe_coff_extern_decl (rtx, bool);
 static rtx legitimize_pe_coff_symbol (rtx, bool);
+static void ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t);
 
 #ifndef CHECK_STACK_LIMIT
 #define CHECK_STACK_LIMIT (-1)
@@ -17123,32 +17124,22 @@ ix86_print_operand (FILE *file, rtx x, int code)
 
   else if (MEM_P (x))
     {
-      /* No `byte ptr' prefix for call instructions or BLKmode operands.  */
-      if (ASSEMBLER_DIALECT == ASM_INTEL && code != 'X' && code != 'P'
-	  && GET_MODE (x) != BLKmode)
+      rtx addr = XEXP (x, 0);
+
+      /* Avoid (%rip) for call operands.  */
+      if (code == 'P' && CONSTANT_ADDRESS_P (x) && !CONST_INT_P (x))
 	{
-	  const char * size;
-	  switch (GET_MODE_SIZE (GET_MODE (x)))
-	    {
-	    case 1: size = "BYTE"; break;
-	    case 2: size = "WORD"; break;
-	    case 4: size = "DWORD"; break;
-	    case 8: size = "QWORD"; break;
-	    case 12: size = "TBYTE"; break;
-	    case 16:
-	      if (GET_MODE (x) == XFmode)
-		size = "TBYTE";
-              else
-		size = "XMMWORD";
-              break;
-	    case 32: size = "YMMWORD"; break;
-	    case 64: size = "ZMMWORD"; break;
-	    default:
-	      gcc_unreachable ();
-	    }
+	  output_addr_const (file, addr);
+	  return;
+	}
+
+      /* No `byte ptr' prefix for call instructions ... */
+      if (ASSEMBLER_DIALECT == ASM_INTEL && code != 'X' && code != 'P')
+	{
+	  machine_mode mode = GET_MODE (x);
+	  const char *size;
 
-	  /* Check for explicit size override (codes 'b', 'w', 'k',
-	     'q' and 'x')  */
+	  /* Check for explicit size override codes.  */
 	  if (code == 'b')
 	    size = "BYTE";
 	  else if (code == 'w')
@@ -17159,20 +17150,39 @@ ix86_print_operand (FILE *file, rtx x, int code)
 	    size = "QWORD";
 	  else if (code == 'x')
 	    size = "XMMWORD";
-
-	  fputs (size, file);
-	  fputs (" PTR ", file);
+	  else if (mode == BLKmode)
+	    /* ... or BLKmode operands, when not overridden.  */
+	    size = NULL;
+	  else
+	    switch (GET_MODE_SIZE (mode))
+	      {
+	      case 1: size = "BYTE"; break;
+	      case 2: size = "WORD"; break;
+	      case 4: size = "DWORD"; break;
+	      case 8: size = "QWORD"; break;
+	      case 12: size = "TBYTE"; break;
+	      case 16:
+		if (mode == XFmode)
+		  size = "TBYTE";
+		else
+		  size = "XMMWORD";
+		break;
+	      case 32: size = "YMMWORD"; break;
+	      case 64: size = "ZMMWORD"; break;
+	      default:
+		gcc_unreachable ();
+	      }
+	  if (size)
+	    {
+	      fputs (size, file);
+	      fputs (" PTR ", file);
+	    }
 	}
 
-      x = XEXP (x, 0);
-      /* Avoid (%rip) for call operands.  */
-      if (CONSTANT_ADDRESS_P (x) && code == 'P'
-	  && !CONST_INT_P (x))
-	output_addr_const (file, x);
-      else if (this_is_asm_operands && ! address_operand (x, VOIDmode))
+      if (this_is_asm_operands && ! address_operand (addr, VOIDmode))
 	output_operand_lossage ("invalid constraints for operand");
       else
-	output_address (x);
+	ix86_print_operand_address_as (file, addr, MEM_ADDR_SPACE (x));
     }
 
   else if (CONST_DOUBLE_P (x) && GET_MODE (x) == SFmode)
@@ -17257,7 +17267,7 @@ ix86_print_operand_punct_valid_p (unsigned char code)
 /* Print a memory operand whose address is ADDR.  */
 
 static void
-ix86_print_operand_address (FILE *file, rtx addr)
+ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t as)
 {
   struct ix86_address parts;
   rtx base, index, disp;
@@ -17310,18 +17320,22 @@ ix86_print_operand_address (FILE *file, rtx addr)
   disp = parts.disp;
   scale = parts.scale;
 
-  switch (parts.seg)
+  if (ADDR_SPACE_GENERIC_P (as))
+    as = parts.seg;
+  else
+    gcc_assert (ADDR_SPACE_GENERIC_P (parts.seg));
+
+  if (!ADDR_SPACE_GENERIC_P (as))
     {
-    case SEG_DEFAULT:
-      break;
-    case SEG_FS:
-    case SEG_GS:
-      if (ASSEMBLER_DIALECT == ASM_ATT)
-	putc ('%', file);
-      fputs ((parts.seg == SEG_FS ? "fs:" : "gs:"), file);
-      break;
-    default:
-      gcc_unreachable ();
+      const char *string;
+
+      if (as == ADDR_SPACE_SEG_FS)
+	string = (ASSEMBLER_DIALECT == ASM_ATT ? "%fs:" : "fs:");
+      else if (as == ADDR_SPACE_SEG_GS)
+	string = (ASSEMBLER_DIALECT == ASM_ATT ? "%gs:" : "gs:");
+      else
+	gcc_unreachable ();
+      fputs (string, file);
     }
 
   /* Use one byte shorter RIP relative addressing for 64bit mode.  */
@@ -17480,6 +17494,12 @@ ix86_print_operand_address (FILE *file, rtx addr)
     }
 }
 
+static void
+ix86_print_operand_address (FILE *file, rtx addr)
+{
+  ix86_print_operand_address_as (file, addr, ADDR_SPACE_GENERIC);
+}
+
 /* Implementation of TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA.  */
 
 static bool
@@ -27253,25 +27273,35 @@ ix86_attr_length_address_default (rtx_insn *insn)
 
   extract_insn_cached (insn);
   for (i = recog_data.n_operands - 1; i >= 0; --i)
-    if (MEM_P (recog_data.operand[i]))
-      {
-        constrain_operands_cached (insn, reload_completed);
-        if (which_alternative != -1)
-	  {
-	    const char *constraints = recog_data.constraints[i];
-	    int alt = which_alternative;
-
-	    while (*constraints == '=' || *constraints == '+')
-	      constraints++;
-	    while (alt-- > 0)
-	      while (*constraints++ != ',')
-		;
-	    /* Skip ignored operands.  */
-	    if (*constraints == 'X')
-	      continue;
-	  }
-	return memory_address_length (XEXP (recog_data.operand[i], 0), false);
-      }
+    {
+      rtx op = recog_data.operand[i];
+      if (MEM_P (op))
+	{
+	  constrain_operands_cached (insn, reload_completed);
+	  if (which_alternative != -1)
+	    {
+	      const char *constraints = recog_data.constraints[i];
+	      int alt = which_alternative;
+
+	      while (*constraints == '=' || *constraints == '+')
+		constraints++;
+	      while (alt-- > 0)
+	        while (*constraints++ != ',')
+		  ;
+	      /* Skip ignored operands.  */
+	      if (*constraints == 'X')
+		continue;
+	    }
+
+	  int len = memory_address_length (XEXP (op, 0), false);
+
+	  /* Account for segment prefix for non-default addr spaces.  */
+	  if (!ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (op)))
+	    len++;
+
+	  return len;
+	}
+    }
   return 0;
 }
 
@@ -53624,6 +53654,22 @@ ix86_operands_ok_for_move_multiple (rtx *operands, bool load,
   return true;
 }
 
+/* Address space support.
+
+   This is not "far pointers" in the 16-bit sense, but an easy way
+   to use %fs and %gs segment prefixes.  Therefore:
+
+    (a) All address spaces have the same modes,
+    (b) All address spaces have the same addresss forms,
+    (c) While %fs and %gs are technically subsets of the generic
+        address space, they are probably not subsets of each other.
+    (d) Since we have no access to the segment base register values
+        without resorting to a system call, we cannot convert a
+        non-default address space to a default address space.
+        Therefore we do not claim %fs or %gs are subsets of generic.
+
+   Therefore, we need not override any of the address space hooks.  */
+
 /* Initialize the GCC target structure.  */
 #undef TARGET_RETURN_IN_MEMORY
 #define TARGET_RETURN_IN_MEMORY ix86_return_in_memory
diff --git a/gcc/testsuite/gcc.target/i386/addr-space-1.c b/gcc/testsuite/gcc.target/i386/addr-space-1.c
new file mode 100644
index 0000000..1e13147
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/addr-space-1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler "movl\[ \t\]%gs:\\((%eax|%rax)\\), %eax" } } */
+
+extern __seg_gs int *call_me (void);
+
+int
+read_seg_gs (void)
+{
+  return *call_me();
+}
-- 
2.4.3

[PATCH v2 12/13] Document the x86 address spaces

[Richard Henderson]

---
 gcc/doc/extend.texi | 46 ++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index bdbf513..677a4d4 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -1240,8 +1240,8 @@ As an extension, GNU C supports named address spaces as
 defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
 address spaces in GCC will evolve as the draft technical report
 changes.  Calling conventions for any target might also change.  At
-present, only the AVR, SPU, M32C, and RL78 targets support address
-spaces other than the generic address space.
+present, only the AVR, SPU, M32C, RL78, and i386/x86_64 targets support
+address spaces other than the generic address space.
 
 Address space identifiers may be used exactly like any other C type
 qualifier (e.g., @code{const} or @code{volatile}).  See the N1275
@@ -1430,6 +1430,48 @@ It may use runtime library
 support, or generate special machine instructions to access that address
 space.
 
+@subsection X86 Named Address Spaces
+
+On the i386/x86_64 target, variables may be declared as being relative
+to the @code{%fs} or @code{%gs} segments.
+
+@table @code
+@item __seg_fs
+@itemx __seg_gs
+@cindex @code{__seg_fs} X86 Named Address Spaces
+@cindex @code{__seg_gs} X86 Named Address Spaces
+The object is accessed with the respective segment override prefix.
+
+The respective segment base must be set via some operating-system
+specific method.  Since an operating-system specific method would
+also be required to find the segment base, these address spaces are
+not considered to be subspaces of the generic (flat) address space.
+This means that explicit casts are required to convert pointers
+between these address spaces and the generic address space.  In
+practice one will need to cast to @code{uintptr_t} and apply the
+segment base offset known to the application.
+
+The preprocessor symbols @code{__SEG_FS} and @code{__SEG_GS} are
+defined when these address spaces are supported.
+
+@item __seg_tls
+@cindex @code{__seg_tls} X86 Named Address Spaces
+Some operating systems define either the @code{%fs} or @code{%gs}
+segment as the thread-local storage base for each thread.  Objects
+within this address space are accessed with the appropriate
+segment override prefix.
+
+The pointer located at address 0 within the segment contains the
+offset of the segment within the generic address space.  Thus this
+address space is considered a subspace of the generic address space,
+and the known segment offset is applied when converting addresses
+to and from the generic address space.
+
+The preprocessor symbol @code{__SEG_TLS} is defined when this
+address space is supported.
+
+@end table
+
 @node Zero Length
 @section Arrays of Length Zero
 @cindex arrays of length zero
-- 
2.4.3

[PATCH v2 07/13] i386: Add address space for tls

[Richard Henderson]

---
 gcc/config/i386/i386-c.c      |  2 ++
 gcc/config/i386/i386-protos.h |  1 +
 gcc/config/i386/i386.c        | 39 ++++++++++++++++++++++++++++++++++++++-
 3 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 3f28f6c..e3a3012 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -589,6 +589,7 @@ ix86_target_macros (void)
 
   cpp_define (parse_in, "__SEG_FS");
   cpp_define (parse_in, "__SEG_GS");
+  cpp_define (parse_in, "__SEG_TLS");
 }
 
 \f
@@ -605,6 +606,7 @@ ix86_register_pragmas (void)
 
   c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
   c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
+  c_register_addr_space ("__seg_tls", ADDR_SPACE_SEG_TLS);
 
 #ifdef REGISTER_SUBTARGET_PRAGMAS
   REGISTER_SUBTARGET_PRAGMAS ();
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 4e6d9ad..026b778 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -328,3 +328,4 @@ struct ix86_first_cycle_multipass_data_
 
 const addr_space_t ADDR_SPACE_SEG_FS = 1;
 const addr_space_t ADDR_SPACE_SEG_GS = 2;
+const addr_space_t ADDR_SPACE_SEG_TLS = 3;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7647090..ec19a57 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -17329,6 +17329,8 @@ ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t as)
     {
       const char *string;
 
+      if (as == ADDR_SPACE_SEG_TLS)
+	as = DEFAULT_TLS_SEG_REG;
       if (as == ADDR_SPACE_SEG_FS)
 	string = (ASSEMBLER_DIALECT == ASM_ATT ? "%fs:" : "fs:");
       else if (as == ADDR_SPACE_SEG_GS)
@@ -53667,8 +53669,43 @@ ix86_operands_ok_for_move_multiple (rtx *operands, bool load,
         without resorting to a system call, we cannot convert a
         non-default address space to a default address space.
         Therefore we do not claim %fs or %gs are subsets of generic.
+    (e) However, __seg_tls uses UNSPEC_TP as the base (which itself is
+	stored at __seg_tls:0) so we can map between tls and generic.  */
 
-   Therefore, we need not override any of the address space hooks.  */
+static bool
+ix86_addr_space_subset_p (addr_space_t subset, addr_space_t superset)
+{
+    return (subset == superset
+	    || (superset == ADDR_SPACE_GENERIC
+		&& subset == ADDR_SPACE_SEG_TLS));
+}
+#undef TARGET_ADDR_SPACE_SUBSET_P
+#define TARGET_ADDR_SPACE_SUBSET_P ix86_addr_space_subset_p
+
+static rtx
+ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
+{
+  addr_space_t from_as = TYPE_ADDR_SPACE (TREE_TYPE (from_type));
+  addr_space_t to_as = TYPE_ADDR_SPACE (TREE_TYPE (to_type));
+
+  /* Conversion between SEG_TLS and GENERIC is handled by adding or
+     subtracting the thread pointer.  */
+  if ((from_as == ADDR_SPACE_GENERIC && to_as == ADDR_SPACE_SEG_TLS)
+      || (from_as == ADDR_SPACE_SEG_TLS && to_as == ADDR_SPACE_GENERIC))
+    {
+      machine_mode mode = GET_MODE (op);
+      if (mode == VOIDmode)
+	mode = ptr_mode;
+      rtx tp = get_thread_pointer (mode, optimize || mode != ptr_mode);
+      return expand_binop (mode, (to_as == ADDR_SPACE_GENERIC
+				  ? add_optab : sub_optab),
+			   op, tp, NULL, 1, OPTAB_WIDEN);
+    }
+
+  return op;
+}
+#undef TARGET_ADDR_SPACE_CONVERT
+#define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
 
 /* Initialize the GCC target structure.  */
 #undef TARGET_RETURN_IN_MEMORY
-- 
2.4.3

[PATCH v2 09/13] Fix PR 66768

[Richard Henderson]

---
 gcc/tree-ssa-address.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/tree-ssa-address.c b/gcc/tree-ssa-address.c
index 042f9c9..bd10ae7 100644
--- a/gcc/tree-ssa-address.c
+++ b/gcc/tree-ssa-address.c
@@ -388,7 +388,7 @@ create_mem_ref_raw (tree type, tree alias_ptr_type, struct mem_address *addr,
     }
   else
     {
-      base = build_int_cst (ptr_type_node, 0);
+      base = build_int_cst (build_pointer_type (type), 0);
       index2 = addr->base;
     }
 
-- 
2.4.3

[PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Richard Henderson]

---
 gcc/config/i386/i386.c | 21 +++++++++++++++++++++
 gcc/doc/tm.texi        |  7 +++++++
 gcc/doc/tm.texi.in     |  2 ++
 gcc/dwarf2out.c        | 48 +++++++++++++++++++++++++++++-------------------
 gcc/target.def         | 10 ++++++++++
 gcc/targhooks.c        |  8 ++++++++
 gcc/targhooks.h        |  1 +
 7 files changed, 78 insertions(+), 19 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8f833d1..9fb0fac 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -53707,6 +53707,27 @@ ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
 #undef TARGET_ADDR_SPACE_CONVERT
 #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
 
+static int
+ix86_addr_space_debug (addr_space_t as)
+{
+  /* Represent debugging for address spaces with DW_AT_segment,
+     and the dwarf register for fsbase/gsbase.  */
+  if (as == ADDR_SPACE_SEG_TLS)
+    as = DEFAULT_TLS_SEG_REG;
+
+  /* ??? These register numbers are defined in the x86-64 abi,
+     but there is no corresponding definition for the i386 abi.
+     That said, {58,59} appear to be reserved, so perhaps best
+     to use the same numbers in the 32-bit abi.  */
+  if (as == ADDR_SPACE_SEG_FS)
+    return ~58;  /* dwarf fsbase */
+  else if (as == ADDR_SPACE_SEG_GS)
+    return ~59;  /* dwarf gsbase */
+  gcc_unreachable ();
+}
+#undef TARGET_ADDR_SPACE_DEBUG
+#define TARGET_ADDR_SPACE_DEBUG ix86_addr_space_debug
+
 /* All use of segmentation is assumed to make address 0 valid.  */
 
 static bool
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index d530a9c..79a0d01 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10330,6 +10330,13 @@ guaranteed that one of the two address spaces is a subset of the other,
 as determined by the @code{TARGET_ADDR_SPACE_SUBSET_P} target hook.
 @end deftypefn
 
+@deftypefn {Target Hook} int TARGET_ADDR_SPACE_DEBUG (addr_space_t @var{as})
+Define this to define how the address space is encoded in dwarf.
+The result, @var{r}, should be positive to indicate
+@code{DW_AT_address_class @var{r}} should be emitted; or negative
+to indicate @code{DW_AT_segment} with location in register @code{~@var{r}}.
+@end deftypefn
+
 @node Misc
 @section Miscellaneous Parameters
 @cindex parameters, miscellaneous
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index f8dad76..b57310c 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -7438,6 +7438,8 @@ c_register_addr_space ("__ea", ADDR_SPACE_EA);
 
 @hook TARGET_ADDR_SPACE_CONVERT
 
+@hook TARGET_ADDR_SPACE_DEBUG
+
 @node Misc
 @section Miscellaneous Parameters
 @cindex parameters, miscellaneous
diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index c1b7c7b..013e03f 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -10912,29 +10912,39 @@ modified_type_die (tree type, int cv_quals, dw_die_ref context_die)
 	    mod_type_die = d;
 	  }
     }
-  else if (code == POINTER_TYPE)
+  else if (code == POINTER_TYPE || code == REFERENCE_TYPE)
     {
-      mod_type_die = new_die (DW_TAG_pointer_type, mod_scope, type);
-      add_AT_unsigned (mod_type_die, DW_AT_byte_size,
-		       simple_type_size_in_bits (type) / BITS_PER_UNIT);
-      item_type = TREE_TYPE (type);
-      if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (item_type)))
-	add_AT_unsigned (mod_type_die, DW_AT_address_class,
-			 TYPE_ADDR_SPACE (item_type));
-    }
-  else if (code == REFERENCE_TYPE)
-    {
-      if (TYPE_REF_IS_RVALUE (type) && dwarf_version >= 4)
-	mod_type_die = new_die (DW_TAG_rvalue_reference_type, mod_scope,
-				type);
-      else
-	mod_type_die = new_die (DW_TAG_reference_type, mod_scope, type);
+      dwarf_tag tag = DW_TAG_pointer_type;
+      if (code == REFERENCE_TYPE)
+	{
+	  if (TYPE_REF_IS_RVALUE (type) && dwarf_version >= 4)
+	    tag = DW_TAG_rvalue_reference_type;
+	  else
+	    tag = DW_TAG_reference_type;
+	}
+      mod_type_die = new_die (tag, mod_scope, type);
+
       add_AT_unsigned (mod_type_die, DW_AT_byte_size,
 		       simple_type_size_in_bits (type) / BITS_PER_UNIT);
       item_type = TREE_TYPE (type);
-      if (!ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (item_type)))
-	add_AT_unsigned (mod_type_die, DW_AT_address_class,
-			 TYPE_ADDR_SPACE (item_type));
+
+      addr_space_t as = TYPE_ADDR_SPACE (item_type);
+      if (!ADDR_SPACE_GENERIC_P (as))
+	{
+	  int action = targetm.addr_space.debug (as);
+	  if (action >= 0)
+	    {
+	      /* Positive values indicate an address_class.  */
+	      add_AT_unsigned (mod_type_die, DW_AT_address_class, action);
+	    }
+	  else
+	    {
+	      /* Negative values indicate an (inverted) segment base reg.  */
+	      dw_loc_descr_ref d
+		= one_reg_loc_descriptor (~action, VAR_INIT_STATUS_INITIALIZED);
+	      add_AT_loc (mod_type_die, DW_AT_segment, d);
+	    }
+	}
     }
   else if (code == INTEGER_TYPE
 	   && TREE_TYPE (type) != NULL_TREE
diff --git a/gcc/target.def b/gcc/target.def
index e33c87f..ed9f9c5 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -3206,6 +3206,16 @@ as determined by the @code{TARGET_ADDR_SPACE_SUBSET_P} target hook.",
  rtx, (rtx op, tree from_type, tree to_type),
  default_addr_space_convert)
 
+/* Function to encode an address space into dwarf.  */
+DEFHOOK
+(debug,
+ "Define this to define how the address space is encoded in dwarf.\n\
+The result, @var{r}, should be positive to indicate\n\
+@code{DW_AT_address_class @var{r}} should be emitted; or negative\n\
+to indicate @code{DW_AT_segment} with location in register @code{~@var{r}}.",
+ int, (addr_space_t as),
+ default_addr_space_debug)
+
 HOOK_VECTOR_END (addr_space)
 
 #undef HOOK_PREFIX
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index d221d20..fd99460 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1265,6 +1265,14 @@ default_addr_space_zero_address_valid (addr_space_t as ATTRIBUTE_UNUSED)
   return false;
 }
 
+/* The default hook for debugging the address space is to return the
+   (positive) address space number to indicate DW_AT_address_class.  */
+int
+default_addr_space_debug (addr_space_t as)
+{
+  return as;
+}
+
 /* The default hook for TARGET_ADDR_SPACE_CONVERT. This hook should never be
    called for targets with only a generic address space.  */
 
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index ade3327..2bb2d1e 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -174,6 +174,7 @@ extern rtx default_addr_space_legitimize_address (rtx, rtx, machine_mode,
 						  addr_space_t);
 extern bool default_addr_space_subset_p (addr_space_t, addr_space_t);
 extern bool default_addr_space_zero_address_valid (addr_space_t);
+extern int default_addr_space_debug (addr_space_t);
 extern rtx default_addr_space_convert (rtx, tree, tree);
 extern unsigned int default_case_values_threshold (void);
 extern bool default_have_conditional_execution (void);
-- 
2.4.3

[PATCH v2 06/13] i386: Replace ix86_address_seg with addr_space_t

[Richard Henderson]

Signed-off-by: Richard Henderson <rth@redhat.com>
---
 gcc/config/i386/i386-protos.h |  3 +--
 gcc/config/i386/i386.c        | 12 ++++++------
 gcc/config/i386/i386.h        |  3 ++-
 gcc/config/i386/predicates.md |  8 ++++----
 gcc/config/i386/rdos.h        |  2 +-
 5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index f942ef5..4e6d9ad 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -279,12 +279,11 @@ extern rtx maybe_get_pool_constant (rtx);
 extern char internal_label_prefix[16];
 extern int internal_label_prefix_len;
 
-enum ix86_address_seg { SEG_DEFAULT, SEG_FS, SEG_GS };
 struct ix86_address
 {
   rtx base, index, disp;
   HOST_WIDE_INT scale;
-  enum ix86_address_seg seg;
+  addr_space_t seg;
 };
 
 extern int ix86_decompose_address (rtx, struct ix86_address *);
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5f2fc04..7647090 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -13984,7 +13984,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
   rtx scale_rtx = NULL_RTX;
   rtx tmp;
   int retval = 1;
-  enum ix86_address_seg seg = SEG_DEFAULT;
+  addr_space_t seg = ADDR_SPACE_GENERIC;
 
   /* Allow zero-extended SImode addresses,
      they will be emitted with addr32 prefix.  */
@@ -14083,7 +14083,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
 	    case UNSPEC:
 	      if (XINT (op, 1) == UNSPEC_TP
 	          && TARGET_TLS_DIRECT_SEG_REFS
-	          && seg == SEG_DEFAULT)
+	          && seg == ADDR_SPACE_GENERIC)
 		seg = DEFAULT_TLS_SEG_REG;
 	      else
 		return 0;
@@ -14671,7 +14671,7 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool strict)
   struct ix86_address parts;
   rtx base, index, disp;
   HOST_WIDE_INT scale;
-  enum ix86_address_seg seg;
+  addr_space_t seg;
 
   if (ix86_decompose_address (addr, &parts) <= 0)
     /* Decomposition failed.  */
@@ -14717,7 +14717,7 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool strict)
     return false;
 
   /* Address override works only on the (%reg) part of %fs:(%reg).  */
-  if (seg != SEG_DEFAULT
+  if (seg != ADDR_SPACE_GENERIC
       && ((base && GET_MODE (base) != word_mode)
 	  || (index && GET_MODE (index) != word_mode)))
     return false;
@@ -17359,7 +17359,7 @@ ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t as)
 
       if (CONST_INT_P (disp))
 	{
-	  if (ASSEMBLER_DIALECT == ASM_INTEL && parts.seg == SEG_DEFAULT)
+	  if (ASSEMBLER_DIALECT == ASM_INTEL && parts.seg == ADDR_SPACE_GENERIC)
 	    fputs ("ds:", file);
 	  fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (disp));
 	}
@@ -27112,7 +27112,7 @@ memory_address_length (rtx addr, bool lea)
   ok = ix86_decompose_address (addr, &parts);
   gcc_assert (ok);
 
-  len = (parts.seg == SEG_DEFAULT) ? 0 : 1;
+  len = (parts.seg == ADDR_SPACE_GENERIC) ? 0 : 1;
 
   /*  If this is not LEA instruction, add the length of addr32 prefix.  */
   if (TARGET_64BIT && !lea
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index be96c75..3d5b2b2 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -602,7 +602,8 @@ extern tree x86_mfence;
 #define DEFAULT_ABI SYSV_ABI
 
 /* The default TLS segment register used by target.  */
-#define DEFAULT_TLS_SEG_REG (TARGET_64BIT ? SEG_FS : SEG_GS)
+#define DEFAULT_TLS_SEG_REG \
+  (TARGET_64BIT ? ADDR_SPACE_SEG_FS : ADDR_SPACE_SEG_GS)
 
 /* Subtargets may reset this to 1 in order to enable 96-bit long double
    with the rounding mode forced to 53 bits.  */
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 042b949..7b2584c 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -969,7 +969,7 @@
 
   ok = ix86_decompose_address (op, &parts);
   gcc_assert (ok);
-  return parts.seg == SEG_DEFAULT;
+  return parts.seg == ADDR_SPACE_GENERIC;
 })
 
 ;; Return true if op if a valid base register, displacement or
@@ -983,7 +983,7 @@
 
   ok = ix86_decompose_address (op, &parts);
   gcc_assert (ok);
-  if (parts.index || parts.seg != SEG_DEFAULT)
+  if (parts.index || parts.seg != ADDR_SPACE_GENERIC)
     return false;
 
   /* VSIB addressing doesn't support (%rip).  */
@@ -1027,7 +1027,7 @@
   if (parts.index && parts.base)
     return false;
 
-  if (parts.seg != SEG_DEFAULT)
+  if (parts.seg != ADDR_SPACE_GENERIC)
     return false;
 
   /* Do not support (%rip).  */
@@ -1059,7 +1059,7 @@
   if (parts.index)
     return false;
 
-  if (parts.seg != SEG_DEFAULT)
+  if (parts.seg != ADDR_SPACE_GENERIC)
     return false;
 
   /* Do not support (%rip).  */
diff --git a/gcc/config/i386/rdos.h b/gcc/config/i386/rdos.h
index f9bfe6d..ccf6b78 100644
--- a/gcc/config/i386/rdos.h
+++ b/gcc/config/i386/rdos.h
@@ -25,7 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT MASK_TLS_DIRECT_SEG_REFS
 
 #undef DEFAULT_TLS_SEG_REG
-#define DEFAULT_TLS_SEG_REG SEG_GS 
+#define DEFAULT_TLS_SEG_REG ADDR_SPACE_SEG_GS
 
 #undef TARGET_RDOS
 #define TARGET_RDOS 1
-- 
2.4.3

[PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Richard Henderson]

---
 gcc/config/i386/i386.c | 10 ++++++++++
 gcc/doc/tm.texi        |  5 +++++
 gcc/doc/tm.texi.in     |  2 ++
 gcc/fold-const.c       |  6 +++++-
 gcc/gimple.c           | 12 +++++++++---
 gcc/target.def         |  9 +++++++++
 gcc/targhooks.c        |  9 +++++++++
 gcc/targhooks.h        |  1 +
 8 files changed, 50 insertions(+), 4 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ec19a57..8f833d1 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -53707,6 +53707,16 @@ ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
 #undef TARGET_ADDR_SPACE_CONVERT
 #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
 
+/* All use of segmentation is assumed to make address 0 valid.  */
+
+static bool
+ix86_addr_space_zero_address_valid (addr_space_t as)
+{
+  return as != ADDR_SPACE_GENERIC;
+}
+#undef TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
+#define TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID ix86_addr_space_zero_address_valid
+
 /* Initialize the GCC target structure.  */
 #undef TARGET_RETURN_IN_MEMORY
 #define TARGET_RETURN_IN_MEMORY ix86_return_in_memory
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 731e630..d530a9c 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10316,6 +10316,11 @@ arithmetic operations.  Pointers to a superset address space can be
 converted to pointers to a subset address space via explicit casts.
 @end deftypefn
 
+@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID (addr_space_t @var{as})
+Define this to modify the default handling of address 0 for the
+address space.  Return true if 0 should be considered a valid address.
+@end deftypefn
+
 @deftypefn {Target Hook} rtx TARGET_ADDR_SPACE_CONVERT (rtx @var{op}, tree @var{from_type}, tree @var{to_type})
 Define this to convert the pointer expression represented by the RTL
 @var{op} with type @var{from_type} that points to a named address
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 0b52250d..f8dad76 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -7434,6 +7434,8 @@ c_register_addr_space ("__ea", ADDR_SPACE_EA);
 
 @hook TARGET_ADDR_SPACE_SUBSET_P
 
+@hook TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
+
 @hook TARGET_ADDR_SPACE_CONVERT
 
 @node Misc
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index de45a2c..eb7edca 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -1566,7 +1566,11 @@ const_unop (enum tree_code code, tree type, tree arg0)
       return fold_convert_const (code, type, arg0);
 
     case ADDR_SPACE_CONVERT_EXPR:
-      if (integer_zerop (arg0))
+      /* If the source address is 0, and the source address space
+	 cannot have a valid object at 0, fold to dest type null.  */
+      if (integer_zerop (arg0)
+	  && !(targetm.addr_space.zero_address_valid
+	       (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (arg0))))))
 	return fold_convert_const (code, type, arg0);
       break;
 
diff --git a/gcc/gimple.c b/gcc/gimple.c
index 5312d6e..6aa3638 100644
--- a/gcc/gimple.c
+++ b/gcc/gimple.c
@@ -2631,9 +2631,15 @@ nonfreeing_call_p (gimple *call)
 static bool
 check_loadstore (gimple *, tree op, tree, void *data)
 {
-  if ((TREE_CODE (op) == MEM_REF || TREE_CODE (op) == TARGET_MEM_REF)
-      && operand_equal_p (TREE_OPERAND (op, 0), (tree)data, 0))
-    return true;
+  if (TREE_CODE (op) == MEM_REF || TREE_CODE (op) == TARGET_MEM_REF)
+    {
+      /* Some address spaces may legitimately dereference zero.  */
+      addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (op));
+      if (targetm.addr_space.zero_address_valid (as))
+	return false;
+
+      return operand_equal_p (TREE_OPERAND (op, 0), (tree)data, 0);
+    }
   return false;
 }
 
diff --git a/gcc/target.def b/gcc/target.def
index 694e455..e33c87f 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -3185,6 +3185,15 @@ converted to pointers to a subset address space via explicit casts.",
  bool, (addr_space_t subset, addr_space_t superset),
  default_addr_space_subset_p)
 
+/* True if 0 is a valid address in the address space, or false if
+   0 is a NULL in the address space.  */
+DEFHOOK
+(zero_address_valid,
+ "Define this to modify the default handling of address 0 for the\n\
+address space.  Return true if 0 should be considered a valid address.",
+ bool, (addr_space_t as),
+ default_addr_space_zero_address_valid)
+
 /* Function to convert an rtl expression from one address space to another.  */
 DEFHOOK
 (convert,
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index f04964b..d221d20 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1256,6 +1256,15 @@ default_addr_space_subset_p (addr_space_t subset, addr_space_t superset)
   return (subset == superset);
 }
 
+/* The default hook for determining if 0 within a named address
+   space is a valid address.  */
+
+bool
+default_addr_space_zero_address_valid (addr_space_t as ATTRIBUTE_UNUSED)
+{
+  return false;
+}
+
 /* The default hook for TARGET_ADDR_SPACE_CONVERT. This hook should never be
    called for targets with only a generic address space.  */
 
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index 77c284a..ade3327 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -173,6 +173,7 @@ extern bool default_addr_space_legitimate_address_p (machine_mode, rtx,
 extern rtx default_addr_space_legitimize_address (rtx, rtx, machine_mode,
 						  addr_space_t);
 extern bool default_addr_space_subset_p (addr_space_t, addr_space_t);
+extern bool default_addr_space_zero_address_valid (addr_space_t);
 extern rtx default_addr_space_convert (rtx, tree, tree);
 extern unsigned int default_case_values_threshold (void);
 extern bool default_have_conditional_execution (void);
-- 
2.4.3

[PATCH v2 02/13] Relax ADDR_SPACE_GENERIC_P checks for default address space hooks

[Richard Henderson]

If all address spaces use the same modes and forms, we would
be forced to replicate these hooks in the backend.  Which would
then require the creation of a new hook to replace
target_default_pointer_address_modes_p.
---
 gcc/targhooks.c | 39 ++++++++++++++++-----------------------
 1 file changed, 16 insertions(+), 23 deletions(-)

diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 5077ec9..f04964b 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1181,35 +1181,31 @@ default_ref_may_alias_errno (ao_ref *ref)
   return false;
 }
 
-/* Return the mode for a pointer to a given ADDRSPACE, defaulting to ptr_mode
-   for the generic address space only.  */
+/* Return the mode for a pointer to a given ADDRSPACE,
+   defaulting to ptr_mode for all address spaces.  */
 
 machine_mode
 default_addr_space_pointer_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
 {
-  gcc_assert (ADDR_SPACE_GENERIC_P (addrspace));
   return ptr_mode;
 }
 
-/* Return the mode for an address in a given ADDRSPACE, defaulting to Pmode
-   for the generic address space only.  */
+/* Return the mode for an address in a given ADDRSPACE,
+   defaulting to Pmode for all address spaces.  */
 
 machine_mode
 default_addr_space_address_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
 {
-  gcc_assert (ADDR_SPACE_GENERIC_P (addrspace));
   return Pmode;
 }
 
-/* Named address space version of valid_pointer_mode.  */
+/* Named address space version of valid_pointer_mode.
+   To match the above, the same modes apply to all address spaces.  */
 
 bool
-default_addr_space_valid_pointer_mode (machine_mode mode, addr_space_t as)
+default_addr_space_valid_pointer_mode (machine_mode mode,
+				       addr_space_t as ATTRIBUTE_UNUSED)
 {
-  if (!ADDR_SPACE_GENERIC_P (as))
-    return (mode == targetm.addr_space.pointer_mode (as)
-	    || mode == targetm.addr_space.address_mode (as));
-
   return targetm.valid_pointer_mode (mode);
 }
 
@@ -1229,27 +1225,24 @@ target_default_pointer_address_modes_p (void)
   return true;
 }
 
-/* Named address space version of legitimate_address_p.  */
+/* Named address space version of legitimate_address_p.
+   By default, all address spaces have the same form.  */
 
 bool
 default_addr_space_legitimate_address_p (machine_mode mode, rtx mem,
-					 bool strict, addr_space_t as)
+					 bool strict,
+					 addr_space_t as ATTRIBUTE_UNUSED)
 {
-  if (!ADDR_SPACE_GENERIC_P (as))
-    gcc_unreachable ();
-
   return targetm.legitimate_address_p (mode, mem, strict);
 }
 
-/* Named address space version of LEGITIMIZE_ADDRESS.  */
+/* Named address space version of LEGITIMIZE_ADDRESS.
+   By default, all address spaces have the same form.  */
 
 rtx
-default_addr_space_legitimize_address (rtx x, rtx oldx,
-				       machine_mode mode, addr_space_t as)
+default_addr_space_legitimize_address (rtx x, rtx oldx, machine_mode mode,
+				       addr_space_t as ATTRIBUTE_UNUSED)
 {
-  if (!ADDR_SPACE_GENERIC_P (as))
-    return x;
-
   return targetm.legitimize_address (x, oldx, mode);
 }
 
-- 
2.4.3

[PATCH v2 10/13] Avoid CSE of MEMs in different address spaces

[Richard Henderson]

---
 gcc/cselib.c                                 | 22 +++++++++++++---------
 gcc/fold-const.c                             | 14 +++++++-------
 gcc/testsuite/gcc.target/i386/addr-space-2.c | 11 +++++++++++
 3 files changed, 31 insertions(+), 16 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-2.c

diff --git a/gcc/cselib.c b/gcc/cselib.c
index 4264394..857e52a 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -1337,15 +1337,15 @@ new_cselib_val (unsigned int hash, machine_mode mode, rtx x)
 static void
 add_mem_for_addr (cselib_val *addr_elt, cselib_val *mem_elt, rtx x)
 {
-  struct elt_loc_list *l;
-
   addr_elt = canonical_cselib_val (addr_elt);
   mem_elt = canonical_cselib_val (mem_elt);
 
   /* Avoid duplicates.  */
-  for (l = mem_elt->locs; l; l = l->next)
+  addr_space_t as = MEM_ADDR_SPACE (x);
+  for (elt_loc_list *l = mem_elt->locs; l; l = l->next)
     if (MEM_P (l->loc)
-	&& CSELIB_VAL_PTR (XEXP (l->loc, 0)) == addr_elt)
+	&& CSELIB_VAL_PTR (XEXP (l->loc, 0)) == addr_elt
+        && MEM_ADDR_SPACE (l->loc) == as)
       {
 	promote_debug_loc (l);
 	return;
@@ -1372,7 +1372,6 @@ cselib_lookup_mem (rtx x, int create)
   cselib_val **slot;
   cselib_val *addr;
   cselib_val *mem_elt;
-  struct elt_list *l;
 
   if (MEM_VOLATILE_P (x) || mode == BLKmode
       || !cselib_record_memory
@@ -1387,14 +1386,19 @@ cselib_lookup_mem (rtx x, int create)
   addr = cselib_lookup (XEXP (x, 0), addr_mode, create, mode);
   if (! addr)
     return 0;
-
   addr = canonical_cselib_val (addr);
+
   /* Find a value that describes a value of our mode at that address.  */
-  for (l = addr->addr_list; l; l = l->next)
+  addr_space_t as = MEM_ADDR_SPACE (x);
+  for (elt_list *l = addr->addr_list; l; l = l->next)
     if (GET_MODE (l->elt->val_rtx) == mode)
       {
-	promote_debug_loc (l->elt->locs);
-	return l->elt;
+	for (elt_loc_list *l2 = l->elt->locs; l2; l2 = l2->next)
+	  if (MEM_P (l2->loc) && MEM_ADDR_SPACE (l2->loc) == as)
+	    {
+	      promote_debug_loc (l->elt->locs);
+	      return l->elt;
+	    }
       }
 
   if (! create)
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index eb7edca..6da4010 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -2718,6 +2718,13 @@ operand_equal_p (const_tree arg0, const_tree arg1, unsigned int flags)
   if (!TREE_TYPE (arg0) || !TREE_TYPE (arg1))
     return 0;
 
+  /* We cannot consider pointers to different address space equal.  */
+  if (POINTER_TYPE_P (TREE_TYPE (arg0))
+      && POINTER_TYPE_P (TREE_TYPE (arg1))
+      && (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (arg0)))
+	  != TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (arg1)))))
+    return 0;
+
   /* Check equality of integer constants before bailing out due to
      precision differences.  */
   if (TREE_CODE (arg0) == INTEGER_CST && TREE_CODE (arg1) == INTEGER_CST)
@@ -2741,13 +2748,6 @@ operand_equal_p (const_tree arg0, const_tree arg1, unsigned int flags)
 			     != POINTER_TYPE_P (TREE_TYPE (arg1)))
 	return 0;
 
-      /* We cannot consider pointers to different address space equal.  */
-      if (POINTER_TYPE_P (TREE_TYPE (arg0))
-			  && POINTER_TYPE_P (TREE_TYPE (arg1))
-	  && (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (arg0)))
-	      != TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (arg1)))))
-	return 0;
-
       /* If both types don't have the same precision, then it is not safe
 	 to strip NOPs.  */
       if (element_precision (TREE_TYPE (arg0))
diff --git a/gcc/testsuite/gcc.target/i386/addr-space-2.c b/gcc/testsuite/gcc.target/i386/addr-space-2.c
new file mode 100644
index 0000000..d5c24b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/addr-space-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+/* { dg-final { scan-assembler "fs:16" } } */
+/* { dg-final { scan-assembler "gs:16" } } */
+
+int test(void)
+{
+  int __seg_fs *f = (int __seg_fs *)16;
+  int __seg_gs *g = (int __seg_gs *)16;
+  return *f + *g;
+}
-- 
2.4.3

[PATCH v2 01/13] Change default of non-overlapping address space conversion

[Richard Henderson]

The current default of making all undefined coversions being
set to null is not useful.  It has caused all users to lie
and say that spaces are subsets when they are not, just so
that they can override the conversion.
---
 gcc/expr.c | 30 ++++++++++++++++++------------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/gcc/expr.c b/gcc/expr.c
index 595324d..9287da2 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -8179,34 +8179,40 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
     case ADDR_SPACE_CONVERT_EXPR:
       {
 	tree treeop0_type = TREE_TYPE (treeop0);
-	addr_space_t as_to;
-	addr_space_t as_from;
 
 	gcc_assert (POINTER_TYPE_P (type));
 	gcc_assert (POINTER_TYPE_P (treeop0_type));
 
-	as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
-	as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
+	addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
+	addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
 
         /* Conversions between pointers to the same address space should
 	   have been implemented via CONVERT_EXPR / NOP_EXPR.  */
 	gcc_assert (as_to != as_from);
 
+	op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
+
         /* Ask target code to handle conversion between pointers
 	   to overlapping address spaces.  */
 	if (targetm.addr_space.subset_p (as_to, as_from)
 	    || targetm.addr_space.subset_p (as_from, as_to))
 	  {
-	    op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
 	    op0 = targetm.addr_space.convert (op0, treeop0_type, type);
-	    gcc_assert (op0);
-	    return op0;
 	  }
-
-	/* For disjoint address spaces, converting anything but
-	   a null pointer invokes undefined behaviour.  We simply
-	   always return a null pointer here.  */
-	return CONST0_RTX (mode);
+        else
+          {
+	    /* For disjoint address spaces, converting anything but a null
+	       pointer invokes undefined behaviour.  We truncate or extend the
+	       value as if we'd converted via integers, which handles 0 as
+	       required, and all others as the programmer likely expects.  */
+#ifndef POINTERS_EXTEND_UNSIGNED
+	    const int POINTERS_EXTEND_UNSIGNED = 1;
+#endif
+	    op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
+				 op0, POINTERS_EXTEND_UNSIGNED);
+	  }
+	gcc_assert (op0);
+	return op0;
       }
 
     case POINTER_PLUS_EXPR:
-- 
2.4.3

[PATCH v2 03/13] i386: Handle address spaces in movabs patterns

[Richard Henderson]

---
 gcc/config/i386/i386.md | 32 ++++++++++++++++++++++++++------
 1 file changed, 26 insertions(+), 6 deletions(-)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d0c0d23..ccb672d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2595,9 +2595,19 @@
   [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
 	(match_operand:SWI1248x 1 "nonmemory_operand" "a,r<i>"))]
   "TARGET_LP64 && ix86_check_movabs (insn, 0)"
-  "@
-   movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}
-   mov{<imodesuffix>}\t{%1, %a0|<iptrsize> PTR %a0, %1}"
+{
+  /* Recover the full memory rtx.  */
+  operands[0] = SET_DEST (PATTERN (insn));
+  switch (which_alternative)
+    {
+    case 0:
+      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
+    case 1:
+      return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
+    default:
+      gcc_unreachable ();
+    }
+}
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")
@@ -2609,9 +2619,19 @@
   [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
         (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
   "TARGET_LP64 && ix86_check_movabs (insn, 1)"
-  "@
-   movabs{<imodesuffix>}\t{%P1, %0|%0, [%P1]}
-   mov{<imodesuffix>}\t{%a1, %0|%0, <iptrsize> PTR %a1}"
+{
+  /* Recover the full memory rtx.  */
+  operands[1] = SET_SRC (PATTERN (insn));
+  switch (which_alternative)
+    {
+    case 0:
+      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
+    case 1:
+      return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
+    default:
+      gcc_unreachable ();
+    }
+}
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")
-- 
2.4.3

Re: [PATCH v2 10/13] Avoid CSE of MEMs in different address spaces

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> ---
>   gcc/cselib.c                                 | 22 +++++++++++++---------
>   gcc/fold-const.c                             | 14 +++++++-------
>   gcc/testsuite/gcc.target/i386/addr-space-2.c | 11 +++++++++++
>   3 files changed, 31 insertions(+), 16 deletions(-)
>   create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-2.c
This part is fine.  Does the one testcase cover both the cselib.c & 
fold-const.c fix?  If not, it'd be good to cover both if we can.


jeff

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> ---
>   gcc/config/i386/i386.c | 21 +++++++++++++++++++++
>   gcc/doc/tm.texi        |  7 +++++++
>   gcc/doc/tm.texi.in     |  2 ++
>   gcc/dwarf2out.c        | 48 +++++++++++++++++++++++++++++-------------------
>   gcc/target.def         | 10 ++++++++++
>   gcc/targhooks.c        |  8 ++++++++
>   gcc/targhooks.h        |  1 +
>   7 files changed, 78 insertions(+), 19 deletions(-)
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 8f833d1..9fb0fac 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -53707,6 +53707,27 @@ ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
>   #undef TARGET_ADDR_SPACE_CONVERT
>   #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
>
> +static int
> +ix86_addr_space_debug (addr_space_t as)
> +{
> +  /* Represent debugging for address spaces with DW_AT_segment,
> +     and the dwarf register for fsbase/gsbase.  */
> +  if (as == ADDR_SPACE_SEG_TLS)
> +    as = DEFAULT_TLS_SEG_REG;
> +
> +  /* ??? These register numbers are defined in the x86-64 abi,
> +     but there is no corresponding definition for the i386 abi.
> +     That said, {58,59} appear to be reserved, so perhaps best
> +     to use the same numbers in the 32-bit abi.  */
> +  if (as == ADDR_SPACE_SEG_FS)
> +    return ~58;  /* dwarf fsbase */
> +  else if (as == ADDR_SPACE_SEG_GS)
> +    return ~59;  /* dwarf gsbase */
> +  gcc_unreachable ();
> +}
So in the case where AS, as passed in is ADDR_SPACE_SEG_TLS, we then 
change it to DEFAULT_TLS_SEG_REG.

Yet I don't see DEFAULT_TLS_SEG_REG handled in the two cases below which 
would make one think we'd hit the gcc_unreachable ().  Of course 
DEFAULT_TLS_SEG_REG will be defined as ADDR_SPACE_SEG_FS or 
ADDR_SPACE_SEG_GS, so we can't actually hit the gcc_unreachable, but 
as-written that's non-obvious.

If you could clarify that with a comment I think this hunk is ready to go.
jeff

Re: [PATCH v2 09/13] Fix PR 66768

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> ---
>   gcc/tree-ssa-address.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
I think this change is fine.  Needs a testcase though.

I'll also note you need ChangeLogs for all these patches.  I know you 
know that, so it's just a reminder that they're often helpful for reviewers.

Jeff

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> ---
>   gcc/config/i386/i386.c | 10 ++++++++++
>   gcc/doc/tm.texi        |  5 +++++
>   gcc/doc/tm.texi.in     |  2 ++
>   gcc/fold-const.c       |  6 +++++-
>   gcc/gimple.c           | 12 +++++++++---
>   gcc/target.def         |  9 +++++++++
>   gcc/targhooks.c        |  9 +++++++++
>   gcc/targhooks.h        |  1 +
>   8 files changed, 50 insertions(+), 4 deletions(-)
Seems reasonable.  Needs ChangeLog.  Tests would be good too.
jeff

Re: [PATCH v2 02/13] Relax ADDR_SPACE_GENERIC_P checks for default address space hooks

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> If all address spaces use the same modes and forms, we would
> be forced to replicate these hooks in the backend.  Which would
> then require the creation of a new hook to replace
> target_default_pointer_address_modes_p.
> ---
>   gcc/targhooks.c | 39 ++++++++++++++++-----------------------
>   1 file changed, 16 insertions(+), 23 deletions(-)
Change itself is probably fine.  Are there any doc updates that need to 
happen given the generalization of these hooks?

jeff

Re: [PATCH v2 01/13] Change default of non-overlapping address space conversion

[Jeff Law]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> The current default of making all undefined coversions being
> set to null is not useful.  It has caused all users to lie
> and say that spaces are subsets when they are not, just so
> that they can override the conversion.
Usual comment about needing a ChangeLog.  Patch itself looks fine.

I'm leaving the rest to Uros.

jeff

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[H.J. Lu]

On Tue, Oct 20, 2015 at 2:27 PM, Richard Henderson <rth@redhat.com> wrote:
> ---
>  gcc/config/i386/i386.c | 21 +++++++++++++++++++++
>  gcc/doc/tm.texi        |  7 +++++++
>  gcc/doc/tm.texi.in     |  2 ++
>  gcc/dwarf2out.c        | 48 +++++++++++++++++++++++++++++-------------------
>  gcc/target.def         | 10 ++++++++++
>  gcc/targhooks.c        |  8 ++++++++
>  gcc/targhooks.h        |  1 +
>  7 files changed, 78 insertions(+), 19 deletions(-)
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 8f833d1..9fb0fac 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -53707,6 +53707,27 @@ ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
>  #undef TARGET_ADDR_SPACE_CONVERT
>  #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
>
> +static int
> +ix86_addr_space_debug (addr_space_t as)
> +{
> +  /* Represent debugging for address spaces with DW_AT_segment,
> +     and the dwarf register for fsbase/gsbase.  */
> +  if (as == ADDR_SPACE_SEG_TLS)
> +    as = DEFAULT_TLS_SEG_REG;
> +
> +  /* ??? These register numbers are defined in the x86-64 abi,
> +     but there is no corresponding definition for the i386 abi.
> +     That said, {58,59} appear to be reserved, so perhaps best
> +     to use the same numbers in the 32-bit abi.  */
> +  if (as == ADDR_SPACE_SEG_FS)
> +    return ~58;  /* dwarf fsbase */
> +  else if (as == ADDR_SPACE_SEG_GS)
> +    return ~59;  /* dwarf gsbase */
> +  gcc_unreachable ();
> +}

This is wrong for i386 psABI.  Please use the DWARF register
numbers listed in Table 2.14: DWARF Register Number Mapping
in Intel386 psABI:

https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI

Segment Register ES 40 %es
Segment Register CS 41 %cs
Segment Register SS 42 %ss
Segment Register DS 43 %ds
Segment Register FS 44 %fs
Segment Register GS 45 %gs


-- 
H.J.

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Ulrich Weigand]

Richard Henderson wrote:

> +@deftypefn {Target Hook} int TARGET_ADDR_SPACE_DEBUG (addr_space_t @var{as})
> +Define this to define how the address space is encoded in dwarf.
> +The result, @var{r}, should be positive to indicate
> +@code{DW_AT_address_class @var{r}} should be emitted; or negative
> +to indicate @code{DW_AT_segment} with location in register @code{~@var{r}}.
> +@end deftypefn

From my reading of the DWARF specs, DW_AT_segment and DW_AT_address_class
are intended to be used for different purposes:

   Any debugging information entry that contains a description of the location
   of an object or subroutine may have a DW_AT_segment attribute, whose value
   is a location description. The description evaluates to the segment selector
   of the item being described.

vs.

   Any debugging information entry representing a pointer or reference type or
   a subroutine or subroutine type may have a DW_AT_address_class attribute,
   whose value is an integer constant. The set of permissible values is specific
   to each target architecture.

Back when we implemented address space support for Cell/B.E. I interpreted
this to mean that DW_AT_segment was intended to be used for DIEs *defining*
an object, while DW_AT_address_class was intended to be used for pointer
types.  (Since the former wasn't possible on Cell/B.E., we never actually
implemented DW_AT_segment back then.)


B.t.w. Appendix A of the DWARF4 standard also does *not* list DW_AT_segment
as a valid attribute for a DW_TAG_pointer_type or DW_TAG_reference_type DIE.

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU/Linux compilers and toolchain
  Ulrich.Weigand@de.ibm.com

Re: [PATCH v2 10/13] Avoid CSE of MEMs in different address spaces

[Richard Henderson]

On 10/21/2015 03:37 AM, Jeff Law wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>> ---
>>   gcc/cselib.c                                 | 22 +++++++++++++---------
>>   gcc/fold-const.c                             | 14 +++++++-------
>>   gcc/testsuite/gcc.target/i386/addr-space-2.c | 11 +++++++++++
>>   3 files changed, 31 insertions(+), 16 deletions(-)
>>   create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-2.c
> This part is fine.  Does the one testcase cover both the cselib.c &
> fold-const.c fix?  If not, it'd be good to cover both if we can.

Yes it does.

The fold-const fix gets us as far as .optimized, but then the cselib fix gets 
us past postreload-cse.


r~

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Richard Henderson]

On 10/21/2015 04:53 AM, H.J. Lu wrote:
> On Tue, Oct 20, 2015 at 2:27 PM, Richard Henderson <rth@redhat.com> wrote:
>> ---
>>   gcc/config/i386/i386.c | 21 +++++++++++++++++++++
>>   gcc/doc/tm.texi        |  7 +++++++
>>   gcc/doc/tm.texi.in     |  2 ++
>>   gcc/dwarf2out.c        | 48 +++++++++++++++++++++++++++++-------------------
>>   gcc/target.def         | 10 ++++++++++
>>   gcc/targhooks.c        |  8 ++++++++
>>   gcc/targhooks.h        |  1 +
>>   7 files changed, 78 insertions(+), 19 deletions(-)
>>
>> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
>> index 8f833d1..9fb0fac 100644
>> --- a/gcc/config/i386/i386.c
>> +++ b/gcc/config/i386/i386.c
>> @@ -53707,6 +53707,27 @@ ix86_addr_space_convert (rtx op, tree from_type, tree to_type)
>>   #undef TARGET_ADDR_SPACE_CONVERT
>>   #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
>>
>> +static int
>> +ix86_addr_space_debug (addr_space_t as)
>> +{
>> +  /* Represent debugging for address spaces with DW_AT_segment,
>> +     and the dwarf register for fsbase/gsbase.  */
>> +  if (as == ADDR_SPACE_SEG_TLS)
>> +    as = DEFAULT_TLS_SEG_REG;
>> +
>> +  /* ??? These register numbers are defined in the x86-64 abi,
>> +     but there is no corresponding definition for the i386 abi.
>> +     That said, {58,59} appear to be reserved, so perhaps best
>> +     to use the same numbers in the 32-bit abi.  */
>> +  if (as == ADDR_SPACE_SEG_FS)
>> +    return ~58;  /* dwarf fsbase */
>> +  else if (as == ADDR_SPACE_SEG_GS)
>> +    return ~59;  /* dwarf gsbase */
>> +  gcc_unreachable ();
>> +}
>
> This is wrong for i386 psABI.  Please use the DWARF register
> numbers listed in Table 2.14: DWARF Register Number Mapping
> in Intel386 psABI:
>
> https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI
>
> Segment Register ES 40 %es
> Segment Register CS 41 %cs
> Segment Register SS 42 %ss
> Segment Register DS 43 %ds
> Segment Register FS 44 %fs
> Segment Register GS 45 %gs

I'm not looking for the segment register (aka descriptor), I'm looking for the 
segment base.  Not the same thing.

As I note in the comment, there is no such definition in the i386 psabi, while 
there is in the x86-64 psabi.


r~

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[H.J. Lu]

On Wed, Oct 21, 2015 at 10:17 AM, Richard Henderson <rth@redhat.com> wrote:
> On 10/21/2015 04:53 AM, H.J. Lu wrote:
>>
>> On Tue, Oct 20, 2015 at 2:27 PM, Richard Henderson <rth@redhat.com> wrote:
>>>
>>> ---
>>>   gcc/config/i386/i386.c | 21 +++++++++++++++++++++
>>>   gcc/doc/tm.texi        |  7 +++++++
>>>   gcc/doc/tm.texi.in     |  2 ++
>>>   gcc/dwarf2out.c        | 48
>>> +++++++++++++++++++++++++++++-------------------
>>>   gcc/target.def         | 10 ++++++++++
>>>   gcc/targhooks.c        |  8 ++++++++
>>>   gcc/targhooks.h        |  1 +
>>>   7 files changed, 78 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
>>> index 8f833d1..9fb0fac 100644
>>> --- a/gcc/config/i386/i386.c
>>> +++ b/gcc/config/i386/i386.c
>>> @@ -53707,6 +53707,27 @@ ix86_addr_space_convert (rtx op, tree from_type,
>>> tree to_type)
>>>   #undef TARGET_ADDR_SPACE_CONVERT
>>>   #define TARGET_ADDR_SPACE_CONVERT ix86_addr_space_convert
>>>
>>> +static int
>>> +ix86_addr_space_debug (addr_space_t as)
>>> +{
>>> +  /* Represent debugging for address spaces with DW_AT_segment,
>>> +     and the dwarf register for fsbase/gsbase.  */
>>> +  if (as == ADDR_SPACE_SEG_TLS)
>>> +    as = DEFAULT_TLS_SEG_REG;
>>> +
>>> +  /* ??? These register numbers are defined in the x86-64 abi,
>>> +     but there is no corresponding definition for the i386 abi.
>>> +     That said, {58,59} appear to be reserved, so perhaps best
>>> +     to use the same numbers in the 32-bit abi.  */
>>> +  if (as == ADDR_SPACE_SEG_FS)
>>> +    return ~58;  /* dwarf fsbase */
>>> +  else if (as == ADDR_SPACE_SEG_GS)
>>> +    return ~59;  /* dwarf gsbase */
>>> +  gcc_unreachable ();
>>> +}
>>
>>
>> This is wrong for i386 psABI.  Please use the DWARF register
>> numbers listed in Table 2.14: DWARF Register Number Mapping
>> in Intel386 psABI:
>>
>> https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI
>>
>> Segment Register ES 40 %es
>> Segment Register CS 41 %cs
>> Segment Register SS 42 %ss
>> Segment Register DS 43 %ds
>> Segment Register FS 44 %fs
>> Segment Register GS 45 %gs
>
>
> I'm not looking for the segment register (aka descriptor), I'm looking for
> the segment base.  Not the same thing.
>
> As I note in the comment, there is no such definition in the i386 psabi,
> while there is in the x86-64 psabi.

We can define them as 93 and 94.  50-92 were used for other registers
before and have been deprecated now.  But some old tools may
still use them.


-- 
H.J.

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Richard Henderson]

On 10/21/2015 07:23 AM, H.J. Lu wrote:
> We can define them as 93 and 94.  50-92 were used for other registers
> before and have been deprecated now.  But some old tools may
> still use them.

Thanks.  I'll update the patch.


r~

Re: [PATCH v2 09/13] Fix PR 66768

[Richard Henderson]

On 10/21/2015 03:55 AM, Jeff Law wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>> ---
>>   gcc/tree-ssa-address.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
> I think this change is fine.  Needs a testcase though.
>
> I'll also note you need ChangeLogs for all these patches.  I know you know
> that, so it's just a reminder that they're often helpful for reviewers.

I wrote them for v1, but then failed to copy them over into the messages for 
v2.  Sorry about that.  Certainly they'll be present in the actual commit.


r~

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[H.J. Lu]

On Wed, Oct 21, 2015 at 10:49 AM, Richard Henderson <rth@redhat.com> wrote:
> On 10/21/2015 07:23 AM, H.J. Lu wrote:
>>
>> We can define them as 93 and 94.  50-92 were used for other registers
>> before and have been deprecated now.  But some old tools may
>> still use them.
>
>

The i386 psABI draft is at

https://github.com/hjl-tools/x86-psABI/wiki/intel386-psABI-20151021.pdf


-- 
H.J.

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Richard Henderson]

On 10/21/2015 06:19 AM, Ulrich Weigand wrote:
> Richard Henderson wrote:
>
>> +@deftypefn {Target Hook} int TARGET_ADDR_SPACE_DEBUG (addr_space_t @var{as})
>> +Define this to define how the address space is encoded in dwarf.
>> +The result, @var{r}, should be positive to indicate
>> +@code{DW_AT_address_class @var{r}} should be emitted; or negative
>> +to indicate @code{DW_AT_segment} with location in register @code{~@var{r}}.
>> +@end deftypefn
>
>  From my reading of the DWARF specs, DW_AT_segment and DW_AT_address_class
> are intended to be used for different purposes:
>
>     Any debugging information entry that contains a description of the location
>     of an object or subroutine may have a DW_AT_segment attribute, whose value
>     is a location description. The description evaluates to the segment selector
>     of the item being described.
>
> vs.
>
>     Any debugging information entry representing a pointer or reference type or
>     a subroutine or subroutine type may have a DW_AT_address_class attribute,
>     whose value is an integer constant. The set of permissible values is specific
>     to each target architecture.
>
> Back when we implemented address space support for Cell/B.E. I interpreted
> this to mean that DW_AT_segment was intended to be used for DIEs *defining*
> an object, while DW_AT_address_class was intended to be used for pointer
> types.  (Since the former wasn't possible on Cell/B.E., we never actually
> implemented DW_AT_segment back then.)

So you would recommend continuing to use address_class for these x86 segments?

I suppose the DW_AT_segment can go onto the base type, just like it does in the 
GCC type system.  E.g.

   int __seg_fs *f;

   <a>  DW_TAG_base_type
        DW_AT_byte_size 4
        DW_AT_encoding 5
        DW_AT_segment DW_OP_regx 58
   <b>  DW_TAG_pointer_type
        DW_AT_byte_size 8
        DW_AT_type <a>

But I'm not really sure that's any better.

> B.t.w. Appendix A of the DWARF4 standard also does *not* list DW_AT_segment
> as a valid attribute for a DW_TAG_pointer_type or DW_TAG_reference_type DIE.

Hmm, yes, that is suggestive that segment is supposed to be used for something 
completely different, not especially relevant to what I'm attempting to do.


r~

Re: [PATCH v2 02/13] Relax ADDR_SPACE_GENERIC_P checks for default address space hooks

[Richard Henderson]

On 10/21/2015 03:59 AM, Jeff Law wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>> If all address spaces use the same modes and forms, we would
>> be forced to replicate these hooks in the backend.  Which would
>> then require the creation of a new hook to replace
>> target_default_pointer_address_modes_p.
>> ---
>>   gcc/targhooks.c | 39 ++++++++++++++++-----------------------
>>   1 file changed, 16 insertions(+), 23 deletions(-)
> Change itself is probably fine.  Are there any doc updates that need to happen
> given the generalization of these hooks?

Oops, you're right about the doc updates.


r~

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Richard Henderson]

On 10/21/2015 03:57 AM, Jeff Law wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>> ---
>>   gcc/config/i386/i386.c | 10 ++++++++++
>>   gcc/doc/tm.texi        |  5 +++++
>>   gcc/doc/tm.texi.in     |  2 ++
>>   gcc/fold-const.c       |  6 +++++-
>>   gcc/gimple.c           | 12 +++++++++---
>>   gcc/target.def         |  9 +++++++++
>>   gcc/targhooks.c        |  9 +++++++++
>>   gcc/targhooks.h        |  1 +
>>   8 files changed, 50 insertions(+), 4 deletions(-)
> Seems reasonable.  Needs ChangeLog.  Tests would be good too.

The test got split to patch 11.  I don't recall if the test can pass without 
patches 9-10 as well.


r~

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Jeff Law]

On 10/21/2015 02:50 PM, Richard Henderson wrote:
> On 10/21/2015 03:57 AM, Jeff Law wrote:
>> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>>> ---
>>>   gcc/config/i386/i386.c | 10 ++++++++++
>>>   gcc/doc/tm.texi        |  5 +++++
>>>   gcc/doc/tm.texi.in     |  2 ++
>>>   gcc/fold-const.c       |  6 +++++-
>>>   gcc/gimple.c           | 12 +++++++++---
>>>   gcc/target.def         |  9 +++++++++
>>>   gcc/targhooks.c        |  9 +++++++++
>>>   gcc/targhooks.h        |  1 +
>>>   8 files changed, 50 insertions(+), 4 deletions(-)
>> Seems reasonable.  Needs ChangeLog.  Tests would be good too.
>
> The test got split to patch 11.  I don't recall if the test can pass
> without patches 9-10 as well.
OK.  As long as there's a test I'm happy, even if it shows up in a later 
patch ;-)

jeff

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Sandra Loosemore]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
>
> +@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID (addr_space_t @var{as})
> +Define this to modify the default handling of address 0 for the
> +address space.  Return true if 0 should be considered a valid address.
> +@end deftypefn
> +

I'm confused by this new hook.  How does it interact with 
-fdelete-null-pointer-checks?  E.g. nios2-elf defaults 
flag_delete_null_pointer_checks to 0 precisely because address 0 is 
legitimate on that target.  The avr and cr16 backends simply override
flag_delete_null_pointer_checks.  Do backends that already frob one 
thing need to frob the other as well?  Are there any changes to the user 
documentation for -fdelete-null-pointer-checks required?

-Sandra

Re: [PATCH v2 12/13] Document the x86 address spaces

[Sandra Loosemore]

On 10/20/2015 03:27 PM, Richard Henderson wrote:
> ---
>   gcc/doc/extend.texi | 46 ++++++++++++++++++++++++++++++++++++++++++++--
>   1 file changed, 44 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index bdbf513..677a4d4 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -1240,8 +1240,8 @@ As an extension, GNU C supports named address spaces as
>   defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
>   address spaces in GCC will evolve as the draft technical report
>   changes.  Calling conventions for any target might also change.  At
> -present, only the AVR, SPU, M32C, and RL78 targets support address
> -spaces other than the generic address space.
> +present, only the AVR, SPU, M32C, RL78, and i386/x86_64 targets support

We've previously decided that "x86-32", "x86-64" (hyphen instead of 
underscore), and "x86" (to refer inclusively to both variants) are the 
preferred terminology.  Please fix throughout the patch.

> +address spaces other than the generic address space.
>
>   Address space identifiers may be used exactly like any other C type
>   qualifier (e.g., @code{const} or @code{volatile}).  See the N1275
> @@ -1430,6 +1430,48 @@ It may use runtime library
>   support, or generate special machine instructions to access that address
>   space.
>
> +@subsection X86 Named Address Spaces

Other places use "x86", lowercase, even in section titles.

I'd add a "@cindex x86 named address spaces" here.  It looks like the 
convention is *not* to capitalize anything other than proper names in 
index entries....  please fix below as well.

> +
> +On the i386/x86_64 target, variables may be declared as being relative
> +to the @code{%fs} or @code{%gs} segments.
> +
> +@table @code
> +@item __seg_fs
> +@itemx __seg_gs
> +@cindex @code{__seg_fs} X86 Named Address Spaces
> +@cindex @code{__seg_gs} X86 Named Address Spaces
> +The object is accessed with the respective segment override prefix.
> +
> +The respective segment base must be set via some operating-system
> +specific method.

Either "operating-system-specific method", or "method specific to the 
operating system".  Here and below.

> Since an operating-system specific method would
> +also be required to find the segment base, these address spaces are

s/would also be/is/

> +not considered to be subspaces of the generic (flat) address space.
> +This means that explicit casts are required to convert pointers
> +between these address spaces and the generic address space.  In
> +practice one will need to cast to @code{uintptr_t} and apply the

s/one will need to/you should/

> +segment base offset known to the application.
> +
> +The preprocessor symbols @code{__SEG_FS} and @code{__SEG_GS} are
> +defined when these address spaces are supported.
> +
> +@item __seg_tls
> +@cindex @code{__seg_tls} X86 Named Address Spaces
> +Some operating systems define either the @code{%fs} or @code{%gs}
> +segment as the thread-local storage base for each thread.  Objects
> +within this address space are accessed with the appropriate
> +segment override prefix.
> +
> +The pointer located at address 0 within the segment contains the
> +offset of the segment within the generic address space.  Thus this
> +address space is considered a subspace of the generic address space,
> +and the known segment offset is applied when converting addresses
> +to and from the generic address space.
> +
> +The preprocessor symbol @code{__SEG_TLS} is defined when this
> +address space is supported.
> +
> +@end table
> +
>   @node Zero Length
>   @section Arrays of Length Zero
>   @cindex arrays of length zero
>

-Sandra

Re: [PATCH v2 10/13] Avoid CSE of MEMs in different address spaces

[Richard Biener]

On Wed, Oct 21, 2015 at 7:12 PM, Richard Henderson <rth@redhat.com> wrote:
> On 10/21/2015 03:37 AM, Jeff Law wrote:
>>
>> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>>>
>>> ---
>>>   gcc/cselib.c                                 | 22
>>> +++++++++++++---------
>>>   gcc/fold-const.c                             | 14 +++++++-------
>>>   gcc/testsuite/gcc.target/i386/addr-space-2.c | 11 +++++++++++
>>>   3 files changed, 31 insertions(+), 16 deletions(-)
>>>   create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-2.c
>>
>> This part is fine.  Does the one testcase cover both the cselib.c &
>> fold-const.c fix?  If not, it'd be good to cover both if we can.
>
>
> Yes it does.
>
> The fold-const fix gets us as far as .optimized, but then the cselib fix
> gets us past postreload-cse.

These fixes are appropriate for backporting as well I think.

Richard.
>
> r~

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Richard Biener]

On Thu, Oct 22, 2015 at 5:12 AM, Sandra Loosemore
<sandra@codesourcery.com> wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>>
>>
>> +@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
>> (addr_space_t @var{as})
>> +Define this to modify the default handling of address 0 for the
>> +address space.  Return true if 0 should be considered a valid address.
>> +@end deftypefn
>> +
>
>
> I'm confused by this new hook.  How does it interact with
> -fdelete-null-pointer-checks?  E.g. nios2-elf defaults
> flag_delete_null_pointer_checks to 0 precisely because address 0 is
> legitimate on that target.  The avr and cr16 backends simply override
> flag_delete_null_pointer_checks.  Do backends that already frob one thing
> need to frob the other as well?  Are there any changes to the user
> documentation for -fdelete-null-pointer-checks required?

I suppose a cleanup possibility would be to get rid of that "abuse" of
flag_delete_null_pointer_checks and make all targets now defining that to zero
instead implement the hook above but for the default address-space.
And then make all places checking for flag_delete_null_pointer_checks (or
at least some) use the target hook instead.

Richard.

> -Sandra
>

Re: [PATCH v2 13/13] Add hook for modifying debug info for address spaces

[Ulrich Weigand]

Richard Henderson wrote:

> So you would recommend continuing to use address_class for these x86 segments?

Yes, I think so.  As far as I can see, this would simply require to define two
address_class values to correspond to __seg_fs and __seg_gs.  (These choices
should best be documented in the platform ABI.)

GDB infrastructure to decode and use address_class should already be in place,
you simply need to implement the relevant gdbarch callbacks:

  address_class_type_flags
    Convert from DWARF address class to GDB internal encoding

  address_class_type_flags_to_name
  address_class_name_to_type_flags
    Convert between GDB internal encoding and printable name (e.g. "__seg_fs")

  address_to_pointer
  pointer_to_address
    Convert between a GDB flat address (CORE_ADDR) and a target-specific
    pointer encoding, based on the pointer's address class flags

Of course, to do the latter, you still need access to the segment base values,
as discussed on the GDB mailing list.

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU/Linux compilers and toolchain
  Ulrich.Weigand@de.ibm.com

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Richard Henderson]

On 10/21/2015 05:12 PM, Sandra Loosemore wrote:
> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>>
>> +@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
>> (addr_space_t @var{as})
>> +Define this to modify the default handling of address 0 for the
>> +address space.  Return true if 0 should be considered a valid address.
>> +@end deftypefn
>> +
>
> I'm confused by this new hook.  How does it interact with
> -fdelete-null-pointer-checks?

It's kind of like -fdelete-null-pointer-checks on a per-address-space basis.

>  E.g. nios2-elf defaults
> flag_delete_null_pointer_checks to 0 precisely because address 0 is
> legitimate on that target.  The avr and cr16 backends simply override
> flag_delete_null_pointer_checks.  Do backends that already frob one thing
> need to frob the other as well?

No.  All three of these targets have address 0 valid in the generic address 
space, so there it might be best to leave things as-is.

>  Are there any changes to the user documentation for
> -fdelete-null-pointer-checks required?

I shouldn't think so.


r~

Re: [PATCH v2 12/13] Document the x86 address spaces

[Richard Henderson]

[-- Attachment #1: Type: text/plain, Size: 60 bytes --]

I believe I've addressed all of your comments like so.


r~

[-- Attachment #2: 0001-Document-the-x86-address-spaces.patch --]
[-- Type: text/x-patch, Size: 2761 bytes --]

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index e54fe67..5793868 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -1240,8 +1240,8 @@ As an extension, GNU C supports named address spaces as
 defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
 address spaces in GCC will evolve as the draft technical report
 changes.  Calling conventions for any target might also change.  At
-present, only the AVR, SPU, M32C, and RL78 targets support address
-spaces other than the generic address space.
+present, only the AVR, SPU, M32C, RL78, and i386/x86_64 targets support
+address spaces other than the generic address space.
 
 Address space identifiers may be used exactly like any other C type
 qualifier (e.g., @code{const} or @code{volatile}).  See the N1275
@@ -1430,6 +1430,49 @@ It may use runtime library
 support, or generate special machine instructions to access that address
 space.
 
+@subsection x86 Named Address Spaces
+@cindex x86 named address spaces
+
+On the x86 target, variables may be declared as being relative
+to the @code{%fs} or @code{%gs} segments.
+
+@table @code
+@item __seg_fs
+@itemx __seg_gs
+@cindex @code{__seg_fs} x86 named address space
+@cindex @code{__seg_gs} x86 named address space
+The object is accessed with the respective segment override prefix.
+
+The respective segment base must be set via some method specific to
+the operating system.  Rather than require an expensive system call
+to retrieve the segment base, these address spaces are not considered
+to be subspaces of the generic (flat) address space.  This means that
+explicit casts are required to convert pointers between these address
+spaces and the generic address space.  In practice the application
+should cast to @code{uintptr_t} and apply the segment base offset
+that it installed previously.
+
+The preprocessor symbols @code{__SEG_FS} and @code{__SEG_GS} are
+defined when these address spaces are supported.
+
+@item __seg_tls
+@cindex @code{__seg_tls} x86 named address space
+Some operating systems define either the @code{%fs} or @code{%gs}
+segment as the thread-local storage base for each thread.  Objects
+within this address space are accessed with the appropriate
+segment override prefix.
+
+The pointer located at address 0 within the segment contains the
+offset of the segment within the generic address space.  Thus this
+address space is considered a subspace of the generic address space,
+and the known segment offset is applied when converting addresses
+to and from the generic address space.
+
+The preprocessor symbol @code{__SEG_TLS} is defined when this
+address space is supported.
+
+@end table
+
 @node Zero Length
 @section Arrays of Length Zero
 @cindex arrays of length zero

Re: [PATCH v2 08/13] Add TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID

[Sandra Loosemore]

On 10/22/2015 01:58 AM, Richard Biener wrote:
> On Thu, Oct 22, 2015 at 5:12 AM, Sandra Loosemore
> <sandra@codesourcery.com> wrote:
>> On 10/20/2015 03:27 PM, Richard Henderson wrote:
>>>
>>>
>>> +@deftypefn {Target Hook} bool TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID
>>> (addr_space_t @var{as})
>>> +Define this to modify the default handling of address 0 for the
>>> +address space.  Return true if 0 should be considered a valid address.
>>> +@end deftypefn
>>> +
>>
>>
>> I'm confused by this new hook.  How does it interact with
>> -fdelete-null-pointer-checks?  E.g. nios2-elf defaults
>> flag_delete_null_pointer_checks to 0 precisely because address 0 is
>> legitimate on that target.  The avr and cr16 backends simply override
>> flag_delete_null_pointer_checks.  Do backends that already frob one thing
>> need to frob the other as well?  Are there any changes to the user
>> documentation for -fdelete-null-pointer-checks required?
>
> I suppose a cleanup possibility would be to get rid of that "abuse" of
> flag_delete_null_pointer_checks and make all targets now defining that to zero
> instead implement the hook above but for the default address-space.
> And then make all places checking for flag_delete_null_pointer_checks (or
> at least some) use the target hook instead.

If it's not possible to integrate the two mechanisms somehow, can we at 
least improve the documentation of the new hook to better explain how it 
interacts with flag_delete_null_pointer_checks?  E.g. I'm concerned that 
if you provide a hook implementation that always returns true, it won't 
really disable all optimizations that depend on the assumption that 
accesses to address 0 will trap, and that you still need to set 
flag_delete_null_pointer_checks too.  The language I quoted above is 
pretty vague about what compiler actions are controlled by this flag, 
and if it only controls a subset of assumptions made about address zero 
it ought to be more explicit about what subset that is.

-Sandra

Re: [PATCH v2 12/13] Document the x86 address spaces

[Sandra Loosemore]

On 10/22/2015 02:25 PM, Richard Henderson wrote:
> I believe I've addressed all of your comments like so.

This looks much better, except for this hunk:

> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index e54fe67..5793868 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -1240,8 +1240,8 @@ As an extension, GNU C supports named address spaces as
>  defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
>  address spaces in GCC will evolve as the draft technical report
>  changes.  Calling conventions for any target might also change.  At
> -present, only the AVR, SPU, M32C, and RL78 targets support address
> -spaces other than the generic address space.
> +present, only the AVR, SPU, M32C, RL78, and i386/x86_64 targets support

Please use "x86" here, too.

> +address spaces other than the generic address space.
>
>  Address space identifiers may be used exactly like any other C type
>  qualifier (e.g., @code{const} or @code{volatile}).  See the N1275

-Sandra

Re: [PATCH v2 11/13] Test case for conversion from __seg_tls:0

[Richard Biener]

On Tue, Oct 20, 2015 at 11:27 PM, Richard Henderson <rth@redhat.com> wrote:
> ---
>  gcc/testsuite/gcc.target/i386/addr-space-3.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/addr-space-3.c
>
> diff --git a/gcc/testsuite/gcc.target/i386/addr-space-3.c b/gcc/testsuite/gcc.target/i386/addr-space-3.c
> new file mode 100644
> index 0000000..63f1f03
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/addr-space-3.c
> @@ -0,0 +1,10 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O" } */
> +/* { dg-final { scan-assembler "[fg]s:0" } } */

Causes

ERROR: (DejaGnu) proc "fg" does not exist.
The error code is NONE
The info on the error is:
close: spawn id exp6 not open
    while executing
"close -i exp6"
    invoked from within
"catch "close -i $spawn_id""



> +
> +void test(int *y)
> +{
> +  int *x = (int __seg_tls *)0;
> +  if (x == y)
> +    asm("");
> +}
> --
> 2.4.3
>

Re: [PATCH v2 11/13] Test case for conversion from __seg_tls:0

[Thomas Schwinge]

[-- Attachment #1: Type: text/plain, Size: 2139 bytes --]

Hi!

On Mon, 9 Nov 2015 15:46:20 +0100, Richard Biener <richard.guenther@gmail.com> wrote:
> On Tue, Oct 20, 2015 at 11:27 PM, Richard Henderson <rth@redhat.com> wrote:
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/addr-space-3.c
> > @@ -0,0 +1,10 @@
> > +/* { dg-do compile } */
> > +/* { dg-options "-O" } */
> > +/* { dg-final { scan-assembler "[fg]s:0" } } */
> 
> Causes
> 
> ERROR: (DejaGnu) proc "fg" does not exist.
> The error code is NONE
> The info on the error is:
> close: spawn id exp6 not open
>     while executing
> "close -i exp6"
>     invoked from within
> "catch "close -i $spawn_id""

In r230038, I checked in the the following, as obvious:

commit a7d978247cd261d66010195908ce0e9ef0e501b9
Author: tschwinge <tschwinge@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Mon Nov 9 17:53:02 2015 +0000

    Resolve DejaGnu hard stop
    
    	gcc/testsuite/
    	* gcc.target/i386/addr-space-3.c: Fix quoting in dg-final
    	scan-assembler directive.
    
    git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230038 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/testsuite/ChangeLog                      |    5 +++++
 gcc/testsuite/gcc.target/i386/addr-space-3.c |    2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git gcc/testsuite/ChangeLog gcc/testsuite/ChangeLog
index ca1991b..da4f940 100644
--- gcc/testsuite/ChangeLog
+++ gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-11-09  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* gcc.target/i386/addr-space-3.c: Fix quoting in dg-final
+	scan-assembler directive.
+
 2015-11-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	PR target/68129
diff --git gcc/testsuite/gcc.target/i386/addr-space-3.c gcc/testsuite/gcc.target/i386/addr-space-3.c
index 63f1f03..2b6f47e 100644
--- gcc/testsuite/gcc.target/i386/addr-space-3.c
+++ gcc/testsuite/gcc.target/i386/addr-space-3.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O" } */
-/* { dg-final { scan-assembler "[fg]s:0" } } */
+/* { dg-final { scan-assembler "\[fg]s:0" } } */
 
 void test(int *y)
 {


Grüße
 Thomas

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