From: Segher Boessenkool <segher@kernel.crashing.org>
To: Haochen Jiang <haochen.jiang@intel.com>
Cc: gcc-patches@gcc.gnu.org, rguenther@suse.de,
hongtao.liu@intel.com, ubizjak@gmail.com,
richard.earnshaw@arm.com, richard.sandiford@arm.com,
marcus.shawcroft@arm.com, kyrylo.tkachov@arm.com,
rth@gcc.gnu.org, gnu@amylaar.uk, claziss@synopsys.com,
nickc@redhat.com, ramana.radhakrishnan@arm.com,
aoliva@gcc.gnu.org, hubicka@ucw.cz, mfortune@gmail.com,
dje.gcc@gmail.com, linkw@gcc.gnu.org, uweigand@de.ibm.com,
krebbel@linux.ibm.com, olegendo@gcc.gnu.org, davem@redhat.com,
ebotcazou@libertysurf.fr, jeffreyalaw@gmail.com,
dave.anglin@bell.net
Subject: Re: [PATCH 0/2] Add a Fourth parameter for prefetch and Support Intel PREFETCHI
Date: Wed, 19 Oct 2022 15:49:05 -0500 [thread overview]
Message-ID: <20221019204905.GO25951@gate.crashing.org> (raw)
In-Reply-To: <20221014083406.8406-1-haochen.jiang@intel.com>
On Fri, Oct 14, 2022 at 04:34:04PM +0800, Haochen Jiang wrote:
> Sorry for the previous cover-letter stucking and disturbance and this
> is the right cover letter.
Hi!
Nothing in this cover letter tells me why you sent it to me? Maybe you
shouldn't have at all, just one patch touches Power code, or such?
Segher
prev parent reply other threads:[~2022-10-19 20:50 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-14 8:34 Haochen Jiang
2022-10-14 8:34 ` [PATCH 1/2] Add a parameter for the builtin function of prefetch to align with LLVM Haochen Jiang
2022-10-14 8:46 ` Hongtao Liu
2022-10-17 15:28 ` Richard Earnshaw
2022-10-18 9:20 ` [PATCH v2] " Haochen Jiang
2022-10-19 17:14 ` [PATCH 1/2] " Andrew Pinski
2022-10-19 21:14 ` Segher Boessenkool
2022-10-20 1:27 ` Hongtao Liu
2022-10-20 1:44 ` Jiang, Haochen
2022-10-20 17:25 ` Segher Boessenkool
2022-10-20 17:37 ` Andrew Pinski
2022-10-21 10:17 ` Richard Earnshaw
2022-10-21 18:08 ` Segher Boessenkool
2022-10-19 21:06 ` Segher Boessenkool
2022-10-20 1:39 ` Hongtao Liu
2022-10-20 3:12 ` Hongtao Liu
2022-10-20 18:44 ` Segher Boessenkool
2022-10-20 7:34 ` Jiang, Haochen
2022-10-20 18:54 ` Segher Boessenkool
2022-10-21 3:17 ` Jiang, Haochen
2022-10-24 10:00 ` Richard Sandiford
2022-10-24 21:19 ` Segher Boessenkool
2022-10-14 8:34 ` [PATCH 2/2] Support Intel prefetchit0/t1 Haochen Jiang
2022-10-20 3:45 ` H.J. Lu
2022-10-20 4:04 ` Hongtao Liu
2022-10-19 20:49 ` Segher Boessenkool [this message]
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