From: Haochen Jiang <haochen.jiang@intel.com>
To: gcc-patches@gcc.gnu.org
Cc: rguenther@suse.de, hongtao.liu@intel.com, ubizjak@gmail.com,
richard.earnshaw@arm.com, richard.sandiford@arm.com,
marcus.shawcroft@arm.com, kyrylo.tkachov@arm.com,
rth@gcc.gnu.org, gnu@amylaar.uk, claziss@synopsys.com,
nickc@redhat.com, ramana.radhakrishnan@arm.com,
aoliva@gcc.gnu.org, hubicka@ucw.cz, mfortune@gmail.com,
dje.gcc@gmail.com, segher@kernel.crashing.org, linkw@gcc.gnu.org,
uweigand@de.ibm.com, krebbel@linux.ibm.com, olegendo@gcc.gnu.org,
davem@redhat.com, ebotcazou@libertysurf.fr,
jeffreyalaw@gmail.com, dave.anglin@bell.net
Subject: [PATCH 0/2] Add a Fourth parameter for prefetch and Support Intel PREFETCHI
Date: Fri, 14 Oct 2022 16:34:04 +0800 [thread overview]
Message-ID: <20221014083406.8406-1-haochen.jiang@intel.com> (raw)
Hi all,
Sorry for the previous cover-letter stucking and disturbance and this
is the right cover letter.
These two patches aimed to add Intel PREFETCHI.
The information is based on newly released
Intel Architecture Instruction Set Extensions and Future Features.
The document comes following:
https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
The first patch added a fourth parameter for prefetch to align with LLVM
in middle end. Currently LLVM had a fourth parameter to indicate what is
prefetching. Also added a warning on backends that does not support
instruction prefetch in machine description file to tell users attempting
using prefetchi that the backend will change it to data prefetch.
The second patch was i386 specific and added PREFETCHI to i386.
Regtested on x86_64-pc-linux-gnu and cross-compiled to other backends.
For other backends, I ran through the compile test and no regressions found.
Since I did not have machines from other backends, could you kindly help
me to test with other machines? I suppose there should not have regressions
since I just added a warning to the md file and corresponding testcase.
Ok for trunk?
BRs,
Haochen
next reply other threads:[~2022-10-14 8:36 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-14 8:34 Haochen Jiang [this message]
2022-10-14 8:34 ` [PATCH 1/2] Add a parameter for the builtin function of prefetch to align with LLVM Haochen Jiang
2022-10-14 8:46 ` Hongtao Liu
2022-10-17 15:28 ` Richard Earnshaw
2022-10-18 9:20 ` [PATCH v2] " Haochen Jiang
2022-10-19 17:14 ` [PATCH 1/2] " Andrew Pinski
2022-10-19 21:14 ` Segher Boessenkool
2022-10-20 1:27 ` Hongtao Liu
2022-10-20 1:44 ` Jiang, Haochen
2022-10-20 17:25 ` Segher Boessenkool
2022-10-20 17:37 ` Andrew Pinski
2022-10-21 10:17 ` Richard Earnshaw
2022-10-21 18:08 ` Segher Boessenkool
2022-10-19 21:06 ` Segher Boessenkool
2022-10-20 1:39 ` Hongtao Liu
2022-10-20 3:12 ` Hongtao Liu
2022-10-20 18:44 ` Segher Boessenkool
2022-10-20 7:34 ` Jiang, Haochen
2022-10-20 18:54 ` Segher Boessenkool
2022-10-21 3:17 ` Jiang, Haochen
2022-10-24 10:00 ` Richard Sandiford
2022-10-24 21:19 ` Segher Boessenkool
2022-10-14 8:34 ` [PATCH 2/2] Support Intel prefetchit0/t1 Haochen Jiang
2022-10-20 3:45 ` H.J. Lu
2022-10-20 4:04 ` Hongtao Liu
2022-10-19 20:49 ` [PATCH 0/2] Add a Fourth parameter for prefetch and Support Intel PREFETCHI Segher Boessenkool
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