From: Andrea Corallo <andrea.corallo@arm.com>
To: <gcc-patches@gcc.gnu.org>
Cc: <kyrylo.tkachov@arm.com>, <Richard.Earnshaw@arm.com>,
Andrea Corallo <andrea.corallo@arm.com>
Subject: [PATCH 01/10] arm: Mve testsuite improvements
Date: Fri, 28 Apr 2023 13:29:53 +0200 [thread overview]
Message-ID: <20230428113002.482343-1-andrea.corallo@arm.com> (raw)
Hello all,
this patch improves a number of MVE tests in the testsuite for more
precise and better coverage using check-function-bodies instead of
scan-assembler checks. Also all intrusctions prescribed in the ACLE[1]
are now checked.
Best Regards
Andrea
[1] <https://github.com/ARM-software/acle>
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vld1q_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vld1q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld1q_z_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld4q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst2q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst4q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrbq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise.
---
.../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 29 +++++++++--
.../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 29 +++++++++--
.../arm/mve/intrinsics/vld1q_z_f16.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_f32.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_s16.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_s32.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_s8.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_u16.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_u32.c | 38 ++++++++++++--
.../arm/mve/intrinsics/vld1q_z_u8.c | 38 ++++++++++++--
.../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 37 +++++++++++---
.../mve/intrinsics/vldrbq_gather_offset_s16.c | 28 +++++++++--
.../mve/intrinsics/vldrbq_gather_offset_s32.c | 28 +++++++++--
.../mve/intrinsics/vldrbq_gather_offset_s8.c | 28 +++++++++--
.../mve/intrinsics/vldrbq_gather_offset_u16.c | 28 +++++++++--
.../mve/intrinsics/vldrbq_gather_offset_u32.c | 28 +++++++++--
.../mve/intrinsics/vldrbq_gather_offset_u8.c | 28 +++++++++--
.../intrinsics/vldrbq_gather_offset_z_s16.c | 36 +++++++++++--
.../intrinsics/vldrbq_gather_offset_z_s32.c | 36 +++++++++++--
.../intrinsics/vldrbq_gather_offset_z_s8.c | 36 +++++++++++--
.../intrinsics/vldrbq_gather_offset_z_u16.c | 36 +++++++++++--
.../intrinsics/vldrbq_gather_offset_z_u32.c | 36 +++++++++++--
.../intrinsics/vldrbq_gather_offset_z_u8.c | 36 +++++++++++--
.../arm/mve/intrinsics/vldrbq_s16.c | 19 ++++++-
.../arm/mve/intrinsics/vldrbq_s32.c | 19 ++++++-
.../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 20 ++++++--
.../arm/mve/intrinsics/vldrbq_u16.c | 19 ++++++-
.../arm/mve/intrinsics/vldrbq_u32.c | 19 ++++++-
.../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 20 ++++++--
.../arm/mve/intrinsics/vldrbq_z_s16.c | 23 ++++++++-
.../arm/mve/intrinsics/vldrbq_z_s32.c | 23 ++++++++-
.../arm/mve/intrinsics/vldrbq_z_s8.c | 25 ++++++++--
.../arm/mve/intrinsics/vldrbq_z_u16.c | 23 ++++++++-
.../arm/mve/intrinsics/vldrbq_z_u32.c | 23 ++++++++-
.../arm/mve/intrinsics/vldrbq_z_u8.c | 25 ++++++++--
.../mve/intrinsics/vldrdq_gather_base_s64.c | 19 ++++++-
.../mve/intrinsics/vldrdq_gather_base_u64.c | 19 ++++++-
.../intrinsics/vldrdq_gather_base_wb_s64.c | 24 ++++++---
.../intrinsics/vldrdq_gather_base_wb_u64.c | 24 ++++++---
.../intrinsics/vldrdq_gather_base_wb_z_s64.c | 31 +++++++++---
.../intrinsics/vldrdq_gather_base_wb_z_u64.c | 31 +++++++++---
.../mve/intrinsics/vldrdq_gather_base_z_s64.c | 23 ++++++++-
.../mve/intrinsics/vldrdq_gather_base_z_u64.c | 23 ++++++++-
.../mve/intrinsics/vldrdq_gather_offset_s64.c | 28 +++++++++--
.../mve/intrinsics/vldrdq_gather_offset_u64.c | 28 +++++++++--
.../intrinsics/vldrdq_gather_offset_z_s64.c | 36 +++++++++++--
.../intrinsics/vldrdq_gather_offset_z_u64.c | 36 +++++++++++--
.../vldrdq_gather_shifted_offset_s64.c | 28 +++++++++--
.../vldrdq_gather_shifted_offset_u64.c | 28 +++++++++--
.../vldrdq_gather_shifted_offset_z_s64.c | 36 +++++++++++--
.../vldrdq_gather_shifted_offset_z_u64.c | 36 +++++++++++--
.../arm/mve/intrinsics/vldrhq_f16.c | 20 ++++++--
.../mve/intrinsics/vldrhq_gather_offset_f16.c | 28 +++++++++--
.../mve/intrinsics/vldrhq_gather_offset_s16.c | 28 +++++++++--
.../mve/intrinsics/vldrhq_gather_offset_s32.c | 28 +++++++++--
.../mve/intrinsics/vldrhq_gather_offset_u16.c | 28 +++++++++--
.../mve/intrinsics/vldrhq_gather_offset_u32.c | 28 +++++++++--
.../intrinsics/vldrhq_gather_offset_z_f16.c | 36 +++++++++++--
.../intrinsics/vldrhq_gather_offset_z_s16.c | 36 +++++++++++--
.../intrinsics/vldrhq_gather_offset_z_s32.c | 36 +++++++++++--
.../intrinsics/vldrhq_gather_offset_z_u16.c | 36 +++++++++++--
.../intrinsics/vldrhq_gather_offset_z_u32.c | 36 +++++++++++--
.../vldrhq_gather_shifted_offset_f16.c | 28 +++++++++--
.../vldrhq_gather_shifted_offset_s16.c | 28 +++++++++--
.../vldrhq_gather_shifted_offset_s32.c | 28 +++++++++--
.../vldrhq_gather_shifted_offset_u16.c | 28 +++++++++--
.../vldrhq_gather_shifted_offset_u32.c | 28 +++++++++--
.../vldrhq_gather_shifted_offset_z_f16.c | 36 +++++++++++--
.../vldrhq_gather_shifted_offset_z_s16.c | 36 +++++++++++--
.../vldrhq_gather_shifted_offset_z_s32.c | 36 +++++++++++--
.../vldrhq_gather_shifted_offset_z_u16.c | 36 +++++++++++--
.../vldrhq_gather_shifted_offset_z_u32.c | 36 +++++++++++--
.../arm/mve/intrinsics/vldrhq_s16.c | 20 ++++++--
.../arm/mve/intrinsics/vldrhq_s32.c | 20 ++++++--
.../arm/mve/intrinsics/vldrhq_u16.c | 20 ++++++--
.../arm/mve/intrinsics/vldrhq_u32.c | 20 ++++++--
.../arm/mve/intrinsics/vldrhq_z_f16.c | 23 +++++++--
.../arm/mve/intrinsics/vldrhq_z_s16.c | 23 +++++++--
.../arm/mve/intrinsics/vldrhq_z_s32.c | 25 ++++++++--
.../arm/mve/intrinsics/vldrhq_z_u16.c | 23 +++++++--
.../arm/mve/intrinsics/vldrhq_z_u32.c | 25 ++++++++--
.../arm/mve/intrinsics/vldrwq_f32.c | 18 ++++++-
.../mve/intrinsics/vldrwq_gather_base_f32.c | 19 ++++++-
.../mve/intrinsics/vldrwq_gather_base_s32.c | 19 ++++++-
.../mve/intrinsics/vldrwq_gather_base_u32.c | 19 ++++++-
.../intrinsics/vldrwq_gather_base_wb_f32.c | 22 ++++++--
.../intrinsics/vldrwq_gather_base_wb_s32.c | 22 ++++++--
.../intrinsics/vldrwq_gather_base_wb_u32.c | 22 ++++++--
.../intrinsics/vldrwq_gather_base_wb_z_f32.c | 28 ++++++++---
.../intrinsics/vldrwq_gather_base_wb_z_s32.c | 28 ++++++++---
.../intrinsics/vldrwq_gather_base_wb_z_u32.c | 28 ++++++++---
.../mve/intrinsics/vldrwq_gather_base_z_f32.c | 23 ++++++++-
.../mve/intrinsics/vldrwq_gather_base_z_s32.c | 23 ++++++++-
.../mve/intrinsics/vldrwq_gather_base_z_u32.c | 23 ++++++++-
.../mve/intrinsics/vldrwq_gather_offset_f32.c | 28 +++++++++--
.../mve/intrinsics/vldrwq_gather_offset_s32.c | 28 +++++++++--
.../mve/intrinsics/vldrwq_gather_offset_u32.c | 28 +++++++++--
.../intrinsics/vldrwq_gather_offset_z_f32.c | 36 +++++++++++--
.../intrinsics/vldrwq_gather_offset_z_s32.c | 36 +++++++++++--
.../intrinsics/vldrwq_gather_offset_z_u32.c | 36 +++++++++++--
.../vldrwq_gather_shifted_offset_f32.c | 28 +++++++++--
.../vldrwq_gather_shifted_offset_s32.c | 28 +++++++++--
.../vldrwq_gather_shifted_offset_u32.c | 28 +++++++++--
.../vldrwq_gather_shifted_offset_z_f32.c | 36 +++++++++++--
.../vldrwq_gather_shifted_offset_z_s32.c | 36 +++++++++++--
.../vldrwq_gather_shifted_offset_z_u32.c | 36 +++++++++++--
.../arm/mve/intrinsics/vldrwq_s32.c | 18 ++++++-
.../arm/mve/intrinsics/vldrwq_u32.c | 18 ++++++-
.../arm/mve/intrinsics/vldrwq_z_f32.c | 23 +++++++--
.../arm/mve/intrinsics/vldrwq_z_s32.c | 23 +++++++--
.../arm/mve/intrinsics/vldrwq_z_u32.c | 23 +++++++--
.../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_s8.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 37 +++++++++++---
.../gcc.target/arm/mve/intrinsics/vst4q_f16.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_f32.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_s16.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_s32.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_s8.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_u16.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_u32.c | 50 +++++++++++--------
.../gcc.target/arm/mve/intrinsics/vst4q_u8.c | 50 +++++++++++--------
.../arm/mve/intrinsics/vstrbq_p_s16.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_p_s32.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_p_s8.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_p_u16.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_p_u32.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_p_u8.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrbq_s16.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrbq_s32.c | 32 +++++++++---
.../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 32 +++++++++---
.../intrinsics/vstrbq_scatter_offset_p_s16.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_p_s32.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_p_s8.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_p_u16.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_p_u32.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_p_u8.c | 40 ++++++++++++---
.../intrinsics/vstrbq_scatter_offset_s16.c | 32 +++++++++---
.../intrinsics/vstrbq_scatter_offset_s32.c | 32 +++++++++---
.../mve/intrinsics/vstrbq_scatter_offset_s8.c | 32 +++++++++---
.../intrinsics/vstrbq_scatter_offset_u16.c | 32 +++++++++---
.../intrinsics/vstrbq_scatter_offset_u32.c | 32 +++++++++---
.../mve/intrinsics/vstrbq_scatter_offset_u8.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrbq_u16.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrbq_u32.c | 32 +++++++++---
.../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrhq_f16.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrhq_p_f16.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrhq_p_s16.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrhq_p_s32.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrhq_p_u16.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrhq_p_u32.c | 40 ++++++++++++---
.../arm/mve/intrinsics/vstrhq_s16.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrhq_s32.c | 32 +++++++++---
.../intrinsics/vstrhq_scatter_offset_f16.c | 32 +++++++++---
.../intrinsics/vstrhq_scatter_offset_p_f16.c | 40 ++++++++++++---
.../intrinsics/vstrhq_scatter_offset_p_s16.c | 40 ++++++++++++---
.../intrinsics/vstrhq_scatter_offset_p_s32.c | 40 ++++++++++++---
.../intrinsics/vstrhq_scatter_offset_p_u16.c | 40 ++++++++++++---
.../intrinsics/vstrhq_scatter_offset_p_u32.c | 40 ++++++++++++---
.../intrinsics/vstrhq_scatter_offset_s16.c | 32 +++++++++---
.../intrinsics/vstrhq_scatter_offset_s32.c | 32 +++++++++---
.../intrinsics/vstrhq_scatter_offset_u16.c | 32 +++++++++---
.../intrinsics/vstrhq_scatter_offset_u32.c | 32 +++++++++---
.../vstrhq_scatter_shifted_offset_f16.c | 32 +++++++++---
.../vstrhq_scatter_shifted_offset_p_f16.c | 40 ++++++++++++---
.../vstrhq_scatter_shifted_offset_p_s16.c | 40 ++++++++++++---
.../vstrhq_scatter_shifted_offset_p_s32.c | 40 ++++++++++++---
.../vstrhq_scatter_shifted_offset_p_u16.c | 40 ++++++++++++---
.../vstrhq_scatter_shifted_offset_p_u32.c | 40 ++++++++++++---
.../vstrhq_scatter_shifted_offset_s16.c | 32 +++++++++---
.../vstrhq_scatter_shifted_offset_s32.c | 32 +++++++++---
.../vstrhq_scatter_shifted_offset_u16.c | 32 +++++++++---
.../vstrhq_scatter_shifted_offset_u32.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrhq_u16.c | 32 +++++++++---
.../arm/mve/intrinsics/vstrhq_u32.c | 32 +++++++++---
194 files changed, 5171 insertions(+), 1035 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
index 699e40d0e3b..f0a9243a6d5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f16.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base)
+foo (float16_t const *base)
{
return vld1q_f16 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base)
+foo1 (float16_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
index 86592303362..129d256dd86 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_f32.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base)
+foo (float32_t const *base)
{
return vld1q_f32 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base)
+foo1 (float32_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
index f4f04f534db..a95bf6c4260 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s16.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base)
+foo (int16_t const *base)
{
return vld1q_s16 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base)
+foo1 (int16_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
index e0f66166751..bb24e52d164 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s32.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base)
+foo (int32_t const *base)
{
return vld1q_s32 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base)
+foo1 (int32_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
index 1b7edead6b1..0d89c2f19cd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_s8.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base)
+foo (int8_t const *base)
{
return vld1q_s8 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo1 (int8_t const * base)
+foo1 (int8_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrb.8" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
index 50e1f5cedcb..a31baf75fed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u16.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base)
+foo (uint16_t const *base)
{
return vld1q_u16 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base)
+foo1 (uint16_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
index a13fe824382..7d4f858c784 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u32.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base)
+foo (uint32_t const *base)
{
return vld1q_u32 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base)
+foo1 (uint32_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
index dfd1deb93f0..455ec5ce105 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_u8.c
@@ -1,20 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base)
+foo (uint8_t const *base)
{
return vld1q_u8 (base);
}
+
+/*
+**foo1:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint8_t const * base)
+foo1 (uint8_t const *base)
{
return vld1q (base);
}
-/* { dg-final { scan-assembler-times "vldrb.8" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
index 3c32e408e42..951b795fd59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, mve_pred16_t p)
+foo (float16_t const *base, mve_pred16_t p)
{
return vld1q_z_f16 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base, mve_pred16_t p)
+foo1 (float16_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
index 3fc935c889b..4b43f0f4be3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, mve_pred16_t p)
+foo (float32_t const *base, mve_pred16_t p)
{
return vld1q_z_f32 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base, mve_pred16_t p)
+foo1 (float32_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
index 49cc81092f3..a65c10c5fc1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, mve_pred16_t p)
+foo (int16_t const *base, mve_pred16_t p)
{
return vld1q_z_s16 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base, mve_pred16_t p)
+foo1 (int16_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
index ec317cd70e8..31749046fc6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, mve_pred16_t p)
+foo (int32_t const *base, mve_pred16_t p)
{
return vld1q_z_s32 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base, mve_pred16_t p)
+foo1 (int32_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
index 538c140e78e..990522faee8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_s8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base, mve_pred16_t p)
+foo (int8_t const *base, mve_pred16_t p)
{
return vld1q_z_s8 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo1 (int8_t const * base, mve_pred16_t p)
+foo1 (int8_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrbt.8" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
index e5e588a187e..8a41b42306c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, mve_pred16_t p)
+foo (uint16_t const *base, mve_pred16_t p)
{
return vld1q_z_u16 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base, mve_pred16_t p)
+foo1 (uint16_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
index 999beefa7e8..67b200f6028 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, mve_pred16_t p)
+foo (uint32_t const *base, mve_pred16_t p)
{
return vld1q_z_u32 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base, mve_pred16_t p)
+foo1 (uint32_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
index 172053c7142..c113a0db3e1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld1q_z_u8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base, mve_pred16_t p)
+foo (uint8_t const *base, mve_pred16_t p)
{
return vld1q_z_u8 (base, p);
}
+
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint8_t const * base, mve_pred16_t p)
+foo1 (uint8_t const *base, mve_pred16_t p)
{
return vld1q_z (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 2 } } */
-/* { dg-final { scan-assembler-times "vldrbt.8" 2 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
index db50f27bb60..e554cdab33d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f16.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
float16x8x4_t
-foo (float16_t const * addr)
+foo (float16_t const *addr)
{
return vld4q_f16 (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
-/* { dg-final { scan-assembler "vld41.16" } } */
-/* { dg-final { scan-assembler "vld42.16" } } */
-/* { dg-final { scan-assembler "vld43.16" } } */
+/*
+**foo1:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
float16x8x4_t
-foo1 (float16_t const * addr)
+foo1 (float16_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
index de3fe0e79fc..be61054d331 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_f32.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
float32x4x4_t
-foo (float32_t const * addr)
+foo (float32_t const *addr)
{
return vld4q_f32 (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
-/* { dg-final { scan-assembler "vld41.32" } } */
-/* { dg-final { scan-assembler "vld42.32" } } */
-/* { dg-final { scan-assembler "vld43.32" } } */
+/*
+**foo1:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
float32x4x4_t
-foo1 (float32_t const * addr)
+foo1 (float32_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
index 41a9dd86a4f..f9cbc17da61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s16.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int16x8x4_t
-foo (int16_t const * addr)
+foo (int16_t const *addr)
{
return vld4q_s16 (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
-/* { dg-final { scan-assembler "vld41.16" } } */
-/* { dg-final { scan-assembler "vld42.16" } } */
-/* { dg-final { scan-assembler "vld43.16" } } */
+/*
+**foo1:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int16x8x4_t
-foo1 (int16_t const * addr)
+foo1 (int16_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
index 6f29c1b28c0..056e26023a9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s32.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int32x4x4_t
-foo (int32_t const * addr)
+foo (int32_t const *addr)
{
return vld4q_s32 (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
-/* { dg-final { scan-assembler "vld41.32" } } */
-/* { dg-final { scan-assembler "vld42.32" } } */
-/* { dg-final { scan-assembler "vld43.32" } } */
+/*
+**foo1:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int32x4x4_t
-foo1 (int32_t const * addr)
+foo1 (int32_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
index 7701facb55c..2bec51ab4f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_s8.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int8x16x4_t
-foo (int8_t const * addr)
+foo (int8_t const *addr)
{
return vld4q_s8 (addr);
}
-/* { dg-final { scan-assembler "vld40.8" } } */
-/* { dg-final { scan-assembler "vld41.8" } } */
-/* { dg-final { scan-assembler "vld42.8" } } */
-/* { dg-final { scan-assembler "vld43.8" } } */
+/*
+**foo1:
+** ...
+** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
int8x16x4_t
-foo1 (int8_t const * addr)
+foo1 (int8_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
index 5a5e22d36d0..a2c98670174 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u16.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint16x8x4_t
-foo (uint16_t const * addr)
+foo (uint16_t const *addr)
{
return vld4q_u16 (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
-/* { dg-final { scan-assembler "vld41.16" } } */
-/* { dg-final { scan-assembler "vld42.16" } } */
-/* { dg-final { scan-assembler "vld43.16" } } */
+/*
+**foo1:
+** ...
+** vld40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint16x8x4_t
-foo1 (uint16_t const * addr)
+foo1 (uint16_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
index e40d9b24fb4..4bbe56db205 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u32.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint32x4x4_t
-foo (uint32_t const * addr)
+foo (uint32_t const *addr)
{
return vld4q_u32 (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
-/* { dg-final { scan-assembler "vld41.32" } } */
-/* { dg-final { scan-assembler "vld42.32" } } */
-/* { dg-final { scan-assembler "vld43.32" } } */
+/*
+**foo1:
+** ...
+** vld40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint32x4x4_t
-foo1 (uint32_t const * addr)
+foo1 (uint32_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
index 0d9abc36190..63353dba4b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld4q_u8.c
@@ -1,24 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint8x16x4_t
-foo (uint8_t const * addr)
+foo (uint8_t const *addr)
{
return vld4q_u8 (addr);
}
-/* { dg-final { scan-assembler "vld40.8" } } */
-/* { dg-final { scan-assembler "vld41.8" } } */
-/* { dg-final { scan-assembler "vld42.8" } } */
-/* { dg-final { scan-assembler "vld43.8" } } */
+/*
+**foo1:
+** ...
+** vld40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vld43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
uint8x16x4_t
-foo1 (uint8_t const * addr)
+foo1 (uint8_t const *addr)
{
return vld4q (addr);
}
-/* { dg-final { scan-assembler "vld40.8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
index 0f6c24dde0a..ce4255b8430 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int8_t const * base, uint16x8_t offset)
+foo (int8_t const *base, uint16x8_t offset)
{
return vldrbq_gather_offset_s16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.s16" } } */
+/*
+**foo1:
+** ...
+** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int8_t const * base, uint16x8_t offset)
+foo1 (int8_t const *base, uint16x8_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
index 4c1415d2c5f..cd5eb6b9e66 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int8_t const * base, uint32x4_t offset)
+foo (int8_t const *base, uint32x4_t offset)
{
return vldrbq_gather_offset_s32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.s32" } } */
+/*
+**foo1:
+** ...
+** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int8_t const * base, uint32x4_t offset)
+foo1 (int8_t const *base, uint32x4_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
index 4108bbae3e2..5ef4a895082 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base, uint8x16_t offset)
+foo (int8_t const *base, uint8x16_t offset)
{
return vldrbq_gather_offset_s8 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u8" } } */
+/*
+**foo1:
+** ...
+** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int8x16_t
-foo1 (int8_t const * base, uint8x16_t offset)
+foo1 (int8_t const *base, uint8x16_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
index 5d5b005a8f4..cfec3c66a54 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint8_t const * base, uint16x8_t offset)
+foo (uint8_t const *base, uint16x8_t offset)
{
return vldrbq_gather_offset_u16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u16" } } */
+/*
+**foo1:
+** ...
+** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint8_t const * base, uint16x8_t offset)
+foo1 (uint8_t const *base, uint16x8_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
index 7c2d92b7c58..f416a03c325 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint8_t const * base, uint32x4_t offset)
+foo (uint8_t const *base, uint32x4_t offset)
{
return vldrbq_gather_offset_u32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u32" } } */
+/*
+**foo1:
+** ...
+** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint8_t const * base, uint32x4_t offset)
+foo1 (uint8_t const *base, uint32x4_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
index 110f9db0296..e8bdd1eabb6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base, uint8x16_t offset)
+foo (uint8_t const *base, uint8x16_t offset)
{
return vldrbq_gather_offset_u8 (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u8" } } */
+/*
+**foo1:
+** ...
+** vldrb.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint8_t const * base, uint8x16_t offset)
+foo1 (uint8_t const *base, uint8x16_t offset)
{
return vldrbq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrb.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
index f0616b5ab8d..9a134609780 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_s16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int8_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (int8_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
index 5bf291d4ba5..f47e02076b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_s32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int8_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (int8_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
index a3798a01b5f..e2b58b47f1d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
+foo (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_s8 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int8x16_t
-foo1 (int8_t const * base, uint8x16_t offset, mve_pred16_t p)
+foo1 (int8_t const *base, uint8x16_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
index 578bd15c66e..2a1801fc941 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_u16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint8_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (uint8_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
index a58044af176..c415fe26ba8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_u32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint8_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (uint8_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
index 0e06833961b..90a19680999 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
+foo (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z_u8 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo1 (uint8_t const * base, uint8x16_t offset, mve_pred16_t p)
+foo1 (uint8_t const *base, uint8x16_t offset, mve_pred16_t p)
{
return vldrbq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrbt.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
index 4403092b988..c54e04dbdda 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s16.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int8_t const * base)
+foo (int8_t const *base)
{
return vldrbq_s16 (base);
}
-/* { dg-final { scan-assembler "vldrb.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
index 95ea9364ffc..1623f53d971 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s32.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int8_t const * base)
+foo (int8_t const *base)
{
return vldrbq_s32 (base);
}
-/* { dg-final { scan-assembler "vldrb.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
index ec2f2176ccf..b1c141ae287 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_s8.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base)
+foo (int8_t const *base)
{
return vldrbq_s8 (base);
}
-/* { dg-final { scan-assembler-times "vldrb.8" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
index 2fb297f92ad..203e2e9de83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u16.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint8_t const * base)
+foo (uint8_t const *base)
{
return vldrbq_u16 (base);
}
-/* { dg-final { scan-assembler "vldrb.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
index dc555c1be2d..2005c3a2bbf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u32.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint8_t const * base)
+foo (uint8_t const *base)
{
return vldrbq_u32 (base);
}
-/* { dg-final { scan-assembler "vldrb.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
index d07b472a4ff..b4c109eb147 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_u8.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base)
+foo (uint8_t const *base)
{
return vldrbq_u8 (base);
}
-/* { dg-final { scan-assembler-times "vldrb.8" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
index 8bd08ab5cff..813f6a31a25 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int8_t const * base, mve_pred16_t p)
+foo (int8_t const *base, mve_pred16_t p)
{
return vldrbq_z_s16 (base, p);
}
-/* { dg-final { scan-assembler "vldrbt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
index 0309ff4111b..10e1dbf6ad9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int8_t const * base, mve_pred16_t p)
+foo (int8_t const *base, mve_pred16_t p)
{
return vldrbq_z_s32 (base, p);
}
-/* { dg-final { scan-assembler "vldrbt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
index aed3c910063..de361d4c9a0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8_t const * base, mve_pred16_t p)
+foo (int8_t const *base, mve_pred16_t p)
{
return vldrbq_z_s8 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrbt.8" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
index adcb0cfa2ae..ba4401045e7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint8_t const * base, mve_pred16_t p)
+foo (uint8_t const *base, mve_pred16_t p)
{
return vldrbq_z_u16 (base, p);
}
-/* { dg-final { scan-assembler "vldrbt.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
index 6b7bce60d62..adc88a59a71 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint8_t const * base, mve_pred16_t p)
+foo (uint8_t const *base, mve_pred16_t p)
{
return vldrbq_z_u32 (base, p);
}
-/* { dg-final { scan-assembler "vldrbt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
index 54c61e74454..b13d9fb426f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16_t
-foo (uint8_t const * base, mve_pred16_t p)
+foo (uint8_t const *base, mve_pred16_t p)
{
return vldrbq_z_u8 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrbt.8" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
index 6499f930c40..3539c1e40ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
foo (uint64x2_t addr)
{
- return vldrdq_gather_base_s64 (addr, 8);
+ return vldrdq_gather_base_s64 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrd.64" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
index 9a11638a261..2245df61a4e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint64x2_t addr)
{
- return vldrdq_gather_base_u64 (addr, 8);
+ return vldrdq_gather_base_u64 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrd.64" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
index a9b1f81b62d..e3fd7f16a31 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c
@@ -1,16 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
int64x2_t
-foo (uint64x2_t * addr)
+foo (uint64x2_t *addr)
{
- return vldrdq_gather_base_wb_s64 (addr, 8);
+ return vldrdq_gather_base_wb_s64 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
index e32a06695ae..161cf00b65e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c
@@ -1,16 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
uint64x2_t
-foo (uint64x2_t * addr)
+foo (uint64x2_t *addr)
{
- return vldrdq_gather_base_wb_u64 (addr, 8);
+ return vldrdq_gather_base_wb_u64 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrd.64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
index bb06cf88e32..0716baa635a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_s64.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
#include "arm_mve.h"
-int64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
+int64x2_t
+foo (uint64x2_t *addr, mve_pred16_t p)
{
- return vldrdq_gather_base_wb_z_s64 (addr, 1016, p);
+ return vldrdq_gather_base_wb_z_s64 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
index 558115d49ef..242c7c06e27 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_wb_z_u64.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
#include "arm_mve.h"
-uint64x2_t foo (uint64x2_t * addr, mve_pred16_t p)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
+uint64x2_t
+foo (uint64x2_t *addr, mve_pred16_t p)
{
- return vldrdq_gather_base_wb_z_u64 (addr, 8, p);
+ return vldrdq_gather_base_wb_z_u64 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vldrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler-times "vldrw.u32" 1 } } */
-/* { dg-final { scan-assembler-times "vstrw.32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
index d7455b49206..d451f4e693f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
foo (uint64x2_t addr, mve_pred16_t p)
{
- return vldrdq_gather_base_z_s64 (addr, 8, p);
+ return vldrdq_gather_base_z_s64 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
index 07f72d422b4..508db3ca538 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint64x2_t addr, mve_pred16_t p)
{
- return vldrdq_gather_base_z_u64 (addr, 8, p);
+ return vldrdq_gather_base_z_u64 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
index 1d2d904efc4..9431491f3fd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
-foo (int64_t const * base, uint64x2_t offset)
+foo (int64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_offset_s64 (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+/*
+**foo1:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
-foo1 (int64_t const * base, uint64x2_t offset)
+foo1 (int64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
index 49a3b134d2f..11c0872f5a7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo (uint64_t const * base, uint64x2_t offset)
+foo (uint64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_offset_u64 (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+/*
+**foo1:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo1 (uint64_t const * base, uint64x2_t offset)
+foo1 (uint64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
index 1ff5f2acd1b..f474cbef788 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
-foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_offset_z_s64 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int64x2_t
-foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
index 63b2254d171..19136d7f451 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_offset_z_u64 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
index 4feb9c06fcd..ad11d8fa5cb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
int64x2_t
-foo (int64_t const * base, uint64x2_t offset)
+foo (int64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_shifted_offset_s64 (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+/*
+**foo1:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
int64x2_t
-foo1 (int64_t const * base, uint64x2_t offset)
+foo1 (int64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
index 999735039c8..a466494974b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo (uint64_t const * base, uint64x2_t offset)
+foo (uint64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_shifted_offset_u64 (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+/*
+**foo1:
+** ...
+** vldrd.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo1 (uint64_t const * base, uint64x2_t offset)
+foo1 (uint64_t const *base, uint64x2_t offset)
{
return vldrdq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrd.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
index 77303a47a08..3555105d09e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
int64x2_t
-foo (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_shifted_offset_z_s64 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
int64x2_t
-foo1 (int64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo1 (int64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
index 0273b242031..f7cfbfcddb3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_shifted_offset_z_u64 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrdt.u64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|)
+** ...
+*/
uint64x2_t
-foo1 (uint64_t const * base, uint64x2_t offset, mve_pred16_t p)
+foo1 (uint64_t const *base, uint64x2_t offset, mve_pred16_t p)
{
return vldrdq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrdt.u64" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
index 05bef418d82..87c746f4ad7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_f16.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base)
+foo (float16_t const *base)
{
return vldrhq_f16 (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
index 525e54c72f5..287276e41f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, uint16x8_t offset)
+foo (float16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset_f16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.f16" } } */
+/*
+**foo1:
+** ...
+** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base, uint16x8_t offset)
+foo1 (float16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
index 47ef03445b4..e2493a62b3a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, uint16x8_t offset)
+foo (int16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset_s16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+/*
+**foo1:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base, uint16x8_t offset)
+foo1 (int16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
index 39379aaedd3..5d1e348cc86 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base, uint32x4_t offset)
+foo (int16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_offset_s32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.s32" } } */
+/*
+**foo1:
+** ...
+** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int16_t const * base, uint32x4_t offset)
+foo1 (int16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
index fa345e24b48..6d5f6f877dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, uint16x8_t offset)
+foo (uint16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset_u16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+/*
+**foo1:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base, uint16x8_t offset)
+foo1 (uint16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
index b888660dc37..c39afbe6119 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base, uint32x4_t offset)
+foo (uint16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_offset_u32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u32" } } */
+/*
+**foo1:
+** ...
+** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint16_t const * base, uint32x4_t offset)
+foo1 (uint16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
index 7ee84232f04..53c673e3644 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z_f16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
index 9b354fad50d..1e68a77824e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z_s16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
index 0e252291944..06c208f31c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z_s32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
index 763e33d90bb..f50f026b00e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z_u16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
index 36baa252aa4..eff32dc6718 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z_u32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
index 843904a7041..f8468be41fa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, uint16x8_t offset)
+foo (float16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset_f16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.f16" } } */
+/*
+**foo1:
+** ...
+** vldrh.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base, uint16x8_t offset)
+foo1 (float16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
index 6d013c835b5..ac2491ea143 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, uint16x8_t offset)
+foo (int16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset_s16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+/*
+**foo1:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base, uint16x8_t offset)
+foo1 (int16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
index 5ec8e8c1dc8..6919b3a3cc2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base, uint32x4_t offset)
+foo (int16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_shifted_offset_s32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.s32" } } */
+/*
+**foo1:
+** ...
+** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int16_t const * base, uint32x4_t offset)
+foo1 (int16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
index fa5f3d04548..7e8fdf3799d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, uint16x8_t offset)
+foo (uint16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset_u16 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+/*
+**foo1:
+** ...
+** vldrh.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base, uint16x8_t offset)
+foo1 (uint16_t const *base, uint16x8_t offset)
{
return vldrhq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
index 227b18d7864..de2d22d985d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base, uint32x4_t offset)
+foo (uint16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_shifted_offset_u32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u32" } } */
+/*
+**foo1:
+** ...
+** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint16_t const * base, uint32x4_t offset)
+foo1 (uint16_t const *base, uint32x4_t offset)
{
return vldrhq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrh.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
index cae37837c7e..a55ada003ed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z_f16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.f16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
float16x8_t
-foo1 (float16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (float16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
index 1aff290a6b0..ee57d77e3db 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z_s16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (int16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
index 92ee073adf9..9f8963f56bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z_s32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (int16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
index 792510d3639..90be7020ac2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z_u16 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo1 (uint16_t const * base, uint16x8_t offset, mve_pred16_t p)
+foo1 (uint16_t const *base, uint16x8_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
index 8ae845418e8..0ff6d021b51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z_u32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint16_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (uint16_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrhq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrht.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
index 7c977b6a699..107ce22856b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s16.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base)
+foo (int16_t const *base)
{
return vldrhq_s16 (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
index 229b52163fa..5cc864c38e4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_s32.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base)
+foo (int16_t const *base)
{
return vldrhq_s32 (base);
}
-/* { dg-final { scan-assembler-times "vldrh.s32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
index 07f6d9e3944..12f807da03b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u16.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base)
+foo (uint16_t const *base)
{
return vldrhq_u16 (base);
}
-/* { dg-final { scan-assembler-times "vldrh.16" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
index cd24f01831f..5d4f34f9789 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_u32.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrh.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base)
+foo (uint16_t const *base)
{
return vldrhq_u32 (base);
}
-/* { dg-final { scan-assembler-times "vldrh.u32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
index dd0fc9c7b73..582061bbab3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8_t
-foo (float16_t const * base, mve_pred16_t p)
+foo (float16_t const *base, mve_pred16_t p)
{
return vldrhq_z_f16 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
index 36d3458d95c..dc32460ccdd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16_t const * base, mve_pred16_t p)
+foo (int16_t const *base, mve_pred16_t p)
{
return vldrhq_z_s16 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
index 9c67b479be7..15dd77cb36c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.s32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int16_t const * base, mve_pred16_t p)
+foo (int16_t const *base, mve_pred16_t p)
{
return vldrhq_z_s32 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrht.s32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
index 26354b5971a..91ab2caf1c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8_t
-foo (uint16_t const * base, mve_pred16_t p)
+foo (uint16_t const *base, mve_pred16_t p)
{
return vldrhq_z_u16 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrht.16" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
index 948fe5ee5b4..1682ec1987a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrht.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint16_t const * base, mve_pred16_t p)
+foo (uint16_t const *base, mve_pred16_t p)
{
return vldrhq_z_u32 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrht.u32" 1 } } */
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
index 143079aa23f..9cf47332b38 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_f32.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base)
+foo (float32_t const *base)
{
return vldrwq_f32 (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
index 5e0faaad8dd..c3f052efbc6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
foo (uint32x4_t addr)
{
- return vldrwq_gather_base_f32 (addr, 4);
+ return vldrwq_gather_base_f32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
index 8ca44199e3e..f2dbcfb9f6e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_s32.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
foo (uint32x4_t addr)
{
- return vldrwq_gather_base_s32 (addr, 4);
+ return vldrwq_gather_base_s32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
index 3c3e90f1c0a..0926689805f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_u32.c
@@ -1,13 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t addr)
{
- return vldrwq_gather_base_u32 (addr, 4);
+ return vldrwq_gather_base_u32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
index 8e2994f75d7..f9cd0a3ffe0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c
@@ -1,16 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
float32x4_t
-foo (uint32x4_t * addr)
+foo (uint32x4_t *addr)
{
- return vldrwq_gather_base_wb_f32 (addr, 8);
+ return vldrwq_gather_base_wb_f32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
index e5054738b75..b8f16969a31 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c
@@ -1,16 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
int32x4_t
-foo (uint32x4_t * addr)
+foo (uint32x4_t *addr)
{
- return vldrwq_gather_base_wb_s32 (addr, 8);
+ return vldrwq_gather_base_wb_s32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
index 7f39414143b..387d0115f46 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c
@@ -1,16 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32x4_t * addr)
+foo (uint32x4_t *addr)
{
- return vldrwq_gather_base_wb_u32 (addr, 8);
+ return vldrwq_gather_base_wb_u32 (addr, 0);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vldrw.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
index 1e57ca40739..bea7ecdee83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_f32.c
@@ -1,18 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
float32x4_t
-foo (uint32x4_t * addr, mve_pred16_t p)
+foo (uint32x4_t *addr, mve_pred16_t p)
{
- return vldrwq_gather_base_wb_z_f32 (addr, 8, p);
+ return vldrwq_gather_base_wb_z_f32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vmsr\tp0, r\[0-9\]+.*" } } */
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
index f8d77fdfd5b..4469ac14a0a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_s32.c
@@ -1,18 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
int32x4_t
-foo (uint32x4_t * addr, mve_pred16_t p)
+foo (uint32x4_t *addr, mve_pred16_t p)
{
- return vldrwq_gather_base_wb_z_s32 (addr, 8, p);
+ return vldrwq_gather_base_wb_z_s32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vmsr\tp0, r\[0-9\]+.*" } } */
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
index 8a0e109c70c..9d4d81b3afe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_wb_z_u32.c
@@ -1,18 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32x4_t * addr, mve_pred16_t p)
+foo (uint32x4_t *addr, mve_pred16_t p)
{
- return vldrwq_gather_base_wb_z_u32 (addr, 8, p);
+ return vldrwq_gather_base_wb_z_u32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
-/* { dg-final { scan-assembler "vmsr\tp0, r\[0-9\]+.*" } } */
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vldrwt.u32\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" } } */
-/* { dg-final { scan-assembler "vstrw.32\tq\[0-9\]+, \\\[r\[0-9\]+\\\]" } } */
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
index 81aac523728..905000a31a8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
foo (uint32x4_t addr, mve_pred16_t p)
{
- return vldrwq_gather_base_z_f32 (addr, 4, p);
+ return vldrwq_gather_base_z_f32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
index fec49bbde06..3ee6a219b80 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_s32.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
foo (uint32x4_t addr, mve_pred16_t p)
{
- return vldrwq_gather_base_z_s32 (addr, 4, p);
+ return vldrwq_gather_base_z_s32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
index b64a11d6620..488adf58b78 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_u32.c
@@ -1,13 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t addr, mve_pred16_t p)
{
- return vldrwq_gather_base_z_u32 (addr, 4, p);
+ return vldrwq_gather_base_z_u32 (addr, 0, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
index 6a4ea041137..a513452a12d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, uint32x4_t offset)
+foo (float32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset_f32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base, uint32x4_t offset)
+foo1 (float32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
index ee15fa4a0b0..57ad6583153 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, uint32x4_t offset)
+foo (int32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset_s32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base, uint32x4_t offset)
+foo1 (int32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
index d344779058f..30fc36c6f97 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, uint32x4_t offset)
+foo (uint32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset_u32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base, uint32x4_t offset)
+foo1 (uint32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
index 93253119418..1f84edcdb8e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z_f32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
index 4537427bef3..3fe5a986cc3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z_s32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
index e59c4c996bf..087e5d0ce1e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z_u32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
index 1ba2cb0ccde..bed16f5fa72 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, uint32x4_t offset)
+foo (float32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset_f32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base, uint32x4_t offset)
+foo1 (float32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
index 39d976bb676..e6c589020f3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, uint32x4_t offset)
+foo (int32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset_s32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base, uint32x4_t offset)
+foo1 (int32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
index 971f482dfff..8e287da0dbf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, uint32x4_t offset)
+foo (uint32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset_u32 (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+/*
+**foo1:
+** ...
+** vldrw.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base, uint32x4_t offset)
+foo1 (uint32_t const *base, uint32x4_t offset)
{
return vldrwq_gather_shifted_offset (base, offset);
}
-/* { dg-final { scan-assembler "vldrw.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
index e4110cd50aa..f69d67fd2aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z_f32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
float32x4_t
-foo1 (float32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (float32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
index 71dd8a757ce..3aff6de03b6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z_s32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (int32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
index f95d6f0f708..ed8873d0c53 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z_u32 (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.u32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #2\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo1 (uint32_t const * base, uint32x4_t offset, mve_pred16_t p)
+foo1 (uint32_t const *base, uint32x4_t offset, mve_pred16_t p)
{
return vldrwq_gather_shifted_offset_z (base, offset, p);
}
-/* { dg-final { scan-assembler "vldrwt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
index 860dd324d25..87c3ac9f9d2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_s32.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base)
+foo (int32_t const *base)
{
return vldrwq_s32 (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
index 513ed49fb6e..5b560c534a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_u32.c
@@ -1,14 +1,28 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vldrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base)
+foo (uint32_t const *base)
{
return vldrwq_u32 (base);
}
-/* { dg-final { scan-assembler-times "vldrw.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
index 3e0a6a60bcf..14a61fcfbd4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4_t
-foo (float32_t const * base, mve_pred16_t p)
+foo (float32_t const *base, mve_pred16_t p)
{
return vldrwq_z_f32 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
index 82b914885b5..5c90707becc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32_t const * base, mve_pred16_t p)
+foo (int32_t const *base, mve_pred16_t p)
{
return vldrwq_z_s32 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
index 6a66e167881..16b50335fe7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c
@@ -1,15 +1,32 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vldrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4_t
-foo (uint32_t const * base, mve_pred16_t p)
+foo (uint32_t const *base, mve_pred16_t p)
{
return vldrwq_z_u32 (base, p);
}
-/* { dg-final { scan-assembler-times "vpst" 1 } } */
-/* { dg-final { scan-assembler-times "vldrwt.32" 1 } } */
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
index 64650e26bcb..5180667658e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * addr, float16x8x2_t value)
+foo (float16_t *addr, float16x8x2_t value)
{
- vst2q_f16 (addr, value);
+ return vst2q_f16 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.16" } } */
-/* { dg-final { scan-assembler "vst21.16" } } */
+/*
+**foo1:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * addr, float16x8x2_t value)
+foo1 (float16_t *addr, float16x8x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
index 8840afb867d..3e6f5b0ed75 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (float32_t * addr, float32x4x2_t value)
+foo (float32_t *addr, float32x4x2_t value)
{
- vst2q_f32 (addr, value);
+ return vst2q_f32 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.32" } } */
-/* { dg-final { scan-assembler "vst21.32" } } */
+/*
+**foo1:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float32_t * addr, float32x4x2_t value)
+foo1 (float32_t *addr, float32x4x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
index 15182c5eee0..1c939317779 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * addr, int16x8x2_t value)
+foo (int16_t *addr, int16x8x2_t value)
{
- vst2q_s16 (addr, value);
+ return vst2q_s16 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.16" } } */
-/* { dg-final { scan-assembler "vst21.16" } } */
+/*
+**foo1:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * addr, int16x8x2_t value)
+foo1 (int16_t *addr, int16x8x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
index 11c92463ae4..28c8e078942 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int32_t * addr, int32x4x2_t value)
+foo (int32_t *addr, int32x4x2_t value)
{
- vst2q_s32 (addr, value);
+ return vst2q_s32 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.32" } } */
-/* { dg-final { scan-assembler "vst21.32" } } */
+/*
+**foo1:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int32_t * addr, int32x4x2_t value)
+foo1 (int32_t *addr, int32x4x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
index 90257ae5dae..e882c01bd63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int8x16x2_t value)
+foo (int8_t *addr, int8x16x2_t value)
{
- vst2q_s8 (addr, value);
+ return vst2q_s8 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.8" } } */
-/* { dg-final { scan-assembler "vst21.8" } } */
+/*
+**foo1:
+** ...
+** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int8x16x2_t value)
+foo1 (int8_t *addr, int8x16x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
index a8a7c49757a..0cfbd6b9902 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * addr, uint16x8x2_t value)
+foo (uint16_t *addr, uint16x8x2_t value)
{
- vst2q_u16 (addr, value);
+ return vst2q_u16 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.16" } } */
-/* { dg-final { scan-assembler "vst21.16" } } */
+/*
+**foo1:
+** ...
+** vst20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * addr, uint16x8x2_t value)
+foo1 (uint16_t *addr, uint16x8x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
index b5d78180995..ea46a5969d0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint32_t * addr, uint32x4x2_t value)
+foo (uint32_t *addr, uint32x4x2_t value)
{
- vst2q_u32 (addr, value);
+ return vst2q_u32 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.32" } } */
-/* { dg-final { scan-assembler "vst21.32" } } */
+/*
+**foo1:
+** ...
+** vst20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint32_t * addr, uint32x4x2_t value)
+foo1 (uint32_t *addr, uint32x4x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
index 4e7d6fea7ed..895c2ccf425 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst2q_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint8x16x2_t value)
+foo (uint8_t *addr, uint8x16x2_t value)
{
- vst2q_u8 (addr, value);
+ return vst2q_u8 (addr, value);
}
-/* { dg-final { scan-assembler "vst20.8" } } */
-/* { dg-final { scan-assembler "vst21.8" } } */
+/*
+**foo1:
+** ...
+** vst20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vst21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint8x16x2_t value)
+foo1 (uint8_t *addr, uint8x16x2_t value)
{
- vst2q (addr, value);
+ return vst2q (addr, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vst20.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
index 0da66894e2c..94066089f58 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f16.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (float16_t * addr, float16x8x4_t value)
+foo (float16_t *addr, float16x8x4_t value)
{
- vst4q_f16 (addr, value);
+ return vst4q_f16 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
+/*
+**foo1:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (float16_t * addr, float16x8x4_t value)
+foo1 (float16_t *addr, float16x8x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
-
-void
-foo2 (float16_t * addr, float16x8x4_t value)
-{
- vst4q_f16 (addr, value);
- addr += 32;
- vst4q_f16 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
index c1614bd10fc..0150ba7ca56 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_f32.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (float32_t * addr, float32x4x4_t value)
+foo (float32_t *addr, float32x4x4_t value)
{
- vst4q_f32 (addr, value);
+ return vst4q_f32 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
+/*
+**foo1:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (float32_t * addr, float32x4x4_t value)
+foo1 (float32_t *addr, float32x4x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
-
-void
-foo2 (float32_t * addr, float32x4x4_t value)
-{
- vst4q_f32 (addr, value);
- addr += 16;
- vst4q_f32 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
index e1250449bee..8c9df15b3c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s16.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (int16_t * addr, int16x8x4_t value)
+foo (int16_t *addr, int16x8x4_t value)
{
- vst4q_s16 (addr, value);
+ return vst4q_s16 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
+/*
+**foo1:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (int16_t * addr, int16x8x4_t value)
+foo1 (int16_t *addr, int16x8x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
-
-void
-foo2 (int16_t * addr, int16x8x4_t value)
-{
- vst4q_s16 (addr, value);
- addr += 32;
- vst4q_s16 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
index e6e1272744e..1a1a9797360 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s32.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (int32_t * addr, int32x4x4_t value)
+foo (int32_t *addr, int32x4x4_t value)
{
- vst4q_s32 (addr, value);
+ return vst4q_s32 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
+/*
+**foo1:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (int32_t * addr, int32x4x4_t value)
+foo1 (int32_t *addr, int32x4x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
-
-void
-foo2 (int32_t * addr, int32x4x4_t value)
-{
- vst4q_s32 (addr, value);
- addr += 16;
- vst4q_s32 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
index 16eb488ff99..d23032a73bc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_s8.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (int8_t * addr, int8x16x4_t value)
+foo (int8_t *addr, int8x16x4_t value)
{
- vst4q_s8 (addr, value);
+ return vst4q_s8 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.8" } } */
-/* { dg-final { scan-assembler "vst41.8" } } */
-/* { dg-final { scan-assembler "vst42.8" } } */
-/* { dg-final { scan-assembler "vst43.8" } } */
+/*
+**foo1:
+** ...
+** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (int8_t * addr, int8x16x4_t value)
+foo1 (int8_t *addr, int8x16x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.8" } } */
-/* { dg-final { scan-assembler "vst41.8" } } */
-/* { dg-final { scan-assembler "vst42.8" } } */
-/* { dg-final { scan-assembler "vst43.8" } } */
-
-void
-foo2 (int8_t * addr, int8x16x4_t value)
-{
- vst4q_s8 (addr, value);
- addr += 16*4;
- vst4q_s8 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
index afd60306d0d..76cc4311e1b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u16.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (uint16_t * addr, uint16x8x4_t value)
+foo (uint16_t *addr, uint16x8x4_t value)
{
- vst4q_u16 (addr, value);
+ return vst4q_u16 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
+/*
+**foo1:
+** ...
+** vst40.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.16 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (uint16_t * addr, uint16x8x4_t value)
+foo1 (uint16_t *addr, uint16x8x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.16" } } */
-/* { dg-final { scan-assembler "vst41.16" } } */
-/* { dg-final { scan-assembler "vst42.16" } } */
-/* { dg-final { scan-assembler "vst43.16" } } */
-
-void
-foo2 (uint16_t * addr, uint16x8x4_t value)
-{
- vst4q_u16 (addr, value);
- addr += 32;
- vst4q_u16 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.16\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
index 755dd689dff..e5f62858eee 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u32.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (uint32_t * addr, uint32x4x4_t value)
+foo (uint32_t *addr, uint32x4x4_t value)
{
- vst4q_u32 (addr, value);
+ return vst4q_u32 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
+/*
+**foo1:
+** ...
+** vst40.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.32 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (uint32_t * addr, uint32x4x4_t value)
+foo1 (uint32_t *addr, uint32x4x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.32" } } */
-/* { dg-final { scan-assembler "vst41.32" } } */
-/* { dg-final { scan-assembler "vst42.32" } } */
-/* { dg-final { scan-assembler "vst43.32" } } */
-
-void
-foo2 (uint32_t * addr, uint32x4x4_t value)
-{
- vst4q_u32 (addr, value);
- addr += 16;
- vst4q_u32 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.32\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
index 0b28451df55..923cd0d3b10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst4q_u8.c
@@ -1,37 +1,47 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo (uint8_t * addr, uint8x16x4_t value)
+foo (uint8_t *addr, uint8x16x4_t value)
{
- vst4q_u8 (addr, value);
+ return vst4q_u8 (addr, value);
}
-/* { dg-final { scan-assembler "vst40.8" } } */
-/* { dg-final { scan-assembler "vst41.8" } } */
-/* { dg-final { scan-assembler "vst42.8" } } */
-/* { dg-final { scan-assembler "vst43.8" } } */
+/*
+**foo1:
+** ...
+** vst40.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst41.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst42.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** vst43.8 {q[0-9+], q[0-9+], q[0-9+], q[0-9+]}, \[r[0-9+]\]
+** ...
+*/
void
-foo1 (uint8_t * addr, uint8x16x4_t value)
+foo1 (uint8_t *addr, uint8x16x4_t value)
{
- vst4q (addr, value);
+ return vst4q (addr, value);
}
-/* { dg-final { scan-assembler "vst40.8" } } */
-/* { dg-final { scan-assembler "vst41.8" } } */
-/* { dg-final { scan-assembler "vst42.8" } } */
-/* { dg-final { scan-assembler "vst43.8" } } */
-
-void
-foo2 (uint8_t * addr, uint8x16x4_t value)
-{
- vst4q_u8 (addr, value);
- addr += 16*4;
- vst4q_u8 (addr, value);
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler {vst43.8\s\{.*\}, \[.*\]!} } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
index ad74d8aa2e9..19804443e01 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int16x8_t value, mve_pred16_t p)
+foo (int8_t *base, int16x8_t value, mve_pred16_t p)
{
- vstrbq_p_s16 (addr, value, p);
+ return vstrbq_p_s16 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int16x8_t value, mve_pred16_t p)
+foo1 (int8_t *base, int16x8_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
index 46fd4549ffb..26be212770b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int32x4_t value, mve_pred16_t p)
+foo (int8_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrbq_p_s32 (addr, value, p);
+ return vstrbq_p_s32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int32x4_t value, mve_pred16_t p)
+foo1 (int8_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
index 8e70b9eb098..a0d08772a50 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int8x16_t value, mve_pred16_t p)
+foo (int8_t *base, int8x16_t value, mve_pred16_t p)
{
- vstrbq_p_s8 (addr, value, p);
+ return vstrbq_p_s8 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p)
+foo1 (int8_t *base, int8x16_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
index 180f9033edd..bc02c59887a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
+foo (uint8_t *base, uint16x8_t value, mve_pred16_t p)
{
- vstrbq_p_u16 (addr, value, p);
+ return vstrbq_p_u16 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint16x8_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint16x8_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
index 1b944fc9ffc..1215d5f0978 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
+foo (uint8_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrbq_p_u32 (addr, value, p);
+ return vstrbq_p_u32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint32x4_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
index 7e73cbff84e..a88234e411d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
+foo (uint8_t *base, uint8x16_t value, mve_pred16_t p)
{
- vstrbq_p_u8 (addr, value, p);
+ return vstrbq_p_u8 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p)
{
- vstrbq_p (addr, value, p);
+ return vstrbq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
index 4d12bc2cd19..1e88d3aa600 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int16x8_t value)
+foo (int8_t *base, int16x8_t value)
{
- vstrbq_s16 (addr, value);
+ return vstrbq_s16 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/*
+**foo1:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int16x8_t value)
+foo1 (int8_t *base, int16x8_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
index 750413f35ae..12764bf3041 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int32x4_t value)
+foo (int8_t *base, int32x4_t value)
{
- vstrbq_s32 (addr, value);
+ return vstrbq_s32 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/*
+**foo1:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int32x4_t value)
+foo1 (int8_t *base, int32x4_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
index 7ffb2c51976..05a9e5c42ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * addr, int8x16_t value)
+foo (int8_t *base, int8x16_t value)
{
- vstrbq_s8 (addr, value);
+ return vstrbq_s8 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/*
+**foo1:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * addr, int8x16_t value)
+foo1 (int8_t *base, int8x16_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
index f59fa349cc0..052c3f85b75 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_s16 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_s16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo1 (int8_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
index 737c1008976..57410e46a8a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_s32 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_s32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo1 (int8_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
index 8b2d06807b4..c3cdefdf078 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_s8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
+foo (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_s8 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_s8 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
+foo1 (int8_t *base, uint8x16_t offset, int8x16_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
index 0adccaac39c..0868cc2248b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_u16 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_u16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
index 308119294df..9d769941569 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_u32 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_u32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
index 28b2ca4b83a..4586535d600 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_p_u8.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
+foo (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p_u8 (base, offset, value, p);
+ return vstrbq_scatter_offset_p_u8 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
+foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value, mve_pred16_t p)
{
- vstrbq_scatter_offset_p (base, offset, value, p);
+ return vstrbq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrbt.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
index e6cf1828b33..179b96f4973 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint16x8_t offset, int16x8_t value)
+foo (int8_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrbq_scatter_offset_s16 (base, offset, value);
+ return vstrbq_scatter_offset_s16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/*
+**foo1:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint16x8_t offset, int16x8_t value)
+foo1 (int8_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
index 052e02a7cf9..e7b7767c9f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint32x4_t offset, int32x4_t value)
+foo (int8_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrbq_scatter_offset_s32 (base, offset, value);
+ return vstrbq_scatter_offset_s32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/*
+**foo1:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint32x4_t offset, int32x4_t value)
+foo1 (int8_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
index 523f318e73c..f47bdd1a630 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int8_t * base, uint8x16_t offset, int8x16_t value)
+foo (int8_t *base, uint8x16_t offset, int8x16_t value)
{
- vstrbq_scatter_offset_s8 (base, offset, value);
+ return vstrbq_scatter_offset_s8 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/*
+**foo1:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int8_t * base, uint8x16_t offset, int8x16_t value)
+foo1 (int8_t *base, uint8x16_t offset, int8x16_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
index 49d4d31ad21..90e8cf351f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint16x8_t offset, uint16x8_t value)
+foo (uint8_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrbq_scatter_offset_u16 (base, offset, value);
+ return vstrbq_scatter_offset_u16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/*
+**foo1:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint16x8_t offset, uint16x8_t value)
+foo1 (uint8_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
index 0012852298c..e5449aa0942 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint32x4_t offset, uint32x4_t value)
+foo (uint8_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrbq_scatter_offset_u32 (base, offset, value);
+ return vstrbq_scatter_offset_u32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/*
+**foo1:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint32x4_t offset, uint32x4_t value)
+foo1 (uint8_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
index e54422a1afe..06c8c45e877 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_scatter_offset_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * base, uint8x16_t offset, uint8x16_t value)
+foo (uint8_t *base, uint8x16_t offset, uint8x16_t value)
{
- vstrbq_scatter_offset_u8 (base, offset, value);
+ return vstrbq_scatter_offset_u8 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/*
+**foo1:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * base, uint8x16_t offset, uint8x16_t value)
+foo1 (uint8_t *base, uint8x16_t offset, uint8x16_t value)
{
- vstrbq_scatter_offset (base, offset, value);
+ return vstrbq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
index 9fa9d18c6a1..0b350e2491b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint16x8_t value)
+foo (uint8_t *base, uint16x8_t value)
{
- vstrbq_u16 (addr, value);
+ return vstrbq_u16 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/*
+**foo1:
+** ...
+** vstrb.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint16x8_t value)
+foo1 (uint8_t *base, uint16x8_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
index e535aa275ef..2f809356420 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint32x4_t value)
+foo (uint8_t *base, uint32x4_t value)
{
- vstrbq_u32 (addr, value);
+ return vstrbq_u32 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/*
+**foo1:
+** ...
+** vstrb.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint32x4_t value)
+foo1 (uint8_t *base, uint32x4_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
index 93771aabcbd..deeea98dda5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrbq_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint8_t * addr, uint8x16_t value)
+foo (uint8_t *base, uint8x16_t value)
{
- vstrbq_u8 (addr, value);
+ return vstrbq_u8 (base, value);
}
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/*
+**foo1:
+** ...
+** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint8_t * addr, uint8x16_t value)
+foo1 (uint8_t *base, uint8x16_t value)
{
- vstrbq (addr, value);
+ return vstrbq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrb.8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
index 74e2617c380..a41217b24f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * addr, float16x8_t value)
+foo (float16_t *base, float16x8_t value)
{
- vstrhq_f16 (addr, value);
+ return vstrhq_f16 (base, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * addr, float16x8_t value)
+foo1 (float16_t *base, float16x8_t value)
{
- vstrhq (addr, value);
+ return vstrhq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
index 227da4f10aa..8398a60023d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * addr, float16x8_t value, mve_pred16_t p)
+foo (float16_t *base, float16x8_t value, mve_pred16_t p)
{
- vstrhq_p_f16 (addr, value, p);
+ return vstrhq_p_f16 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p)
+foo1 (float16_t *base, float16x8_t value, mve_pred16_t p)
{
- vstrhq_p (addr, value, p);
+ return vstrhq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
index f3ba71f0ce1..ee1026801be 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * addr, int16x8_t value, mve_pred16_t p)
+foo (int16_t *base, int16x8_t value, mve_pred16_t p)
{
- vstrhq_p_s16 (addr, value, p);
+ return vstrhq_p_s16 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p)
+foo1 (int16_t *base, int16x8_t value, mve_pred16_t p)
{
- vstrhq_p (addr, value, p);
+ return vstrhq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
index dab646706ce..b8490209644 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * addr, int32x4_t value, mve_pred16_t p)
+foo (int16_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrhq_p_s32 (addr, value, p);
+ return vstrhq_p_s32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * addr, int32x4_t value, mve_pred16_t p)
+foo1 (int16_t *base, int32x4_t value, mve_pred16_t p)
{
- vstrhq_p (addr, value, p);
+ return vstrhq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
index e575c70cc44..59fb73cef19 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
+foo (uint16_t *base, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_p_u16 (addr, value, p);
+ return vstrhq_p_u16 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_p (addr, value, p);
+ return vstrhq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
index e863e284c3c..ed66db7f8ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
+foo (uint16_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_p_u32 (addr, value, p);
+ return vstrhq_p_u32 (base, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * addr, uint32x4_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_p (addr, value, p);
+ return vstrhq_p (base, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
index 5e47fb4e1a6..972d733c5bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * addr, int16x8_t value)
+foo (int16_t *base, int16x8_t value)
{
- vstrhq_s16 (addr, value);
+ return vstrhq_s16 (base, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * addr, int16x8_t value)
+foo1 (int16_t *base, int16x8_t value)
{
- vstrhq (addr, value);
+ return vstrhq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
index 73e01c9acfb..f260c61c3a8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * addr, int32x4_t value)
+foo (int16_t *base, int32x4_t value)
{
- vstrhq_s32 (addr, value);
+ return vstrhq_s32 (base, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * addr, int32x4_t value)
+foo1 (int16_t *base, int32x4_t value)
{
- vstrhq (addr, value);
+ return vstrhq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
index d29bd08ad0a..794d75e76ac 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * base, uint16x8_t offset, float16x8_t value)
+foo (float16_t *base, uint16x8_t offset, float16x8_t value)
{
- vstrhq_scatter_offset_f16 (base, offset, value);
+ return vstrhq_scatter_offset_f16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
+foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
{
- vstrhq_scatter_offset (base, offset, value);
+ return vstrhq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
index 79d9827b378..1fd5a0773dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
+foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p_f16 (base, offset, value, p);
+ return vstrhq_scatter_offset_p_f16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
+foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p (base, offset, value, p);
+ return vstrhq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
index 1b401d4c5b7..34c44a90541 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p_s16 (base, offset, value, p);
+ return vstrhq_scatter_offset_p_s16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p (base, offset, value, p);
+ return vstrhq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
index afb325b9789..2a84b28a3f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p_s32 (base, offset, value, p);
+ return vstrhq_scatter_offset_p_s32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p (base, offset, value, p);
+ return vstrhq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
index 73bee831282..f1c875657ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p_u16 (base, offset, value, p);
+ return vstrhq_scatter_offset_p_u16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p (base, offset, value, p);
+ return vstrhq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
index bae7c2d14c2..913fd8d5591 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p_u32 (base, offset, value, p);
+ return vstrhq_scatter_offset_p_u32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_offset_p (base, offset, value, p);
+ return vstrhq_scatter_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
index bf3c03a85c6..b322d0fa02e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint16x8_t offset, int16x8_t value)
+foo (int16_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrhq_scatter_offset_s16 (base, offset, value);
+ return vstrhq_scatter_offset_s16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
+foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrhq_scatter_offset (base, offset, value);
+ return vstrhq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
index 0591ab55c07..49fcc3a382b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint32x4_t offset, int32x4_t value)
+foo (int16_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrhq_scatter_offset_s32 (base, offset, value);
+ return vstrhq_scatter_offset_s32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
+foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrhq_scatter_offset (base, offset, value);
+ return vstrhq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
index 0a2fa1f410e..b5de540a74c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
+foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrhq_scatter_offset_u16 (base, offset, value);
+ return vstrhq_scatter_offset_u16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
+foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrhq_scatter_offset (base, offset, value);
+ return vstrhq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
index 809a44dee16..7808f25d4a4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
+foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrhq_scatter_offset_u32 (base, offset, value);
+ return vstrhq_scatter_offset_u32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
+foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrhq_scatter_offset (base, offset, value);
+ return vstrhq_scatter_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
index 1dcb1f7692d..6d57a22fe41 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * base, uint16x8_t offset, float16x8_t value)
+foo (float16_t *base, uint16x8_t offset, float16x8_t value)
{
- vstrhq_scatter_shifted_offset_f16 (base, offset, value);
+ return vstrhq_scatter_shifted_offset_f16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value)
+foo1 (float16_t *base, uint16x8_t offset, float16x8_t value)
{
- vstrhq_scatter_shifted_offset (base, offset, value);
+ return vstrhq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
index c46eec95adf..2e77dd492a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_f16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
+foo (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p_f16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (float16_t * base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
+foo1 (float16_t *base, uint16x8_t offset, float16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
index 7e9a549e8c2..1c83a13ffdf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p_s16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
+foo1 (int16_t *base, uint16x8_t offset, int16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
index 502b4b00e2a..6d786de4379 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p_s32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
+foo1 (int16_t *base, uint32x4_t offset, int32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
index 151145ce174..fd73168ddbb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p_u16 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
index 14efd952593..689195ce603 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c
@@ -1,21 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p_u32 (base, offset, value, p);
}
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vstrht.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
+foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value, mve_pred16_t p)
{
- vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+ return vstrhq_scatter_shifted_offset_p (base, offset, value, p);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrht.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
index e5142ed85f7..0edacd938f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint16x8_t offset, int16x8_t value)
+foo (int16_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrhq_scatter_shifted_offset_s16 (base, offset, value);
+ return vstrhq_scatter_shifted_offset_s16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint16x8_t offset, int16x8_t value)
+foo1 (int16_t *base, uint16x8_t offset, int16x8_t value)
{
- vstrhq_scatter_shifted_offset (base, offset, value);
+ return vstrhq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
index 431808f9008..ebda2faec92 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (int16_t * base, uint32x4_t offset, int32x4_t value)
+foo (int16_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrhq_scatter_shifted_offset_s32 (base, offset, value);
+ return vstrhq_scatter_shifted_offset_s32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (int16_t * base, uint32x4_t offset, int32x4_t value)
+foo1 (int16_t *base, uint32x4_t offset, int32x4_t value)
{
- vstrhq_scatter_shifted_offset (base, offset, value);
+ return vstrhq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
index f93e5d51913..abe8bbf8045 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint16x8_t offset, uint16x8_t value)
+foo (uint16_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrhq_scatter_shifted_offset_u16 (base, offset, value);
+ return vstrhq_scatter_shifted_offset_u16 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint16x8_t offset, uint16x8_t value)
+foo1 (uint16_t *base, uint16x8_t offset, uint16x8_t value)
{
- vstrhq_scatter_shifted_offset (base, offset, value);
+ return vstrhq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
index fc250706fa8..a01b04bd940 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * base, uint32x4_t offset, uint32x4_t value)
+foo (uint16_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrhq_scatter_shifted_offset_u32 (base, offset, value);
+ return vstrhq_scatter_shifted_offset_u32 (base, offset, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #1\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * base, uint32x4_t offset, uint32x4_t value)
+foo1 (uint16_t *base, uint32x4_t offset, uint32x4_t value)
{
- vstrhq_scatter_shifted_offset (base, offset, value);
+ return vstrhq_scatter_shifted_offset (base, offset, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
index f7b3ef1012b..85f5790ff49 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * addr, uint16x8_t value)
+foo (uint16_t *base, uint16x8_t value)
{
- vstrhq_u16 (addr, value);
+ return vstrhq_u16 (base, value);
}
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/*
+**foo1:
+** ...
+** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * addr, uint16x8_t value)
+foo1 (uint16_t *base, uint16x8_t value)
{
- vstrhq (addr, value);
+ return vstrhq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
index 8e01fd10032..d0958e22222 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo (uint16_t * addr, uint32x4_t value)
+foo (uint16_t *base, uint32x4_t value)
{
- vstrhq_u32 (addr, value);
+ return vstrhq_u32 (base, value);
}
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/*
+**foo1:
+** ...
+** vstrh.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
void
-foo1 (uint16_t * addr, uint32x4_t value)
+foo1 (uint16_t *base, uint32x4_t value)
{
- vstrhq (addr, value);
+ return vstrhq (base, value);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vstrh.32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--
2.25.1
next reply other threads:[~2023-04-28 11:31 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 11:29 Andrea Corallo [this message]
2023-04-28 11:29 ` [PATCH 02/10] arm: Fix vstrwq* backend + testsuite Andrea Corallo
2023-04-28 16:27 ` Kyrylo Tkachov
2023-05-02 8:21 ` Christophe Lyon
2023-05-02 8:45 ` Andrea Corallo
2023-05-02 10:18 ` Andrea Corallo
2023-04-28 11:29 ` [PATCH 03/10] arm: Mve backend + testsuite fixes 2 Andrea Corallo
2023-04-28 16:40 ` Kyrylo Tkachov
2023-05-02 11:53 ` Andrea Corallo
2023-04-28 11:29 ` [PATCH 04/10] arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSCR NZ flags Andrea Corallo
2023-04-28 16:45 ` Kyrylo Tkachov
2023-05-03 12:19 ` Stamatis Markianos-Wright
2023-05-03 12:55 ` Kyrylo Tkachov
2023-04-28 11:29 ` [PATCH 05/10] arm: Add vorrq_n overloading into vorrq _Generic Andrea Corallo
2023-04-28 16:47 ` Kyrylo Tkachov
2023-04-28 11:29 ` [PATCH 06/10] arm: Fix overloading of MVE scalar constant parameters on vbicq, vmvnq_m Andrea Corallo
2023-04-28 16:47 ` Kyrylo Tkachov
2023-04-28 11:29 ` [PATCH 07/10] arm: Fix MVE header pointer overloads this time (and a bit more tidying) Andrea Corallo
2023-04-28 16:51 ` Kyrylo Tkachov
2023-04-28 11:30 ` [PATCH 08/10] arm testsuite: Remove reduntant tests Andrea Corallo
2023-04-28 16:52 ` Kyrylo Tkachov
2023-04-28 11:30 ` [PATCH 09/10] arm testsuite: XFAIL or relax registers in some tests Andrea Corallo
2023-04-28 16:54 ` Kyrylo Tkachov
2023-05-02 12:17 ` Stamatis Markianos-Wright
2023-05-02 8:28 ` Christophe Lyon
2023-05-02 9:33 ` Stamatis Markianos-Wright
2023-04-28 11:30 ` [PATCH 10/10] arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes Andrea Corallo
2023-04-28 16:58 ` Kyrylo Tkachov
2023-05-03 12:34 ` Stamatis Markianos-Wright
2023-05-03 12:56 ` Kyrylo Tkachov
2023-04-28 16:27 ` [PATCH 01/10] arm: Mve testsuite improvements Kyrylo Tkachov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230428113002.482343-1-andrea.corallo@arm.com \
--to=andrea.corallo@arm.com \
--cc=Richard.Earnshaw@arm.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=kyrylo.tkachov@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).