[PATCH 1/4] [RISC-V]add hook to control Zicond based ifcvt opt

[Fei Gao <gaofei@eswincomputing.com>]

TARGET_HAVE_COND_ZERO is added to control ifcvt optimization
for targets with RISC-V Zicond like insns.

Co-authored-by: Xiao Zeng<zengxiao@eswincomputing.com>

gcc/ChangeLog:

        * config/riscv/riscv.cc (riscv_have_cond_zero): Implement TARGET_HAVE_COND_ZERO
        (TARGET_HAVE_COND_ZERO): define RISC-V hook
        * doc/tm.texi: add TARGET_HAVE_COND_ZERO
        * doc/tm.texi.in: add TARGET_HAVE_COND_ZERO
        * target.def: define TARGET_HAVE_COND_ZERO
---
 gcc/config/riscv/riscv.cc | 10 ++++++++++
 gcc/doc/tm.texi           |  4 ++++
 gcc/doc/tm.texi.in        |  2 ++
 gcc/target.def            |  7 +++++++
 4 files changed, 23 insertions(+)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ca9a2ca81d5..16a91713ba5 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -9597,6 +9597,13 @@ riscv_vectorize_create_costs (vec_info *vinfo, bool costing_for_scalar)
   return new vector_costs (vinfo, costing_for_scalar);
 }
 
+/* Implement TARGET_HAVE_COND_ZERO.  */
+bool
+riscv_have_cond_zero (void)
+{
+  return TARGET_ZICOND_LIKE;
+}
+
 /* Implement TARGET_PREFERRED_ELSE_VALUE.  */
 
 static tree
@@ -9884,6 +9891,9 @@ riscv_preferred_else_value (unsigned ifn, tree vectype, unsigned int nops,
 #undef TARGET_DWARF_POLY_INDETERMINATE_VALUE
 #define TARGET_DWARF_POLY_INDETERMINATE_VALUE riscv_dwarf_poly_indeterminate_value
 
+#undef TARGET_HAVE_COND_ZERO
+#define TARGET_HAVE_COND_ZERO riscv_have_cond_zero
+
 #undef TARGET_ZERO_CALL_USED_REGS
 #define TARGET_ZERO_CALL_USED_REGS riscv_zero_call_used_regs
 
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index f7ac806ff15..fe4f59d445e 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -12080,6 +12080,10 @@ This target hook is required only when the target has several different
 modes and they have different conditional execution capability, such as ARM.
 @end deftypefn
 
+@deftypefn {Target Hook} bool TARGET_HAVE_COND_ZERO (void)
+This target hook returns true if the target supports conditional zero.
+@end deftypefn
+
 @deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (rtx_insn **@var{prep_seq}, rtx_insn **@var{gen_seq}, rtx_code @var{code}, tree @var{op0}, tree @var{op1})
 This function prepares to emit a comparison insn for the first compare in a
  sequence of conditional comparisions.  It returns an appropriate comparison
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 141027e0bb4..12aadd75a13 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -7832,6 +7832,8 @@ lists.
 
 @hook TARGET_HAVE_CONDITIONAL_EXECUTION
 
+@hook TARGET_HAVE_COND_ZERO
+
 @hook TARGET_GEN_CCMP_FIRST
 
 @hook TARGET_GEN_CCMP_NEXT
diff --git a/gcc/target.def b/gcc/target.def
index 42622177ef9..f977edc3430 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -2726,6 +2726,13 @@ modes and they have different conditional execution capability, such as ARM.",
  bool, (void),
  default_have_conditional_execution)
 
+/* Return true if the target supports conditional zero.  */
+DEFHOOK
+(have_cond_zero,
+ "This target hook returns true if the target supports conditional zero.",
+ bool, (void),
+ hook_bool_void_false)
+
 DEFHOOK
 (gen_ccmp_first,
  "This function prepares to emit a comparison insn for the first compare in a\n\
-- 
2.17.1