From: Jeff Law <jeffreyalaw@gmail.com>
To: Fei Gao <gaofei@eswincomputing.com>, gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, palmer@dabbelt.com
Subject: Re: [PATCH 3/4] [ifcvt] if convert x=c ? y op z : y by RISC-V Zicond like insns
Date: Mon, 20 Nov 2023 00:02:22 -0700 [thread overview]
Message-ID: <05ed1869-1bcc-4605-8f6b-b1a17c2b674d@gmail.com> (raw)
In-Reply-To: <20231030072523.26818-4-gaofei@eswincomputing.com>
On 10/30/23 01:25, Fei Gao wrote:
>
> +static bool
> +noce_cond_zero_binary_op_supported (enum rtx_code op)
Function needs function comment.
And again in your new tests, don't require explicit registers unless you
know (due to use as function argument/return value) which register will
be used. Using explicit registers increases the maintenance and is best
avoided.
jeff
next prev parent reply other threads:[~2023-11-20 7:02 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-30 7:25 [PATCH 0/4] add support for conditional zero operation Fei Gao
2023-10-30 7:25 ` [PATCH 1/4] [RISC-V]add hook to control Zicond based ifcvt opt Fei Gao
2023-10-30 15:12 ` Jeff Law
2023-10-30 7:25 ` [PATCH 2/4] [ifcvt] if convert x=c ? y+z : y by RISC-V Zicond like insns Fei Gao
2023-10-30 16:36 ` Jeff Law
2023-10-31 2:53 ` Fei Gao
2023-10-30 18:41 ` Jeff Law
2023-10-30 19:16 ` Jeff Law
2023-10-31 3:35 ` Fei Gao
2023-11-20 6:46 ` Jeff Law
2023-11-28 2:46 ` Fei Gao
2023-11-28 5:05 ` Jeff Law
2023-11-20 6:59 ` Jeff Law
2023-11-28 2:57 ` Fei Gao
2023-11-29 4:46 ` Jeff Law
2023-10-30 7:25 ` [PATCH 3/4] [ifcvt] if convert x=c ? y op z " Fei Gao
2023-11-20 7:02 ` Jeff Law [this message]
2023-10-30 7:25 ` [PATCH 4/4] [ifcvt] if convert x=c ? y&z " Fei Gao
2023-10-30 18:46 ` Jeff Law
2023-11-20 7:10 ` Jeff Law
2023-11-28 3:04 ` Fei Gao
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