From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: Richard Biener <rguenther@suse.de>
Cc: gcc-patches@gcc.gnu.org, Richard.Sandiford@arm.com
Subject: Re: [PATCH 1/3] vect: Pass stmt_vec_info to TARGET_SIMD_CLONE_USABLE
Date: Wed, 31 Jan 2024 13:52:36 +0000 [thread overview]
Message-ID: <47e1aeb2-94ac-4733-b49f-ea97932cc49f@arm.com> (raw)
In-Reply-To: <ro1os72r-6q35-03q4-nrno-5n405oro645p@fhfr.qr>
On 31/01/2024 12:13, Richard Biener wrote:
> On Wed, 31 Jan 2024, Richard Biener wrote:
>
>> On Tue, 30 Jan 2024, Andre Vieira wrote:
>>
>>>
>>> This patch adds stmt_vec_info to TARGET_SIMD_CLONE_USABLE to make sure the
>>> target can reject a simd_clone based on the vector mode it is using.
>>> This is needed because for VLS SVE vectorization the vectorizer accepts
>>> Advanced SIMD simd clones when vectorizing using SVE types because the simdlens
>>> might match. This will cause type errors later on.
>>>
>>> Other targets do not currently need to use this argument.
>>
>> Can you instead pass down the mode?
>
> Thinking about that again the cgraph_simd_clone info in the clone
> should have sufficient information to disambiguate. If it doesn't
> then we should amend it.
>
> Richard.
Hi Richard,
Thanks for the review, I don't think cgraph_simd_clone_info is the right
place to pass down this information, since this is information about the
caller rather than the simdclone itself. What we are trying to achieve
here is making the vectorizer being able to accept or reject simdclones
based on the ISA we are vectorizing for. To distinguish between SVE and
Advanced SIMD ISAs we use modes, I am also not sure that's ideal but it
is what we currently use. So to answer your earlier question, yes I can
also pass down mode if that's preferable.
Regards,
Andre
next prev parent reply other threads:[~2024-01-31 13:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-30 14:31 [PATCH 0/3] vect, aarch64: Add SVE support for simdclones Andre Vieira
2024-01-30 14:31 ` [PATCH 1/3] vect: Pass stmt_vec_info to TARGET_SIMD_CLONE_USABLE Andre Vieira
2024-01-31 12:11 ` Richard Biener
2024-01-31 12:13 ` Richard Biener
2024-01-31 13:52 ` Andre Vieira (lists) [this message]
2024-01-31 13:58 ` Richard Biener
2024-01-31 14:03 ` Richard Biener
2024-01-31 16:13 ` Andre Vieira (lists)
2024-01-31 14:35 ` Andre Vieira (lists)
2024-01-31 14:35 ` Richard Biener
2024-01-31 16:36 ` Andre Vieira (lists)
2024-02-01 7:19 ` Richard Biener
2024-02-01 17:01 ` Andre Vieira (lists)
2024-02-05 9:56 ` Richard Biener
2024-02-26 16:56 ` Andre Vieira (lists)
2024-02-27 8:47 ` Richard Biener
2024-02-28 17:25 ` Andre Vieira (lists)
2024-02-29 7:26 ` Richard Biener
2024-02-01 7:59 ` Richard Sandiford
2024-01-30 14:31 ` [PATCH 2/3] vect: disable multiple calls of poly simdclones Andre Vieira
2024-01-31 12:13 ` Richard Biener
2024-01-30 14:31 ` [PATCH 3/3] aarch64: Add SVE support for simd clones [PR 96342] Andre Vieira
2024-02-01 21:59 ` Richard Sandiford
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