* [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works @ 2022-07-28 3:25 jiawei 2022-07-28 7:45 ` Richard Biener 0 siblings, 1 reply; 3+ messages in thread From: jiawei @ 2022-07-28 3:25 UTC (permalink / raw) To: gcc-patches Cc: rguenther, jakub, palmer, kito.cheng, jim.wilson.gcc, wuwei2016, jiawei This patch adds the additional options on RISC-V target. "-fprefetch-loop-arrays" option needs enable prefetch instruction, for RISC-V that contained in "zicbop" extension. Use "-march" with "zicbop" will enable this feature. gcc/testsuite/ChangeLog: * gcc.dg/pr106397.c: New dg-additional-options for RISC-V. --- gcc/testsuite/gcc.dg/pr106397.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/testsuite/gcc.dg/pr106397.c b/gcc/testsuite/gcc.dg/pr106397.c index 2bc17f8cf80..19274fa8771 100644 --- a/gcc/testsuite/gcc.dg/pr106397.c +++ b/gcc/testsuite/gcc.dg/pr106397.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O3 -fprefetch-loop-arrays --param l2-cache-size=0 --param prefetch-latency=3 -fprefetch-loop-arrays" } */ /* { dg-additional-options "-march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ +/* { dg-additional-options "-march=rv64gc_zicbop" { target { riscv64-*-* } } */ +/* { dg-additional-options "-march=rv32gc_zicbop" { target { riscv32-*-* } } */ int bar (void) -- 2.25.1 ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works 2022-07-28 3:25 [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works jiawei @ 2022-07-28 7:45 ` Richard Biener 2022-07-28 9:28 ` jiawei 0 siblings, 1 reply; 3+ messages in thread From: Richard Biener @ 2022-07-28 7:45 UTC (permalink / raw) To: jiawei; +Cc: gcc-patches, jakub, palmer, kito.cheng, jim.wilson.gcc, wuwei2016 On Thu, 28 Jul 2022, jiawei wrote: > This patch adds the additional options on RISC-V target. > "-fprefetch-loop-arrays" option needs enable prefetch instruction, > for RISC-V that contained in "zicbop" extension. > Use "-march" with "zicbop" will enable this feature. OK. Note -fprefetch-loop-arrays is just required to trigger an ICE, do you see a diagnostic when prefetching is not supported? Maybe simply adding -w is better then. > gcc/testsuite/ChangeLog: > > * gcc.dg/pr106397.c: New dg-additional-options for RISC-V. > > --- > gcc/testsuite/gcc.dg/pr106397.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/gcc/testsuite/gcc.dg/pr106397.c b/gcc/testsuite/gcc.dg/pr106397.c > index 2bc17f8cf80..19274fa8771 100644 > --- a/gcc/testsuite/gcc.dg/pr106397.c > +++ b/gcc/testsuite/gcc.dg/pr106397.c > @@ -1,6 +1,8 @@ > /* { dg-do compile } */ > /* { dg-options "-O3 -fprefetch-loop-arrays --param l2-cache-size=0 --param prefetch-latency=3 -fprefetch-loop-arrays" } */ > /* { dg-additional-options "-march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ > +/* { dg-additional-options "-march=rv64gc_zicbop" { target { riscv64-*-* } } */ > +/* { dg-additional-options "-march=rv32gc_zicbop" { target { riscv32-*-* } } */ > > int > bar (void) > -- Richard Biener <rguenther@suse.de> SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg, Germany; GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman; HRB 36809 (AG Nuernberg) ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Re: [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works 2022-07-28 7:45 ` Richard Biener @ 2022-07-28 9:28 ` jiawei 0 siblings, 0 replies; 3+ messages in thread From: jiawei @ 2022-07-28 9:28 UTC (permalink / raw) To: Richard Biener Cc: gcc-patches, jakub, palmer, kito.cheng, jim.wilson.gcc, wuwei2016 > -----原始邮件----- > 发件人: "Richard Biener" <rguenther@suse.de> > 发送时间: 2022-07-28 15:45:27 (星期四) > 收件人: jiawei <jiawei@iscas.ac.cn> > 抄送: gcc-patches@gcc.gnu.org, jakub@redhat.com, palmer@rivosinc.com, kito.cheng@gmail.com, jim.wilson.gcc@gmail.com, wuwei2016@iscas.ac.cn > 主题: Re: [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works > > On Thu, 28 Jul 2022, jiawei wrote: > > > This patch adds the additional options on RISC-V target. > > "-fprefetch-loop-arrays" option needs enable prefetch instruction, > > for RISC-V that contained in "zicbop" extension. > > Use "-march" with "zicbop" will enable this feature. > > OK. > > Note -fprefetch-loop-arrays is just required to trigger an ICE, > do you see a diagnostic when prefetching is not supported? Maybe > simply adding -w is better then. Yes, without -march support it report warning info: ============================================================================================ cc1: warning: '-fprefetch-loop-arrays' not supported for this target (try '-march' switches) ============================================================================================ after add -w the warning ignored. > > > gcc/testsuite/ChangeLog: > > > > * gcc.dg/pr106397.c: New dg-additional-options for RISC-V. > > > > --- > > gcc/testsuite/gcc.dg/pr106397.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/gcc/testsuite/gcc.dg/pr106397.c b/gcc/testsuite/gcc.dg/pr106397.c > > index 2bc17f8cf80..19274fa8771 100644 > > --- a/gcc/testsuite/gcc.dg/pr106397.c > > +++ b/gcc/testsuite/gcc.dg/pr106397.c > > @@ -1,6 +1,8 @@ > > /* { dg-do compile } */ > > /* { dg-options "-O3 -fprefetch-loop-arrays --param l2-cache-size=0 --param prefetch-latency=3 -fprefetch-loop-arrays" } */ > > /* { dg-additional-options "-march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ > > +/* { dg-additional-options "-march=rv64gc_zicbop" { target { riscv64-*-* } } */ > > +/* { dg-additional-options "-march=rv32gc_zicbop" { target { riscv32-*-* } } */ > > > > int > > bar (void) > > > > -- > Richard Biener <rguenther@suse.de> > SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg, > Germany; GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman; > HRB 36809 (AG Nuernberg) </rguenther@suse.de></jiawei@iscas.ac.cn></rguenther@suse.de> ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-07-28 9:28 UTC | newest] Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-07-28 3:25 [PATCH] testsuite: Add extra RISC-V options so that -fprefetch-loop-arrays works jiawei 2022-07-28 7:45 ` Richard Biener 2022-07-28 9:28 ` jiawei
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