Re: [PATCH] PR106342 - IBM zSystems: Provide vsel for all vector modes

[Andreas Krebbel <krebbel@linux.ibm.com>]

On 8/3/22 12:20, Ilya Leoshkevich wrote:
> Bootstrapped and regtested on s390x-redhat-linux.  Ok for master?
> 
> 
> 
> dg.exp=pr104612.c fails with an ICE on s390x, because copysignv2sf3
> produces an insn that vsel<mode> is supposed to recognize, but can't,
> because it's not defined for V2SF.  Fix by defining it for all vector
> modes supported by copysign<mode>3.
> 
> gcc/ChangeLog:
> 
> 	* config/s390/vector.md (V_HW_FT): New iterator.
> 	* config/s390/vx-builtins.md (vsel<mode>): Use V instead of
> 	V_HW.

Ok. There is a typo in the changelog:
"Use *V* instead ..." should probably read "Use V_HW_FT instead ..."

Thanks,

Andreas

> ---
>  gcc/config/s390/vector.md      |  6 ++++++
>  gcc/config/s390/vx-builtins.md | 12 ++++++------
>  2 files changed, 12 insertions(+), 6 deletions(-)
> 
> diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
> index a6c4b4eb974..624729814af 100644
> --- a/gcc/config/s390/vector.md
> +++ b/gcc/config/s390/vector.md
> @@ -63,6 +63,12 @@
>  			   V1DF V2DF
>  			   (V1TF "TARGET_VXE") (TF "TARGET_VXE")])
>  
> +; All modes present in V_HW and VFT.
> +(define_mode_iterator V_HW_FT [V16QI V8HI V4SI V2DI (V1TI "TARGET_VXE") V1DF
> +			       V2DF (V1SF "TARGET_VXE") (V2SF "TARGET_VXE")
> +			       (V4SF "TARGET_VXE") (V1TF "TARGET_VXE")
> +			       (TF "TARGET_VXE")])
> +
>  ; FP vector modes directly supported by the HW.  This does not include
>  ; vector modes using only part of a vector register and should be used
>  ; for instructions which might trigger IEEE exceptions.
> diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md
> index d5130799804..98ee08b2683 100644
> --- a/gcc/config/s390/vx-builtins.md
> +++ b/gcc/config/s390/vx-builtins.md
> @@ -517,12 +517,12 @@
>  ; swapped in s390-c.cc when we get here.
>  
>  (define_insn "vsel<mode>"
> -  [(set (match_operand:V_HW                      0 "register_operand" "=v")
> -	(ior:V_HW
> -	 (and:V_HW (match_operand:V_HW           1 "register_operand"  "v")
> -		   (match_operand:V_HW           3 "register_operand"  "v"))
> -	 (and:V_HW (not:V_HW (match_dup 3))
> -		   (match_operand:V_HW           2 "register_operand"  "v"))))]
> +  [(set (match_operand:V_HW_FT               0 "register_operand" "=v")
> +	(ior:V_HW_FT
> +	 (and:V_HW_FT (match_operand:V_HW_FT 1 "register_operand"  "v")
> +		      (match_operand:V_HW_FT 3 "register_operand"  "v"))
> +	 (and:V_HW_FT (not:V_HW_FT (match_dup 3))
> +		      (match_operand:V_HW_FT 2 "register_operand"  "v"))))]
>    "TARGET_VX"
>    "vsel\t%v0,%1,%2,%3"
>    [(set_attr "op_type" "VRR")])