* [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
@ 2023-06-06 9:19 Kewen.Lin
2023-06-11 18:39 ` David Edelsohn
0 siblings, 1 reply; 4+ messages in thread
From: Kewen.Lin @ 2023-06-06 9:19 UTC (permalink / raw)
To: GCC Patches; +Cc: Segher Boessenkool, David Edelsohn, Peter Bergner
Hi,
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
their supports.
Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and
powerpc64le-linux-gnu P9 and P10.
I'll push this next week if no objections.
BR,
Kewen
-----
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
---
gcc/config/rs6000/rs6000-builtins.def | 14 +++++++-------
gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++
3 files changed, 39 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 92d9b46e1b9..a38184b0ef9 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2009,6 +2009,13 @@
const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+ const vsq __builtin_pack_vector_int128 (unsigned long long, \
+ unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
; Power7 builtins (ISA 2.06).
[power7]
@@ -2030,16 +2037,9 @@
const unsigned int __builtin_divweu (unsigned int, unsigned int);
DIVWEU diveu_si {}
- const vsq __builtin_pack_vector_int128 (unsigned long long, \
- unsigned long long);
- PACK_V1TI packv1ti {}
-
void __builtin_ppc_speculation_barrier ();
SPECBARR speculation_barrier {}
- const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
- UNPACK_V1TI unpackv1ti {}
-
; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
[power7-64]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
new file mode 100644
index 00000000000..3e3f9eaa65e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -mno-vsx" } */
+
+/* Verify there is no ICE but one expected error message instead. */
+
+#include <altivec.h>
+
+extern vector signed __int128 res_vslll;
+extern unsigned long long aull[2];
+
+void
+testVectorInt128Pack ()
+{
+ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
new file mode 100644
index 00000000000..3e3f9eaa65e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -mno-vsx" } */
+
+/* Verify there is no ICE but one expected error message instead. */
+
+#include <altivec.h>
+
+extern vector signed __int128 res_vslll;
+extern unsigned long long aull[2];
+
+void
+testVectorInt128Pack ()
+{
+ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+}
+
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
2023-06-06 9:19 [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] Kewen.Lin
@ 2023-06-11 18:39 ` David Edelsohn
2023-06-12 6:48 ` Kewen.Lin
0 siblings, 1 reply; 4+ messages in thread
From: David Edelsohn @ 2023-06-11 18:39 UTC (permalink / raw)
To: Kewen.Lin; +Cc: GCC Patches, Segher Boessenkool, Peter Bergner
[-- Attachment #1: Type: text/plain, Size: 4291 bytes --]
On Tue, Jun 6, 2023 at 5:19 AM Kewen.Lin <linkw@linux.ibm.com> wrote:
> Hi,
>
> As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
> should be guarded under vsx rather than power7, as their
> corresponding bif patterns have the conditions TARGET_VSX
> and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
> move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
> their supports.
>
> Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and
> powerpc64le-linux-gnu P9 and P10.
>
> I'll push this next week if no objections.
>
> BR,
> Kewen
> -----
> PR target/109932
>
> gcc/ChangeLog:
>
> * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
> __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/powerpc/pr109932-1.c: New test.
> * gcc.target/powerpc/pr109932-2.c: New test.
>
This is okay.
Thanks, David
> ---
> gcc/config/rs6000/rs6000-builtins.def | 14 +++++++-------
> gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++
> gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++
> 3 files changed, 39 insertions(+), 7 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c
>
> diff --git a/gcc/config/rs6000/rs6000-builtins.def
> b/gcc/config/rs6000/rs6000-builtins.def
> index 92d9b46e1b9..a38184b0ef9 100644
> --- a/gcc/config/rs6000/rs6000-builtins.def
> +++ b/gcc/config/rs6000/rs6000-builtins.def
> @@ -2009,6 +2009,13 @@
> const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
> XXSPLTD_V2DI vsx_xxspltd_v2di {}
>
> + const vsq __builtin_pack_vector_int128 (unsigned long long, \
> + unsigned long long);
> + PACK_V1TI packv1ti {}
> +
> + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
> + UNPACK_V1TI unpackv1ti {}
> +
>
> ; Power7 builtins (ISA 2.06).
> [power7]
> @@ -2030,16 +2037,9 @@
> const unsigned int __builtin_divweu (unsigned int, unsigned int);
> DIVWEU diveu_si {}
>
> - const vsq __builtin_pack_vector_int128 (unsigned long long, \
> - unsigned long long);
> - PACK_V1TI packv1ti {}
> -
> void __builtin_ppc_speculation_barrier ();
> SPECBARR speculation_barrier {}
>
> - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
> - UNPACK_V1TI unpackv1ti {}
> -
>
> ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
> [power7-64]
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> new file mode 100644
> index 00000000000..3e3f9eaa65e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> @@ -0,0 +1,16 @@
> +/* { dg-require-effective-target powerpc_altivec_ok } */
> +/* { dg-options "-maltivec -mno-vsx" } */
> +
> +/* Verify there is no ICE but one expected error message instead. */
> +
> +#include <altivec.h>
> +
> +extern vector signed __int128 res_vslll;
> +extern unsigned long long aull[2];
> +
> +void
> +testVectorInt128Pack ()
> +{
> + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* {
> dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
> +}
> +
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
> b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
> new file mode 100644
> index 00000000000..3e3f9eaa65e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
> @@ -0,0 +1,16 @@
> +/* { dg-require-effective-target powerpc_altivec_ok } */
> +/* { dg-options "-maltivec -mno-vsx" } */
> +
> +/* Verify there is no ICE but one expected error message instead. */
> +
> +#include <altivec.h>
> +
> +extern vector signed __int128 res_vslll;
> +extern unsigned long long aull[2];
> +
> +void
> +testVectorInt128Pack ()
> +{
> + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* {
> dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
> +}
> +
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
2023-06-11 18:39 ` David Edelsohn
@ 2023-06-12 6:48 ` Kewen.Lin
2023-06-13 8:11 ` [PATCH, committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230] Kewen.Lin
0 siblings, 1 reply; 4+ messages in thread
From: Kewen.Lin @ 2023-06-12 6:48 UTC (permalink / raw)
To: David Edelsohn; +Cc: GCC Patches, Segher Boessenkool, Peter Bergner
on 2023/6/12 02:39, David Edelsohn wrote:
> On Tue, Jun 6, 2023 at 5: 19 AM Kewen. Lin <linkw@ linux. ibm. com> wrote: Hi, As PR109932 shows, builtins __builtin_{un,}pack_vector_int128 should be guarded under vsx rather than power7, as their corresponding bif patterns have the conditions
> ZjQcmQRYFpfptBannerStart
> This Message Is From an External Sender
> This message came from outside your organization.
>
> ZjQcmQRYFpfptBannerEnd
> On Tue, Jun 6, 2023 at 5:19 AM Kewen.Lin <linkw@linux.ibm.com <mailto:linkw@linux.ibm.com>> wrote:
>
> Hi,
>
> As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
> should be guarded under vsx rather than power7, as their
> corresponding bif patterns have the conditions TARGET_VSX
> and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
> move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
> their supports.
>
> Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and
> powerpc64le-linux-gnu P9 and P10.
>
> I'll push this next week if no objections.
>
> BR,
> Kewen
> -----
> PR target/109932
>
> gcc/ChangeLog:
>
> * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
> __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/powerpc/pr109932-1.c: New test.
> * gcc.target/powerpc/pr109932-2.c: New test.
>
>
> This is okay.
Thanks David, pushed as r14-1704. Will backport after burn-in time.
BR,
Kewen
>
> Thanks, David
>
>
> ---
> gcc/config/rs6000/rs6000-builtins.def | 14 +++++++-------
> gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++
> gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++
> 3 files changed, 39 insertions(+), 7 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c
>
> diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
> index 92d9b46e1b9..a38184b0ef9 100644
> --- a/gcc/config/rs6000/rs6000-builtins.def
> +++ b/gcc/config/rs6000/rs6000-builtins.def
> @@ -2009,6 +2009,13 @@
> const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
> XXSPLTD_V2DI vsx_xxspltd_v2di {}
>
> + const vsq __builtin_pack_vector_int128 (unsigned long long, \
> + unsigned long long);
> + PACK_V1TI packv1ti {}
> +
> + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
> + UNPACK_V1TI unpackv1ti {}
> +
>
> ; Power7 builtins (ISA 2.06).
> [power7]
> @@ -2030,16 +2037,9 @@
> const unsigned int __builtin_divweu (unsigned int, unsigned int);
> DIVWEU diveu_si {}
>
> - const vsq __builtin_pack_vector_int128 (unsigned long long, \
> - unsigned long long);
> - PACK_V1TI packv1ti {}
> -
> void __builtin_ppc_speculation_barrier ();
> SPECBARR speculation_barrier {}
>
> - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
> - UNPACK_V1TI unpackv1ti {}
> -
>
> ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
> [power7-64]
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> new file mode 100644
> index 00000000000..3e3f9eaa65e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
> @@ -0,0 +1,16 @@
> +/* { dg-require-effective-target powerpc_altivec_ok } */
> +/* { dg-options "-maltivec -mno-vsx" } */
> +
> +/* Verify there is no ICE but one expected error message instead. */
> +
> +#include <altivec.h>
> +
> +extern vector signed __int128 res_vslll;
> +extern unsigned long long aull[2];
> +
> +void
> +testVectorInt128Pack ()
> +{
> + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
> +}
> +
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
> new file mode 100644
> index 00000000000..3e3f9eaa65e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
> @@ -0,0 +1,16 @@
> +/* { dg-require-effective-target powerpc_altivec_ok } */
> +/* { dg-options "-maltivec -mno-vsx" } */
> +
> +/* Verify there is no ICE but one expected error message instead. */
> +
> +#include <altivec.h>
> +
> +extern vector signed __int128 res_vslll;
> +extern unsigned long long aull[2];
> +
> +void
> +testVectorInt128Pack ()
> +{
> + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
> +}
> +
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH, committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230]
2023-06-12 6:48 ` Kewen.Lin
@ 2023-06-13 8:11 ` Kewen.Lin
0 siblings, 0 replies; 4+ messages in thread
From: Kewen.Lin @ 2023-06-13 8:11 UTC (permalink / raw)
To: GCC Patches; +Cc: Segher Boessenkool, Peter Bergner, David Edelsohn
Hi,
This patch is to make newly added test cases pr109932-{1,2}.c
check int128 effective target to avoid unsupported type error
on 32-bit. I did hit this failure during testing and fixed
it, but made a stupid mistake not updating the local formatted
patch which was actually out of date.
Pushed as obvious in r14-1776-g16eb9d69079d76.
BR,
Kewen
-----
PR testsuite/110230
PR target/109932
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: Adjust with int128 effective target.
* gcc.target/powerpc/pr109932-2.c: Ditto.
---
gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 1 +
gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
index 3e3f9eaa65e..374d9f60618 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target int128 } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -mno-vsx" } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
index 3e3f9eaa65e..374d9f60618 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target int128 } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -mno-vsx" } */
--
2.34.1
^ permalink raw reply [flat|nested] 4+ messages in thread
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Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2023-06-06 9:19 [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] Kewen.Lin
2023-06-11 18:39 ` David Edelsohn
2023-06-12 6:48 ` Kewen.Lin
2023-06-13 8:11 ` [PATCH, committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230] Kewen.Lin
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