From: "Kewen.Lin" <linkw@linux.ibm.com>
To: HAO CHEN GUI <guihaoc@linux.ibm.com>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
David <dje.gcc@gmail.com>, Peter Bergner <bergner@linux.ibm.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH, rs6000] Change insn condition from TARGET_64BIT to TARGET_POWERPC64 for VSX scalar extract/insert instructions
Date: Fri, 19 Aug 2022 11:01:01 +0800 [thread overview]
Message-ID: <988a2f0f-0594-9306-566d-9e93171b9daf@linux.ibm.com> (raw)
In-Reply-To: <2ffb2ff4-540d-3bcf-4e4e-478acbdd910d@linux.ibm.com>
Hi Haochen,
on 2022/8/19 10:35, HAO CHEN GUI wrote:
> Hi,
>
> This patch is for internal issue1136. It changes insn condition from
> TARGET_64BIT to TARGET_POWERPC64 for VSX scalar extract/insert instructions.
> These instructions all use DI registers and can be invoked with -mpowerpc64
> in a 32-bit environment.
>
> This patch also changes prototypes of related built-ins and target selector
> of test cases.
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
> Is this okay for trunk? Any recommendations? Thanks a lot.
>
>
> ChangeLog
> 2022-08-19 Haochen Gui <guihaoc@linux.ibm.com>
>
> gcc/
> * config/rs6000/rs6000-builtins.def
> (__builtin_vsx_scalar_extract_exp): Set return type to const unsigned
> long long.
> (__builtin_vsx_scalar_extract_sig): Likewise.
> * config/rs6000/vsx.md (xsxexpdp): Change insn condition from
> TARGET_64BIT to TARGET_POWERPC64.
> (xsxsigdp): Likewise.
> (xsiexpdp): Likewise.
> (xsiexpdpf): Likewise.
>
> gcc/testsuite/
> * gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Change effective
> target from lp64 to has_arch_ppc64 and add -mpowerpc64 for 32-bit
> environment.
> * gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Likewise.
> * gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Likewise.
> * gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise.
>
>
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
> index f76f54793d7..4ebfd4704a1 100644
> --- a/gcc/config/rs6000/rs6000-builtins.def
> +++ b/gcc/config/rs6000/rs6000-builtins.def
> @@ -2847,10 +2847,10 @@
> pure vsc __builtin_vsx_lxvl (const void *, signed long);
> LXVL lxvl {}
>
> - const signed long __builtin_vsx_scalar_extract_exp (double);
> + const unsigned long long __builtin_vsx_scalar_extract_exp (double);
> VSEEDP xsxexpdp {}
>
> - const signed long __builtin_vsx_scalar_extract_sig (double);
> + const unsigned long long __builtin_vsx_scalar_extract_sig (double);
> VSESDP xsxsigdp {}
>
> const double __builtin_vsx_scalar_insert_exp (unsigned long long, \
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index e226a93bbe5..a01711aa2cb 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -5098,7 +5098,7 @@ (define_insn "xsxexpdp"
> [(set (match_operand:DI 0 "register_operand" "=r")
> (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
> UNSPEC_VSX_SXEXPDP))]
> - "TARGET_P9_VECTOR && TARGET_64BIT"
> + "TARGET_P9_VECTOR && TARGET_POWERPC64"
> "xsxexpdp %0,%x1"
> [(set_attr "type" "integer")])
>
> @@ -5116,7 +5116,7 @@ (define_insn "xsxsigdp"
> [(set (match_operand:DI 0 "register_operand" "=r")
> (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")]
> UNSPEC_VSX_SXSIG))]
> - "TARGET_P9_VECTOR && TARGET_64BIT"
> + "TARGET_P9_VECTOR && TARGET_POWERPC64"
> "xsxsigdp %0,%x1"
> [(set_attr "type" "integer")])
>
> @@ -5147,7 +5147,7 @@ (define_insn "xsiexpdp"
> (unspec:DF [(match_operand:DI 1 "register_operand" "r")
> (match_operand:DI 2 "register_operand" "r")]
> UNSPEC_VSX_SIEXPDP))]
> - "TARGET_P9_VECTOR && TARGET_64BIT"
> + "TARGET_P9_VECTOR && TARGET_POWERPC64"
> "xsiexpdp %x0,%1,%2"
> [(set_attr "type" "fpsimple")])
>
> @@ -5157,7 +5157,7 @@ (define_insn "xsiexpdpf"
> (unspec:DF [(match_operand:DF 1 "register_operand" "r")
> (match_operand:DI 2 "register_operand" "r")]
> UNSPEC_VSX_SIEXPDP))]
> - "TARGET_P9_VECTOR && TARGET_64BIT"
> + "TARGET_P9_VECTOR && TARGET_POWERPC64"
> "xsiexpdp %x0,%1,%2"
> [(set_attr "type" "fpsimple")])
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
> index 35bf1b240f3..c9190bc7c6c 100644
> --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
> +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c
> @@ -1,7 +1,8 @@
> /* { dg-do compile { target { powerpc*-*-* } } } */
> -/* { dg-require-effective-target lp64 } */
> -/* { dg-require-effective-target powerpc_p9vector_ok } */
> /* { dg-options "-mdejagnu-cpu=power9" } */
> +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +/* { dg-require-effective-target powerpc_p9vector_ok } */
Maybe we should add one comment here (also the other touched case) or
in the commit log saying why we reorder the dg-require-effective-target
and dg-options, since the reason isn't obvious. :)
The others looks good to me. Thanks!
BR,
Kewen
>
> /* This test should succeed only on 64-bit configurations. */
> #include <altivec.h>
> diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
> index 637080652b7..a391ac8cce3 100644
> --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
> +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c
> @@ -1,7 +1,8 @@
> /* { dg-do compile { target { powerpc*-*-* } } } */
> -/* { dg-require-effective-target lp64 } */
> -/* { dg-require-effective-target powerpc_p9vector_ok } */
> /* { dg-options "-mdejagnu-cpu=power9" } */
> +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +/* { dg-require-effective-target powerpc_p9vector_ok } */
>
> /* This test should succeed only on 64-bit configurations. */
> #include <altivec.h>
> diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
> index d8243258a67..cd35279e2e7 100644
> --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
> +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
> @@ -1,7 +1,8 @@
> /* { dg-do compile { target { powerpc*-*-* } } } */
> -/* { dg-require-effective-target lp64 } */
> -/* { dg-require-effective-target powerpc_p9vector_ok } */
> /* { dg-options "-mdejagnu-cpu=power9" } */
> +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +/* { dg-require-effective-target powerpc_p9vector_ok } */
>
> /* This test should succeed only on 64-bit configurations. */
> #include <altivec.h>
> diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
> index 3ecbe3318e8..9c9fe9b9c2f 100644
> --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
> +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
> @@ -1,7 +1,8 @@
> /* { dg-do compile { target { powerpc*-*-* } } } */
> -/* { dg-require-effective-target lp64 } */
> -/* { dg-require-effective-target powerpc_p9vector_ok } */
> /* { dg-options "-mdejagnu-cpu=power9" } */
> +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */
> +/* { dg-require-effective-target has_arch_ppc64 } */
> +/* { dg-require-effective-target powerpc_p9vector_ok } */
>
> /* This test should succeed only on 64-bit configurations. */
> #include <altivec.h>
next prev parent reply other threads:[~2022-08-19 3:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-19 2:35 HAO CHEN GUI
2022-08-19 3:01 ` Kewen.Lin [this message]
2022-08-19 6:09 ` HAO CHEN GUI
2022-08-23 14:26 ` Segher Boessenkool
2022-08-24 5:11 ` HAO CHEN GUI
2022-08-24 5:24 ` Kewen.Lin
2022-08-24 6:31 ` HAO CHEN GUI
2022-08-25 3:37 ` HAO CHEN GUI
2022-08-25 5:22 ` Kewen.Lin
2022-08-25 14:01 ` David Edelsohn
2022-08-26 2:42 ` HAO CHEN GUI
2022-08-26 2:51 ` Kewen.Lin
2022-08-26 13:32 ` David Edelsohn
2022-08-25 15:17 ` Segher Boessenkool
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