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* (no subject)
@ 2023-10-03  9:09 Kito Cheng
  2023-10-03  9:11 ` Kito Cheng
  0 siblings, 1 reply; 41+ messages in thread
From: Kito Cheng @ 2023-10-03  9:09 UTC (permalink / raw)
  To: gcc-patches, kito.cheng, palmer, jeffreyalaw, rdapp, juzhe.zhong

From: Kito Cheng <kito.cheng@sifive.com>

Reply-To:

Subject: [PATCH v1 0/4] RISC-V target attribute

In-Reply-To:

This patch set implement target attribute for RISC-V target, which is similar to other target like x86 or ARM, let user able to set some local setting per function without changing global settings.

We support arch, tune and cpu first, and we will support other target attribute later, this version DOES NOT include multi-version function support yet, that is future work, probably work for GCC 15.

The full proposal is put in RISC-V C-API document[1], which has discussed with RISC-V LLVM community, so we have consistent syntax and semantics. 

[1] https://github.com/riscv-non-isa/riscv-c-api-doc/pull/35



^ permalink raw reply	[flat|nested] 41+ messages in thread
* (no subject)
@ 2023-08-13 19:05 Eddy Young Tie Yang
  2023-08-13 19:18 ` Andrew Pinski
  0 siblings, 1 reply; 41+ messages in thread
From: Eddy Young Tie Yang @ 2023-08-13 19:05 UTC (permalink / raw)
  To: gcc-patches

From d57ac4f9a095a2f616863efd524ac2d87276becb Mon Sep 17 00:00:00 2001
From: Eddy Young <jeyoung@priscimon.com>
Date: Sun, 13 Aug 2023 19:59:12 +0100
Subject: [PATCH] gcc/reload.h: Change type of x_spill_indirect_levels

---
 ChangeLog    | 5 +++++
 gcc/reload.h | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 3dd1ce544af..442aa9192a9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2015-08-13 Eddy Young <jeyoung@priscimon.com>
+
+	* gcc/reload.h: Change type of x_spill_indirect_levels of struct
+	target_reload to support C++17 build.
+
 2015-06-23  Release Manager
 
 	* GCC 4.8.5 released.
diff --git a/gcc/reload.h b/gcc/reload.h
index 7a13ad30e82..1e94d8ea93b 100644
--- a/gcc/reload.h
+++ b/gcc/reload.h
@@ -166,7 +166,7 @@ struct target_reload {
      value indicates the level of indirect addressing supported, e.g., two
      means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
      a hard register.  */
-  bool x_spill_indirect_levels;
+  unsigned char x_spill_indirect_levels;
 
   /* True if caller-save has been reinitialized.  */
   bool x_caller_save_initialized_p;
-- 
2.39.2


^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2023-04-02 17:58 d-ni
  0 siblings, 0 replies; 41+ messages in thread
From: d-ni @ 2023-04-02 17:58 UTC (permalink / raw)
  To: Info

[-- Attachment #1: Type: text/plain, Size: 103 bytes --]

Hello i have a word to share with you , kindly contact :  mrslingli373@gmail.com        for more info

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re: [PATCH][i386] Split not+broadcast+pand to broadcast+pandn.
@ 2021-06-01 14:02 Segher Boessenkool
  2021-06-02  5:39 ` liuhongt
  0 siblings, 1 reply; 41+ messages in thread
From: Segher Boessenkool @ 2021-06-01 14:02 UTC (permalink / raw)
  To: Hongtao Liu; +Cc: Andrew Pinski, GCC Patches

> 	PR target/100711
> 	* simplify-rtx.c (simplify_unary_operation_1):
> 	Simplify (vec_duplicate (not op)) to (not (vec_duplicate op)).

This is not a simplification.  If we want to do this we need to document
this canonicalisation (in md.texi, "Insn Canonicalizations").

> +    /* Prefer (not (vec_duplicate (nonimmedaite_operand)))
> +       to (vec_duplicate (not (nonimmedaite_operand))).  */

What Andrew said here (also, it's misspelled :-) )

> +    case VEC_DUPLICATE:
> +      if (GET_CODE (op) == NOT)
> +	return gen_rtx_NOT (mode, gen_rtx_VEC_DUPLICATE (mode, XEXP (op, 0)));
> +      break;

If it isn't a canonicalisation you need to simplify the result, and then
only do it if it does in fact simplify.  You risk "simplification" loops
if you don't.


Segher

^ permalink raw reply	[flat|nested] 41+ messages in thread
* [PATCH RFC] bootstrap: Update requirement to C++11.
@ 2020-05-14 21:05 Jason Merrill
  2020-05-15  7:14 ` Richard Biener
  0 siblings, 1 reply; 41+ messages in thread
From: Jason Merrill @ 2020-05-14 21:05 UTC (permalink / raw)
  To: gcc-patches

There seemed to be general agreement last November that we would move to
allowing C++11 features to be used in GCC 11; this patch implements that
direction.  Are changes needed anywhere else?

ChangeLog
2020-05-14  Jason Merrill  <jason@redhat.com>

	* configure.ac: Update bootstrap dialect to -std=gnu++11.

gcc/ChangeLog
2020-05-14  Jason Merrill  <jason@redhat.com>

	* doc/install.texi (Prerequisites): Update boostrap compiler
	requirement to C++11/GCC 4.8.
---
 gcc/doc/install.texi | 14 ++++++++------
 configure.ac         |  6 +++---
 ChangeLog            |  4 ++++
 configure            |  6 +++---
 4 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 876b04f9c45..f47e3c76f73 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -238,15 +238,17 @@ described below.
 
 @heading Tools/packages necessary for building GCC
 @table @asis
-@item ISO C++98 compiler
-Necessary to bootstrap GCC, although versions of GCC prior
-to 4.8 also allow bootstrapping with a ISO C89 compiler and versions
-of GCC prior to 3.4 also allow bootstrapping with a traditional
-(K&R) C compiler.
+@item ISO C++11 compiler
+Necessary to bootstrap GCC.
+
+Versions of GCC prior to 11 also allow bootstrapping with an ISO C++98
+compiler, versions of GCC prior to 4.8 also allow bootstrapping with a
+ISO C89 compiler, and versions of GCC prior to 3.4 also allow
+bootstrapping with a traditional (K&R) C compiler.
 
 To build all languages in a cross-compiler or other configuration where
 3-stage bootstrap is not performed, you need to start with an existing
-GCC binary (version 3.4 or later) because source code for language
+GCC binary (version 4.8 or later) because source code for language
 frontends other than C might use GCC extensions.
 
 Note that to bootstrap GCC with versions of GCC earlier than 3.4, you
diff --git a/configure.ac b/configure.ac
index c78d9cbea62..63d92b73061 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1462,10 +1462,10 @@ case "$have_compiler:$host:$target:$enable_bootstrap" in
     ;;
 esac
 
-# When bootstrapping with GCC, build stage 1 in C++98 mode to ensure that a
-# C++98 compiler can still start the bootstrap.
+# When bootstrapping with GCC, build stage 1 in C++11 mode to ensure that a
+# C++11 compiler can still start the bootstrap.
 if test "$enable_bootstrap:$GXX" = "yes:yes"; then
-  CXX="$CXX -std=gnu++98"
+  CXX="$CXX -std=gnu++11"
 fi
 
 # Used for setting $lt_cv_objdir
diff --git a/ChangeLog b/ChangeLog
index a7fcf77b9b2..1d281855a3e 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2020-05-14  Jason Merrill  <jason@redhat.com>
+
+	* configure.ac: Update bootstrap dialect to -std=gnu++11.
+
 2020-04-29  Thomas Schwinge  <thomas@codesourcery.com>
 
 	PR target/92713
diff --git a/configure b/configure
index 4cc938ebb7d..9b39035bbcc 100755
--- a/configure
+++ b/configure
@@ -5523,10 +5523,10 @@ $as_echo "$as_me: WARNING: trying to bootstrap a cross compiler" >&2;}
     ;;
 esac
 
-# When bootstrapping with GCC, build stage 1 in C++98 mode to ensure that a
-# C++98 compiler can still start the bootstrap.
+# When bootstrapping with GCC, build stage 1 in C++11 mode to ensure that a
+# C++11 compiler can still start the bootstrap.
 if test "$enable_bootstrap:$GXX" = "yes:yes"; then
-  CXX="$CXX -std=gnu++98"
+  CXX="$CXX -std=gnu++11"
 fi
 
 # Used for setting $lt_cv_objdir

base-commit: 4e1592f8e1d6366699e05c0824fc3dc39ca7314b
-- 
2.18.1


^ permalink raw reply	[flat|nested] 41+ messages in thread
[parent not found: <Pine.NEB.4.64.1302141014370.336@cesium.clock.org>]
[parent not found: <CAGqM8fbk_QwhWoQ=6i_429diC0-v29BpNRaF=xkwX61ETz+T3g@mail.gmail.com>]
[parent not found: <CACkGtrg=-AFkMZdxKvzvZ-9OHqAp-aDBr5nQmhEpBCRy7uoC0w@mail.gmail.com>]
* Re:
@ 2011-09-03 13:19 Uros Bizjak
  0 siblings, 0 replies; 41+ messages in thread
From: Uros Bizjak @ 2011-09-03 13:19 UTC (permalink / raw)
  To: gcc-patches; +Cc: Ilya Tocar

Hello!

> Here is a patch which adds few more splits for AGU stalls avoidance on
> Atom. It also fixes cost model and detects AGU stalls more
> efficiently.
>
> Bootstrapped and checked on x86_64-linux.
>
> 2011-09-02  Enkovich Ilya  <ilya.enkovich@intel.com>
>
>	* config/i386/i386-protos.h (ix86_lea_outperforms): New.
>	(ix86_avoid_lea_for_add): Likewise.
>	(ix86_avoid_lea_for_addr): Likewise.
>	(ix86_split_lea_for_addr): Likewise.
>
>	* config/i386/i386.c (LEA_MAX_STALL): New.
>	(increase_distance): Likewise.
>	(insn_defines_reg): Likewise.
>	(insn_uses_reg_mem): Likewise.
>	(distance_non_agu_define_in_bb): Likewise.
>	(distance_agu_use_in_bb): Likewise.
>	(ix86_lea_outperforms): Likewise.
>	(ix86_ok_to_clobber_flags): Likewise.
>	(ix86_avoid_lea_for_add): Likewise.
>	(ix86_avoid_lea_for_addr): Likewise.
>	(ix86_split_lea_for_addr): Likewise.
>	(distance_non_agu_define): Search in pred BBs added.
>	(distance_agu_use): Search in succ BBs added.
>	(IX86_LEA_PRIORITY): Value changed from 2 to 0.
>	(LEA_SEARCH_THRESHOLD): Now depends on LEA_MAX_STALL.
>	(ix86_lea_for_add_ok): Use ix86_lea_outperforms to make decision.
>
>	* config/i386/i386.md: Splits added to transform lea into a
>	sequence of instructions.

Did you also test on x32 ? H.J.'s x32 page [1] currently says that
Atom LEA optimization is disabled on x32 for some reason.

The patch looks OK to me, with a few nits below.

[1] https://sites.google.com/site/x32abi/

--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h

+bool
+ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
+{
+  unsigned int regno0 = true_regnum (operands[0]) ;
+  unsigned int regno1 = -1;
+  unsigned int regno2 = -1;

Use INVALID_REGNUM here.

+extern void
+ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
+{

Missing comment.

--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5777,6 +5777,41 @@
         (const_string "none")))
    (set_attr "mode" "QI")])

+;; Split non destructive adds if we cannot use lea.
+(define_split
+  [(set (match_operand:SWI48 0 "register_operand" "")
+	(plus:SWI48 (match_operand:SWI48 1 "register_operand" "")
+              (match_operand:SWI48 2 "nonmemory_operand" "")))
+   (clobber (reg:CC FLAGS_REG))]
+  "reload_completed && ix86_avoid_lea_for_add (insn, operands)"
+  [(set (match_dup 0) (match_dup 1))
+   (parallel [(set (match_dup 0) (plus:<MODE> (match_dup 0) (match_dup 2)))
+	      (clobber (reg:CC FLAGS_REG))])
+  ]
+)

Put all closing braces on one line:

	      (clobber (reg:CC FLAGS_REG))])])

+;; Split lea into one or more ALU instructions if profitable.
+(define_split
+  [(set (match_operand:SI 0 "register_operand" "")
+	(subreg:SI (match_operand:DI 1 "lea_address_operand" "") 0))]
+  "reload_completed && ix86_avoid_lea_for_addr (insn, operands)"
+  [(const_int 0)]
+{
+  ix86_split_lea_for_addr (operands, SImode);
+  DONE;
+})

This is valid only for TARGET_64BIT.

Please note that x32 adds quite some different LEA patterns (see
i386.md, line 5466+). I suggest you merge your splitters with these
define_insn patterns into define_insn_and_split, adding "&&
reload_completed && ix86_avoid_lea_for_addr (insn, operands)" as a
split condition.

Uros.

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2008-11-23 20:58 Uros Bizjak
  2008-11-23 22:08 ` Re: H.J. Lu
  0 siblings, 1 reply; 41+ messages in thread
From: Uros Bizjak @ 2008-11-23 20:58 UTC (permalink / raw)
  To: GCC Patches; +Cc: H.J. Lu, Ross Ridge

Hello!

> H.J. Lu writes:
> >I am not sure how useful that is for 32bit since it will generate a
> >nop for most machines which do need mfence.
>
> I don't understand what you're saying.  Using "lock orb" should result
> in a memory fence on any IA-32 SMP system, old or new.  It's just a more
> heavyweight way of ordering loads and stores.
>
> The Linux kernel apparently takes the same approach, using either "lock
> addl" or "mfence" depending on whether SSE2 instructions are available
> at compile time.
>   

No, linux dynamically patches its code:

#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", 
X86_FEATURE_XMM2)
#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", 
X86_FEATURE_XMM2)
#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", 
X86_FEATURE_XMM)

But anyway, gcc can't do that by itself.

Uros.

^ permalink raw reply	[flat|nested] 41+ messages in thread
[parent not found: <20080730133704.GC28583@mx.loc>]
* Re:
@ 2007-07-06  8:06 Tobias Burnus
  2007-07-06  8:30 ` Re: Lee Millward
  0 siblings, 1 reply; 41+ messages in thread
From: Tobias Burnus @ 2007-07-06  8:06 UTC (permalink / raw)
  To: lee.millward; +Cc: fortran, gcc-patches

Hi Lee,

I only glanced at your patch.

Lee Millward wrote:
> * gfortran.dg/cmplx_intrinsic_1.f90
>	* gfortran.dg/pr32222.f90: New test.
>	* gfortran.dg/pr32238.f90: New test.
>	* gfortran.dg/pr32242.f90: New test

You miss something like
! { dg-do run }
or
! { dg-do compile }

For those test cases with modules, you should add

! { dg-final { cleanup-modules "MODULE_NAME" } }

to delete the .mod files after compilation.

Tobias


^ permalink raw reply	[flat|nested] 41+ messages in thread
* [libstdc++]
@ 2007-03-27 22:35 Richard Henderson
  2007-03-27 23:29 ` [libstdc++] Paolo Carlini
  0 siblings, 1 reply; 41+ messages in thread
From: Richard Henderson @ 2007-03-27 22:35 UTC (permalink / raw)
  To: libstdc++, gcc-patches

Something like the following is required for Win64, which is a P64 target.

I'm not sure what's required generically to assert that intptr_t is
present; certainly it's available on Linux and Win64...


r~


	* include/bits/locale_facets.tcc (do_put): Convert pointer to
	intptr_t for printing.

--- include/bits/locale_facets.tcc	(revision 123278)
+++ include/bits/locale_facets.tcc	(local)
@@ -1314,7 +1314,7 @@ _GLIBCXX_BEGIN_LDBL_NAMESPACE
       __io.flags((__flags & __fmt) | (ios_base::hex | ios_base::showbase));
 
       __s = _M_insert_int(__s, __io, __fill,
-			  reinterpret_cast<unsigned long>(__v));
+			  reinterpret_cast<intptr_t>(__v));
       __io.flags(__flags);
       return __s;
     }

^ permalink raw reply	[flat|nested] 41+ messages in thread
* re:
@ 2007-02-03  3:51 Kenneth Zadeck
  0 siblings, 0 replies; 41+ messages in thread
From: Kenneth Zadeck @ 2007-02-03  3:51 UTC (permalink / raw)
  To: gcc-patches; +Cc: kkojima

Kaz, 

This patch is fine.  This is after all, your port.

Kenny

> The last one is for SH specific changes.
> 
> SH backend uses the old flow analysis stuff in sh_output_mi_thunk
> and it causes compile time errors in dataflow blanch.  The appended
> patch simply disables them.  The 2nd hunk of the patch below is to
> avoid moving pop insn for the link register to the outside of epilogue
> when -fomit-frame-pointer option is specified .  It looks that more
> optimizations are done in dataflow branch for epilogue.  Changing
> UNSPEC_EH_RETURN to UNSPECV_EH_RETURN and unspec to unspec_volatile
> in eh_return patterns in the last hunk of the patch are needed to
> prevent optimizing eh_return insns away in epilogue.
> The remained part of the patch is lengthy but mechanical.  It adds
> new sibcall_value* patterns to generate (set return_reg (call ...))
> insn instead (call ...) insn for sibcall_value.  These new patterns
> are slightly modified versions of existing sibcall* patterns.
> Without it, df can't compute the correct use of return registers
> when sibcall occurs.
> The first hunk is to remove unneeded brackets.
> 
> With this patch and the other generic changes I've sent, dataflow-branch
> bootstrapped on sh4-unknown-linux-gnu and there are no real regressions
> compared with trunk.
> 
> Regards,
> 	kaz
> --
> 	* config/sh/sh.c (sh_expand_prologue): Remove unneeded brackets.
> 	(sh_expand_epilogue): Add blockage insn when not
> 	frame_pointer_needed.
> 	(sh_output_mi_thunk): Don't use flow analysis here.
> 	* config/sh/sh.md (UNSPEC_EH_RETURN): Remove.
> 	(UNSPECV_EH_RETURN): New macro.
> 	(sibcall_valuei): New.
> 	(sibcall_valuei_pcrel, sibcall_value_pcrel): Likewise.
> 	(sibcall_value_compact, sibcall_value_media): Likewise.
> 	(sibcall_value): Use new sibcall_value* patterns.
> 	(eh_set_ra_si): Use unspec_volatile and UNSPECV_EH_RETURN.
> 	(eh_set_ra_di, eh_set_ra_di+1): Likewise.
> 
> diff -uprN ORIG/dataflow/gcc/config/sh/sh.c LOCAL/dataflow/gcc/config/sh/sh.c
> --- ORIG/dataflow/gcc/config/sh/sh.c	2007-01-24 09:06:27.000000000 +0900
> +++ LOCAL/dataflow/gcc/config/sh/sh.c	2007-01-25 21:41:12.000000000 +0900
> @@ -6181,7 +6181,7 @@ sh_expand_prologue (void)
>         incoming-argument decoder and/or of the return trampoline from
>         the GOT, so make sure the PIC register is preserved and
>         initialized.  */
> -    df_set_regs_ever_live ([PIC_OFFSET_TABLE_REGNUM], true);
> +    df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true);
>  
>    if (TARGET_SHCOMPACT
>        && (current_function_args_info.call_cookie & ~ CALL_COOKIE_RET_TRAMP(1)))
> @@ -6749,7 +6749,11 @@ sh_expand_epilogue (bool sibcall_p)
>      {
>        save_size = 0;
>        if (TEST_HARD_REG_BIT (live_regs_mask, PR_REG))
> -	pop (PR_REG);
> +	{
> +	  if (!frame_pointer_needed)
> +	    emit_insn (gen_blockage ());
> +	  pop (PR_REG);
> +	}
>        for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
>  	{
>  	  int j = (FIRST_PSEUDO_REGISTER - 1) - i;
> @@ -10308,6 +10312,7 @@ sh_output_mi_thunk (FILE *file, tree thu
>    insn_locators_initialize ();
>    insns = get_insns ();
>  
> +#if 0
>    if (optimize > 0)
>      {
>        /* Initialize the bitmap obstacks.  */
> @@ -10334,6 +10339,14 @@ sh_output_mi_thunk (FILE *file, tree thu
>        else if (flag_pic)
>  	split_all_insns_noflow ();
>      }
> +#else
> +  if (optimize > 0)
> +    {
> +      if (! cfun->cfg)
> +	init_flow ();
> +      split_all_insns_noflow ();
> +    }
> +#endif
>  
>    sh_reorg ();
>  
> @@ -10345,6 +10358,7 @@ sh_output_mi_thunk (FILE *file, tree thu
>    final (insns, file, 1);
>    final_end_function ();
>  
> +#if 0
>    if (optimize > 0)
>      {
>        /* Release all memory allocated by df.  */
> @@ -10358,6 +10372,7 @@ sh_output_mi_thunk (FILE *file, tree thu
>        bitmap_obstack_release (&reg_obstack);
>        bitmap_obstack_release (NULL);
>      }
> +#endif
>  
>    reload_completed = 0;
>    epilogue_completed = 0;
> diff -uprN ORIG/dataflow/gcc/config/sh/sh.md LOCAL/dataflow/gcc/config/sh/sh.md
> --- ORIG/dataflow/gcc/config/sh/sh.md	2007-01-24 09:06:27.000000000 +0900
> +++ LOCAL/dataflow/gcc/config/sh/sh.md	2007-01-27 21:16:27.000000000 +0900
> @@ -135,7 +135,6 @@
>    (UNSPEC_FSINA		16)
>    (UNSPEC_NSB		17)
>    (UNSPEC_ALLOCO	18)
> -  (UNSPEC_EH_RETURN	19)
>    (UNSPEC_TLSGD		20)
>    (UNSPEC_TLSLDM	21)
>    (UNSPEC_TLSIE		22)
> @@ -163,6 +162,7 @@
>    (UNSPECV_CONST8	6)
>    (UNSPECV_WINDOW_END	10)
>    (UNSPECV_CONST_END	11)
> +  (UNSPECV_EH_RETURN	12)
>  ])
>  
>  ;; -------------------------------------------------------------------------
> @@ -8013,15 +8013,197 @@ label:
>    DONE;
>  }")
>  
> -(define_expand "sibcall_value"
> -  [(set (match_operand 0 "" "")
> -	(call (match_operand 1 "" "")
> +(define_insn "sibcall_valuei"
> +  [(set (match_operand 0 "" "=rf")
> +	(call (mem:SI (match_operand:SI 1 "register_operand" "k"))
> +	      (match_operand 2 "" "")))
> +   (use (reg:PSI FPSCR_REG))
> +   (return)]
> +  "TARGET_SH1"
> +  "jmp	@%1%#"
> +  [(set_attr "needs_delay_slot" "yes")
> +   (set (attr "fp_mode")
> +	(if_then_else (eq_attr "fpu_single" "yes")
> +		      (const_string "single") (const_string "double")))
> +   (set_attr "type" "jump_ind")])
> +
> +(define_insn "sibcall_valuei_pcrel"
> +  [(set (match_operand 0 "" "=rf")
> +	(call (mem:SI (match_operand:SI 1 "arith_reg_operand" "k"))
> +	      (match_operand 2 "" "")))
> +   (use (match_operand 3 "" ""))
> +   (use (reg:PSI FPSCR_REG))
> +   (return)]
> +  "TARGET_SH2"
> +  "braf	%1\\n%O3:%#"
> +  [(set_attr "needs_delay_slot" "yes")
> +   (set (attr "fp_mode")
> +	(if_then_else (eq_attr "fpu_single" "yes")
> +		      (const_string "single") (const_string "double")))
> +   (set_attr "type" "jump_ind")])
> +
> +(define_insn_and_split "sibcall_value_pcrel"
> +  [(set (match_operand 0 "" "=rf")
> +	(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" ""))
>  	      (match_operand 2 "" "")))
> -   (match_operand 3 "" "")]
> +   (use (reg:PSI FPSCR_REG))
> +   (clobber (match_scratch:SI 3 "=k"))
> +   (return)]
> +  "TARGET_SH2"
> +  "#"
> +  "reload_completed"
> +  [(const_int 0)]
> +  "
> +{
> +  rtx lab = PATTERN (gen_call_site ());
> +  rtx call_insn;
> +
> +  emit_insn (gen_sym_label2reg (operands[3], operands[1], lab));
> +  call_insn = emit_call_insn (gen_sibcall_valuei_pcrel (operands[0],
> +							operands[3],
> +							operands[2],
> +							copy_rtx (lab)));
> +  SIBLING_CALL_P (call_insn) = 1;
> +  DONE;
> +}"
> +  [(set_attr "needs_delay_slot" "yes")
> +   (set (attr "fp_mode")
> +	(if_then_else (eq_attr "fpu_single" "yes")
> +		      (const_string "single") (const_string "double")))
> +   (set_attr "type" "jump_ind")])
> +
> +(define_insn "sibcall_value_compact"
> +  [(set (match_operand 0 "" "=rf,rf")
> +	(call (mem:SI (match_operand:SI 1 "register_operand" "k,k"))
> +	      (match_operand 2 "" "")))
> +   (return)
> +   (use (match_operand:SI 3 "register_operand" "z,x"))
> +   (use (reg:SI R1_REG))
> +   (use (reg:PSI FPSCR_REG))
> +   ;; We want to make sure the `x' above will only match MACH_REG
> +   ;; because sibcall_epilogue may clobber MACL_REG.
> +   (clobber (reg:SI MACL_REG))]
> +  "TARGET_SHCOMPACT"
> +  "@
> +	jmp	@%1%#
> +	jmp	@%1\\n	sts	%3, r0"
> +  [(set_attr "needs_delay_slot" "yes,no")
> +   (set_attr "length" "2,4")
> +   (set (attr "fp_mode") (const_string "single"))
> +   (set_attr "type" "jump_ind")])
> +
> +(define_insn "sibcall_value_media"
> +  [(set (match_operand 0 "" "=rf")
> +	(call (mem:DI (match_operand 1 "target_reg_operand" "k"))
> +	      (match_operand 2 "" "")))
> +   (use (reg:SI PR_MEDIA_REG))
> +   (return)]
> +  "TARGET_SHMEDIA"
> +  "blink	%1, r63"
> +  [(set_attr "type" "jump_media")])
> +
> +(define_expand "sibcall_value"
> +  [(parallel
> +    [(set (match_operand 0 "arith_reg_operand" "")
> +	  (call (mem:SI (match_operand 1 "arith_reg_operand" ""))
> +	  	(match_operand 2 "" "")))
> +     (match_operand 3 "" "")
> +     (use (reg:PSI FPSCR_REG))
> +     (return)])]
>    ""
>    "
>  {
> -  emit_call_insn (gen_sibcall (operands[1], operands[2], operands[3]));
> +  if (TARGET_SHMEDIA)
> +    {
> +      operands[1] = shmedia_prepare_call_address (operands[1], 1);
> +      emit_call_insn (gen_sibcall_value_media (operands[0], operands[1],
> +					       operands[2]));
> +      DONE;
> +    }
> +  else if (TARGET_SHCOMPACT && operands[3]
> +	   && (INTVAL (operands[3]) & ~ CALL_COOKIE_RET_TRAMP (1)))
> +    {
> +      rtx cookie_rtx = operands[3];
> +      long cookie = INTVAL (cookie_rtx);
> +      rtx func = XEXP (operands[1], 0);
> +      rtx mach, r1;
> +
> +      if (flag_pic)
> +	{
> +	  if (GET_CODE (func) == SYMBOL_REF && ! SYMBOL_REF_LOCAL_P (func))
> +	    {
> +	      rtx reg = gen_reg_rtx (Pmode);
> +
> +	      emit_insn (gen_symGOT2reg (reg, func));
> +	      func = reg;
> +	    }
> +	  else
> +	    func = legitimize_pic_address (func, Pmode, 0);
> +	}
> +
> +      /* FIXME: if we could tell whether all argument registers are
> +	 already taken, we could decide whether to force the use of
> +	 MACH_REG or to stick to R0_REG.  Unfortunately, there's no
> +	 simple way to tell.  We could use the CALL_COOKIE, but we
> +	 can't currently tell a register used for regular argument
> +	 passing from one that is unused.  If we leave it up to reload
> +	 to decide which register to use, it seems to always choose
> +	 R0_REG, which leaves no available registers in SIBCALL_REGS
> +	 to hold the address of the trampoline.  */
> +      mach = gen_rtx_REG (SImode, MACH_REG);
> +      r1 = gen_rtx_REG (SImode, R1_REG);
> +
> +      /* Since such a call function may use all call-clobbered
> +	 registers, we force a mode switch earlier, so that we don't
> +	 run out of registers when adjusting fpscr for the call.  */
> +      emit_insn (gen_force_mode_for_call ());
> +
> +      operands[1]
> +	= function_symbol (NULL, \"__GCC_shcompact_call_trampoline\",
> +			   SFUNC_GOT);
> +      operands[1] = force_reg (SImode, operands[1]);
> +
> +      /* We don't need a return trampoline, since the callee will
> +	 return directly to the upper caller.  */
> +      if (cookie & CALL_COOKIE_RET_TRAMP (1))
> +	{
> +	  cookie &= ~ CALL_COOKIE_RET_TRAMP (1);
> +	  cookie_rtx = GEN_INT (cookie);
> +	}
> +
> +      emit_move_insn (mach, func);
> +      emit_move_insn (r1, cookie_rtx);
> +
> +      emit_call_insn (gen_sibcall_value_compact (operands[0], operands[1],
> +						 operands[2], mach));
> +      DONE;
> +    }
> +  else if (TARGET_SHCOMPACT && flag_pic
> +	   && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
> +	   && ! SYMBOL_REF_LOCAL_P (XEXP (operands[1], 0)))
> +    {
> +      rtx reg = gen_reg_rtx (Pmode);
> +
> +      emit_insn (gen_symGOT2reg (reg, XEXP (operands[1], 0)));
> +      XEXP (operands[1], 0) = reg;
> +    }
> +  if (flag_pic && TARGET_SH2
> +      && GET_CODE (operands[1]) == MEM
> +      && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
> +      /* The PLT needs the PIC register, but the epilogue would have
> +	 to restore it, so we can only use PC-relative PIC calls for
> +	 static functions.  */
> +      && SYMBOL_REF_LOCAL_P (XEXP (operands[1], 0)))
> +    {
> +      emit_call_insn (gen_sibcall_value_pcrel (operands[0],
> +					       XEXP (operands[1], 0),
> +					       operands[2]));
> +      DONE;
> +    }
> +  else
> +    operands[1] = force_reg (SImode, XEXP (operands[1], 0));
> +
> +  emit_call_insn (gen_sibcall_valuei (operands[0], operands[1], operands[2]));
>    DONE;
>  }")
>  
> @@ -9095,19 +9277,22 @@ mov.l\\t1f,r0\\n\\
>  ;; until we know where it will be put in the stack frame.
>  
>  (define_insn "eh_set_ra_si"
> -  [(unspec [(match_operand:SI 0 "register_operand" "r")] UNSPEC_EH_RETURN)
> +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")]
> +      UNSPECV_EH_RETURN)
>     (clobber (match_scratch:SI 1 "=&r"))]
>    "! TARGET_SHMEDIA64"
>    "#")
>  
>  (define_insn "eh_set_ra_di"
> -  [(unspec [(match_operand:DI 0 "register_operand" "r")] UNSPEC_EH_RETURN)
> +  [(unspec_volatile [(match_operand:DI 0 "register_operand" "r")]
> +      UNSPECV_EH_RETURN)
>     (clobber (match_scratch:DI 1 "=&r"))]
>    "TARGET_SHMEDIA64"
>    "#")
>  
>  (define_split
> -  [(unspec [(match_operand 0 "register_operand" "")] UNSPEC_EH_RETURN)
> +  [(unspec_volatile [(match_operand 0 "register_operand" "")]
> +      UNSPECV_EH_RETURN)
>     (clobber (match_scratch 1 ""))]
>    "reload_completed"
>    [(const_int 0)]

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2005-07-15 21:25 ИнфоПространство
  0 siblings, 0 replies; 41+ messages in thread
From: ИнфоПространство @ 2005-07-15 21:25 UTC (permalink / raw)
  To: gcc-patches

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; format=flowed; charset="windows-1251"; reply-type=original, Size: 2486 bytes --]

  =- ÊÎÐÏÎÐÀÒÈÂÍÛÅ ÌÅÐÎÏÐÈßÒÈß -=
  =- ÍÀ ÎÑÒÎÆÅÍÊÅ ÍÀ 2000 êâ.ì -=

 • êîíôåðåíöèè, ñåìèíàðû, ñîáðàíèÿ
 • âûñòàâêè, ïðåçåíòàöèè, ïðàçäíèêè
 • áàíêåòû, ôóðøåòû

 1. Ôóíêöèîíàëüíàÿ ïðèíàäëåæíîñòü: Öåíòð ïðåäíàçíà÷åí äëÿ ïðîâåäåíèÿ âûñòàâîê, êîíôåðåíöèé, ñåìèíàðîâ, ïðåçåíòàöèé, ïîêàçîâ è ïðàçäíè÷íûõ ìåðîïðèÿòèé.

 2. Ìåñòîíàõîæäåíèå: Èñòîðè÷åñêèé öåíòð, 300 ìåòðîâ îò Õðàìà Õðèñòà Ñïàñèòåëÿ, ì.Êðîïîòêèíñêàÿ, ìèêð-í Îñòîæåíêà, 50 ìåòðîâ îò Ïðå÷èñòåíñêîé íàá.

 3. Òåõíè÷åñêèå õàðàêòåðèñòèêè: Îáùàÿ ïëîùàäü öåíòðà 2000 êâ.ì, óíèâåðñàëüíûé çàë-òðàíñôîðìåð ñ äèàïàçîíîì ïëîùàäåé îò 20 äî 1500 êâ.ì, 2 VIP-çàëà, Êàôå-ïèööåðèÿ-êîíäèòåðñêàÿ.

 4. Îñîáåííîñòè:
 - Ñïåöèàëüíûå âûñòàâî÷íûå ñòåíäû äî ïîòîëêà ñ ðàçëè÷íîé öâåòîâîé è ôóíêöèîíàëüíîé ãàììîé.
 - Âîçìîæíîñòü ýêñïîíèðîâàíèÿ àâòîìîáèëåé.
 - Âñòðîåííîå â ïîòîëîê âûñòàâî÷íîå îñâåùåíèå.
 - Øèðîêèé âûáîð ìåáåëè.
 - 2 ñöåíû
 - 2 âõîäà: öåíòðàëüíûé è òåõíè÷åñêèé.
 - Âûñîêîêà÷åñòâåííîå êîâðîâîå ïîêðûòèå
 - Ïðîôåññèîíàëüíîå çâóêîóñèëèòåëüíîå îáîðóäîâàíèå.

 Êîíôåðåíö-ïàêåò îò 36 ó.å. Âíóòð. êóðñ êîìïàíèè: 1 ó.å.=30 ðóá.

 Äèðåêòîð ïî ðàçâèòèþ áèçíåñà è îðãàíèçàöèè êîðïîðàòèâíûõ ìåðîïðèÿòèé:
 Ñàâðàñîâà Íàòàëüÿ  òåë.: 290-06-21, 290~7~241, 290-0066; ô.: 290-0-649
-------------------------------------------
                 Ìåæäóíàðîäíûé 
                 èíôîðìàöèîííî-
                 âûñòàâî÷íûé öåíòð 

                 =- ÈíôîÏðîñòðàíñòâî -=

                 1-é Çà÷àòüåâñêèé ïåð.,4
                 òåë. (095) 2907241
                 ôàêñ (095) 202-9-245
\0

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2005-05-14 18:28 John David Anglin
  0 siblings, 0 replies; 41+ messages in thread
From: John David Anglin @ 2005-05-14 18:28 UTC (permalink / raw)
  To: gcc-patches

> 2005-04-23  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
> 
> 	gcc/config/vax/
> 	* elf.h: Update whitespace.

Ok.  Installed to trunk.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2004-12-11  3:38 Ульяна Викентьевна
  0 siblings, 0 replies; 41+ messages in thread
From: Ульяна Викентьевна @ 2004-12-11  3:38 UTC (permalink / raw)
  To: gcc-patches

Âíèìaíèe àêöèÿ!
Çàêàæè äî 20 äåêàáðÿ Å-Mail paccûëêó è ïîëó÷è áoíyc(paccûëêó ïî icq)....
 
bad@3432.cjb.net 





\0

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2004-11-29  5:57 Лора Маратовна
  0 siblings, 0 replies; 41+ messages in thread
From: Лора Маратовна @ 2004-11-29  5:57 UTC (permalink / raw)
  To: gcc-patches

Âíèìàíèå!
Òîëüêî äî 1 äåêàáðÿ 2OO4 ãîäà âû ñìîæåòå çàêàçàòü Å-Mail paccûëêó(ïëàòíî) è ïîëó÷èòü paccûëêó ïî icq(áåñïëàòíî)....
 
aftermath@e881.cjb.net 





\0

^ permalink raw reply	[flat|nested] 41+ messages in thread
* Re:
@ 2001-04-19  3:49 Richard Earnshaw
  0 siblings, 0 replies; 41+ messages in thread
From: Richard Earnshaw @ 2001-04-19  3:49 UTC (permalink / raw)
  To: mark, gcc-patches; +Cc: Richard.Earnshaw

Mark,

This patch

2001-04-18  Mark Mitchell  <mark@codesourcery.com>

        * loop.c (load_mems): Examine all the instructions in the loop
        before concluding that all jumps branch to the first instruction
        after the loop.

is (perhaps indirectly) breaking the ARM bootstrap.  The code here

8861              /* If this is a jump outside of the loop but not right
8862                 after the end of the loop, we would have to emit new 
fixup
8863                 sequences for each such label.  */
8864              if (JUMP_LABEL (p) != end_label
8865                  && (INSN_UID (JUMP_LABEL (p)) >= max_uid_for_loop
8866                      || INSN_LUID (JUMP_LABEL (p)) < INSN_LUID (loop->
start)
8867                      || INSN_LUID (JUMP_LABEL (p)) > INSN_LUID (loop->
end)))

 tries to dereference the JUMP_LABEL of an addr_vec; but JUMP_LABEL is 
null in this case, so we segfault.

R.

^ permalink raw reply	[flat|nested] 41+ messages in thread
[parent not found: <200004180508.BAA08466@jwlab.FEITH.COM>]
* No Subject
@ 1998-10-16 10:31 Nick Clifton
  1998-10-17  1:50 ` Jeffrey A Law
  0 siblings, 1 reply; 41+ messages in thread
From: Nick Clifton @ 1998-10-16 10:31 UTC (permalink / raw)
  To: egcs-patches

Hi Guys,

I would like to submit the enclosed patch.  It fixes the --help output
so that target specific options are prefixed with -m, and language
specific options which take arguments can be documented as such by
seperating the option name from its argument by a space.  eg

	  "-I <include directory>"

The code will still search for a match against "-I" (only), but the
--help output will include the " <include directory>" as well.

Cheers
	Nick


Fri Oct 16 10:23:17 1998  Nick Clifton  <nickc@cygnus.com>

	* toplev.c (display_help): Prepend '-m' to target specific
	options. 
	(check_lang_option): Ignore text after end of first word of a
	language specific option.


Index: toplev.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/toplev.c,v
retrieving revision 1.111
diff -p -w -r1.111 toplev.c
*** toplev.c	1998/10/16 00:08:44	1.111
--- toplev.c	1998/10/16 17:26:53
*************** display_help ()
*** 4120,4126 ****
  	  else if (description == NULL)
  	    undoc = 1;
  	  else if (* description != 0)
! 	    doc += printf ("  %-23.23s %s\n", option, description);
  	}
        
  #ifdef TARGET_OPTIONS      
--- 4120,4126 ----
  	  else if (description == NULL)
  	    undoc = 1;
  	  else if (* description != 0)
! 	    doc += printf ("  -m%-21.21s %s\n", option, description);
  	}
        
  #ifdef TARGET_OPTIONS      
*************** display_help ()
*** 4134,4140 ****
  	  else if (description == NULL)
  	    undoc = 1;
  	  else if (* description != 0)
! 	    doc += printf ("  %-23.23s %s\n", option, description);
  	}
  #endif
        if (undoc)
--- 4134,4140 ----
  	  else if (description == NULL)
  	    undoc = 1;
  	  else if (* description != 0)
! 	    doc += printf ("  -m%-21.21s %s\n", option, description);
  	}
  #endif
        if (undoc)
*************** check_lang_option (option, lang_option)
*** 4159,4169 ****
--- 4159,4173 ----
    lang_independent_options * indep_options;
    int    len;
    long    k;
+   char * space;
    
    /* Ignore NULL entries.  */
    if (option == NULL || lang_option == NULL)
      return 0;
  
+   if ((space = strchr (lang_option, ' ')) != NULL)
+     len = space - lang_option;
+   else
      len = strlen (lang_option);
    
    /* If they do not match to the first n characters then fail.  */

^ permalink raw reply	[flat|nested] 41+ messages in thread
* No Subject
@ 1998-10-06  9:51 Nick Clifton
  1998-10-06 19:52 ` Jeffrey A Law
  0 siblings, 1 reply; 41+ messages in thread
From: Nick Clifton @ 1998-10-06  9:51 UTC (permalink / raw)
  To: egcs-patches

Hi,

  I would like to submit the following patch to the pragma handling
code in c-pragma.c.  It fixes a bug in the handling of '#pragma pack(<n>)' 
which was introduced by the HANDLE_PRAGMA_PACK_PUSH_POP patch.  The
bug was that insert_pack_attributes() was being called when #pragma
pack(<n>) was used, when the funciton is only intended to work with
#pragma pack(push,<n>).

Cheers
	Nick



Tue Oct  6 09:44:53 1998  Nick Clifton  <nickc@cygnus.com>

	* c-pragma.c (insert_pack_attributes): Do not insert
	attributes unless #pragma pack(push,<n>) is in effect.


Index: c-pragma.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/c-pragma.c,v
retrieving revision 1.9
diff -p -r1.9 c-pragma.c
*** c-pragma.c	1998/10/01 10:50:06	1.9
--- c-pragma.c	1998/10/06 16:44:17
*************** insert_pack_attributes (node, attributes
*** 146,152 ****
    tree a;
  
    /* If we are not packing, then there is nothing to do.  */
!   if (maximum_field_alignment == 0)
      return;
  
    /* We are only interested in fields.  */
--- 146,153 ----
    tree a;
  
    /* If we are not packing, then there is nothing to do.  */
!   if (maximum_field_alignment == 0
!       || alignment_stack == NULL)
      return;
  
    /* We are only interested in fields.  */

^ permalink raw reply	[flat|nested] 41+ messages in thread

end of thread, other threads:[~2023-10-03  9:11 UTC | newest]

Thread overview: 41+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
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2004-08-16 19:28 ` Ziemowit Laski
2004-08-16 19:43   ` Re: Zack Weinberg
2004-08-16 20:24   ` Re: Mark Mitchell
2004-08-16 20:36     ` Re: Zack Weinberg
2004-08-16 22:01       ` Re: Ziemowit Laski
2004-08-17 21:35         ` Re: Geoffrey Keating
2004-08-16 20:32   ` Re: Richard Henderson
2004-08-16 20:54   ` Re: Joseph S. Myers
2004-08-16 21:28     ` Re: Ziemowit Laski
2004-08-16 21:47       ` Re: Joseph S. Myers
2004-08-16 21:49         ` Re: Ziemowit Laski
2004-08-16 22:19       ` Re: Stan Shebs
2023-10-03  9:09 Kito Cheng
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2023-08-13 19:05 Eddy Young Tie Yang
2023-08-13 19:18 ` Andrew Pinski
2023-04-02 17:58 Re: d-ni
2021-06-01 14:02 [PATCH][i386] Split not+broadcast+pand to broadcast+pandn Segher Boessenkool
2021-06-02  5:39 ` liuhongt
2021-06-02  5:49   ` Hongtao Liu
2020-05-14 21:05 [PATCH RFC] bootstrap: Update requirement to C++11 Jason Merrill
2020-05-15  7:14 ` Richard Biener
2020-05-15  8:30   ` Richard Sandiford
2020-05-15  9:26     ` Richard Biener
2020-05-15  9:58       ` Richard Sandiford
2020-05-15 10:15         ` Richard Biener
2020-05-15 14:08           ` Richard Sandiford
2020-05-16  1:47             ` Martin Sebor
2020-05-16  2:45               ` Re: Jason Merrill
     [not found] <Pine.NEB.4.64.1302141014370.336@cesium.clock.org>
2013-02-14 18:40 ` Re: Xinliang David Li
2013-02-14 19:53   ` Re: Matt Hargett
2013-02-14 20:10     ` Re: Xinliang David Li
2013-02-14 20:37       ` Re: Matt
     [not found] <CAGqM8fbk_QwhWoQ=6i_429diC0-v29BpNRaF=xkwX61ETz+T3g@mail.gmail.com>
2012-10-26  9:54 ` Re: Richard Biener
     [not found] <CACkGtrg=-AFkMZdxKvzvZ-9OHqAp-aDBr5nQmhEpBCRy7uoC0w@mail.gmail.com>
2012-03-08 22:57 ` Re: Diego Novillo
2011-09-03 13:19 Re: Uros Bizjak
2008-11-23 20:58 Re: Uros Bizjak
2008-11-23 22:08 ` Re: H.J. Lu
     [not found] <20080730133704.GC28583@mx.loc>
2008-07-30 15:07 ` Re: Rafael Espindola
2007-07-06  8:06 Re: Tobias Burnus
2007-07-06  8:30 ` Re: Lee Millward
2007-03-27 22:35 [libstdc++] Richard Henderson
2007-03-27 23:29 ` [libstdc++] Paolo Carlini
2007-03-28  6:10   ` Paolo Bonzini
2007-02-03  3:51 Kenneth Zadeck
2005-07-15 21:25 ИнфоПространство
2005-05-14 18:28 Re: John David Anglin
2004-12-11  3:38 Re: Ульяна Викентьевна
2004-11-29  5:57 Re: Лора Маратовна
2001-04-19  3:49 Re: Richard Earnshaw
     [not found] <200004180508.BAA08466@jwlab.FEITH.COM>
     [not found] ` <20000423104611.B6170@atrey.karlin.mff.cuni.cz>
2000-04-24  5:29   ` Re: grahams
2000-04-25  4:34     ` Re: Jan Hubicka
1998-10-16 10:31 No Subject Nick Clifton
1998-10-17  1:50 ` Jeffrey A Law
1998-10-06  9:51 No Subject Nick Clifton
1998-10-06 19:52 ` Jeffrey A Law

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