From: Kito Cheng <kito.cheng@gmail.com>
To: Michael Collison <collison@rivosinc.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH v5 04/10] RISC-V:autovec: Add target vectorization hooks
Date: Wed, 3 May 2023 18:59:07 +0800 [thread overview]
Message-ID: <CA+yXCZCbHOhpY5GaPL56Ny6iMGm7Wb_zepUYvSaQCWqEhseS4Q@mail.gmail.com> (raw)
In-Reply-To: <20230426214514.3355280-5-collison@rivosinc.com>
> @@ -275,6 +284,9 @@ poly_uint16 riscv_vector_chunks;
> /* The number of bytes in a vector chunk. */
> unsigned riscv_bytes_per_vector_chunk;
>
> +/* Prefer vf for auto-vectorizer. */
> +unsigned riscv_vectorization_factor;
> +
Drop this, we have riscv_autovec_lmul
> /* Index R is the smallest register class that contains register R. */
> const enum reg_class riscv_regno_to_class[FIRST_PSEUDO_REGISTER] = {
> GR_REGS, GR_REGS, GR_REGS, GR_REGS,
> @@ -6363,6 +6375,9 @@ riscv_option_override (void)
>
> /* Convert -march to a chunks count. */
> riscv_vector_chunks = riscv_convert_vector_bits ();
> +
> + if (TARGET_VECTOR)
> + riscv_vectorization_factor = RVV_LMUL1;
Drop this, we have riscv_autovec_lmul
> +/* Implement TARGET_AUTOVECTORIZE_VECTOR_MODES for RVV. */
> +static unsigned int
> +riscv_autovectorize_vector_modes (vector_modes *modes, bool)
> +{
> + if (!TARGET_VECTOR)
> + return 0;
> +
> + if (riscv_vectorization_factor == RVV_LMUL1)
Drop this or check with riscv_autovec_lmul.
> + {
> + modes->safe_push (VNx16QImode);
> + modes->safe_push (VNx8QImode);
> + modes->safe_push (VNx4QImode);
> + modes->safe_push (VNx2QImode);
Modes are not consider different VLEN here,
you could ref this patch[1] to see how to get right mode via get_vector_mode
[1] https://patchwork.sourceware.org/project/gcc/patch/20230419164214.1032017-3-juzhe.zhong@rivai.ai/
next prev parent reply other threads:[~2023-05-03 10:59 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-26 21:45 [PATCH v5 00/10] RISC-V: autovec: Add autovec support Michael Collison
2023-04-26 21:45 ` [PATCH v5 01/10] RISC-V: autovec: Add new predicates and function prototypes Michael Collison
2023-04-28 22:28 ` Jeff Law
2023-04-26 21:45 ` [PATCH v5 02/10] RISC-V: autovec: Export policy functions to global scope Michael Collison
2023-04-28 22:15 ` Jeff Law
2023-04-26 21:45 ` [PATCH v5 03/10] RISC-V:autovec: Add auto-vectorization support functions Michael Collison
2023-04-28 22:19 ` Jeff Law
2023-05-03 10:53 ` Kito Cheng
2023-05-03 17:31 ` Michael Collison
2023-05-06 20:13 ` Jeff Law
2023-04-26 21:45 ` [PATCH v5 04/10] RISC-V:autovec: Add target vectorization hooks Michael Collison
2023-05-03 10:59 ` Kito Cheng [this message]
2023-04-26 21:45 ` [PATCH v5 05/10] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store Michael Collison
2023-04-26 21:45 ` [PATCH v5 06/10] RISC-V:autovec: Add autovectorization tests for add & sub Michael Collison
2023-04-26 21:45 ` [PATCH v5 07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2 Michael Collison
2023-05-02 10:11 ` Richard Sandiford
2023-04-26 21:45 ` [PATCH v5 08/10] RISC-V:autovec: Add autovectorization tests for binary integer Michael Collison
2023-04-26 21:45 ` [PATCH v5 09/10] RISC-V: autovec: This patch adds a guard for VNx1 vectors that are present in ports like riscv Michael Collison
2023-04-26 21:45 ` [PATCH v5 10/10] RISC-V: autovec: This patch supports 8 bit auto-vectorization in riscv Michael Collison
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