* [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] @ 2022-06-28 1:26 ~antoyo 2022-06-26 22:49 ` [PATCH gcc 1/1] " ~antoyo 2022-06-28 6:22 ` [PATCH gcc 0/1] [PATCH] " Hongtao Liu 0 siblings, 2 replies; 5+ messages in thread From: ~antoyo @ 2022-06-28 1:26 UTC (permalink / raw) To: gcc-patches Hi. This fixes the following bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106095 It's the first time I work outside of the jit component, so please tell me if I forgot anything. Here are the results of running the test: === gcc Summary === # of expected passes 182481 # of unexpected failures 91 # of unexpected successes 20 # of expected failures 1475 # of unsupported tests 2535 === g++ Summary === # of expected passes 231596 # of unexpected failures 1 # of expected failures 2083 # of unsupported tests 9948 === jit Summary === # of expected passes 14542 # of unexpected failures 1 === libstdc++ Summary === # of expected passes 15538 # of expected failures 95 # of unsupported tests 653 === libgomp Summary === # of expected passes 5012 # of expected failures 33 # of unsupported tests 323 === libitm Summary === # of expected passes 44 # of expected failures 3 # of unsupported tests 1 === libatomic Summary === # of expected passes 54 It's the first time I run the whole testsuite, so I'm not sure if those failures are normal. I got more unexpected failures for the gcc tests than what is shown in https://gcc.gnu.org/pipermail/gcc- testresults/2022-June/764154.html. In any case, I get the same failures when running the testsuite on master. Perhaps my configure command is wrong? I used the following: ../../gcc/configure --enable-host-shared --enable- languages=c,jit,c++,lto --enable-checking=release --prefix=(pwd)/../install Thanks for the review. Antoni Boucher (1): target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] gcc/config/i386/sse.md | 10 ++--- gcc/testsuite/gcc.target/i386/pr106095.c | 47 ++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr106095.c -- 2.34.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH gcc 1/1] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] 2022-06-28 1:26 [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] ~antoyo @ 2022-06-26 22:49 ` ~antoyo 2022-06-28 6:22 ` [PATCH gcc 0/1] [PATCH] " Hongtao Liu 1 sibling, 0 replies; 5+ messages in thread From: ~antoyo @ 2022-06-26 22:49 UTC (permalink / raw) To: gcc-patches From: Antoni Boucher <bouanto@zoho.com> gcc/ChangeLog: PR target/106095 * config/i386/sse.md: Fix asm generation. gcc/testsuite/ChangeLog: PR target/106095 * gcc.target/i386/pr106095.c: Add test using those AVX builtins. --- gcc/config/i386/sse.md | 10 ++--- gcc/testsuite/gcc.target/i386/pr106095.c | 47 ++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr106095.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 8cd0f617bf3..f2f72e8fb05 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -8859,7 +8859,7 @@ "@ cvtsd2ss\t{%2, %0|%0, %2} cvtsd2ss\t{%2, %0|%0, %q2} - vcvtsd2ss\t{<round_mask_op3>%2, %1, %0<mask_operand3>|<mask_operand3>%0, %1, %q2<round_mask_op3>}" + vcvtsd2ss\t{<round_mask_op3>%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %q2<round_mask_op3>}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecvt") (set_attr "athlon_decode" "vector,double,*") @@ -8903,7 +8903,7 @@ "@ cvtss2sd\t{%2, %0|%0, %2} cvtss2sd\t{%2, %0|%0, %k2} - vcvtss2sd\t{<round_saeonly_mask_op3>%2, %1, %0<mask_operand3>|<mask_operand3>%0, %1, %k2<round_saeonly_mask_op3>}" + vcvtss2sd\t{<round_saeonly_mask_op3>%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %k2<round_saeonly_mask_op3>}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "ssecvt") (set_attr "amdfam10_decode" "vector,double,*") @@ -14406,8 +14406,8 @@ "TARGET_AVX512VL" { if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4) - return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %t1}"; - return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %g1}"; + return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %1}"; + return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %1}"; } [(set_attr "type" "ssemov") (set_attr "memory" "store") @@ -14506,7 +14506,7 @@ (match_dup 0) (match_operand:QI 2 "register_operand" "Yk")))] "TARGET_AVX512VL" - "vpmov<trunsuffix>qw\t{%1, %0%{%2%}|%0%{%2%}, %g1}" + "vpmov<trunsuffix>qw\t{%1, %0%{%2%}|%0%{%2%}, %1}" [(set_attr "type" "ssemov") (set_attr "memory" "store") (set_attr "prefix" "evex") diff --git a/gcc/testsuite/gcc.target/i386/pr106095.c b/gcc/testsuite/gcc.target/i386/pr106095.c new file mode 100644 index 00000000000..dfa6136500f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr106095.c @@ -0,0 +1,47 @@ +/* PR gcc/106095 */ +/* { dg-do assemble } */ +/* { dg-options "-mavx512vl -masm=intel" } */ +/* { dg-require-effective-target masm_intel } */ + +#include <immintrin.h> +#include <stdlib.h> + +typedef int v4si __attribute__ ((vector_size (16))); +typedef long long v2di __attribute__ ((vector_size (16))); +typedef long long v4di __attribute__ ((vector_size (32))); +typedef double v2df __attribute__ ((vector_size (16))); +typedef float v4sf __attribute__ ((vector_size (16))); + +void bug1(void) { + v4si ints4 = {0, 1, 2, 3}; + unsigned long long *addr = malloc(sizeof(*addr)); + __builtin_ia32_pmovdw128mem_mask(addr, ints4, 0); +} + +int bug2(void) { + v2df a = {0.0, 0.0}; + v4sf b = {0.0, 0.0, 0.0, 0.0}; + v2df src = {0.0, 0.0}; + v2df res = __builtin_ia32_cvtss2sd_mask_round(a, b, src, 0, _MM_FROUND_NO_EXC); + return (int)res[0]; +} + +int bug3(void) { + v4sf a = {0.0, 0.0, 0.0, 0.0}; + v2df b = {0.0, 0.0}; + v4sf src = {0.0, 0.0, 0.0, 0.0}; + v4sf res = __builtin_ia32_cvtsd2ss_mask_round(a, b, src, 0, _MM_FROUND_NO_EXC); + return (int)res[0]; +} + +int bug4(void) { + v4di ints4 = {0, 1, 2, 3}; + unsigned long long *addr = malloc(sizeof(*addr)); + __builtin_ia32_pmovqw256mem_mask(addr, ints4, 0); +} + +int bug5(void) { + v2di ints4 = {0, 1}; + unsigned int *addr = malloc(sizeof(*addr)); + __builtin_ia32_pmovqw128mem_mask(addr, ints4, 0); +} -- 2.34.2 ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] 2022-06-28 1:26 [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] ~antoyo 2022-06-26 22:49 ` [PATCH gcc 1/1] " ~antoyo @ 2022-06-28 6:22 ` Hongtao Liu 2022-06-28 15:16 ` Antoni Boucher 1 sibling, 1 reply; 5+ messages in thread From: Hongtao Liu @ 2022-06-28 6:22 UTC (permalink / raw) To: ~antoyo; +Cc: GCC Patches, ~antoyo On Tue, Jun 28, 2022 at 9:26 AM ~antoyo via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Hi. > > This fixes the following bug: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106095 The patch LGTM, thanks for handling this. > > It's the first time I work outside of the jit component, so please tell > me if I forgot anything. > > Here are the results of running the test: > > === gcc Summary === > > # of expected passes 182481 > # of unexpected failures 91 > # of unexpected successes 20 > # of expected failures 1475 > # of unsupported tests 2535 > > === g++ Summary === > > # of expected passes 231596 > # of unexpected failures 1 > # of expected failures 2083 > # of unsupported tests 9948 > > === jit Summary === > > # of expected passes 14542 > # of unexpected failures 1 > > === libstdc++ Summary === > > # of expected passes 15538 > # of expected failures 95 > # of unsupported tests 653 > > === libgomp Summary === > > # of expected passes 5012 > # of expected failures 33 > # of unsupported tests 323 > > === libitm Summary === > > # of expected passes 44 > # of expected failures 3 > # of unsupported tests 1 > > === libatomic Summary === > > # of expected passes 54 > > It's the first time I run the whole testsuite, so I'm not sure if those > failures are normal. I got more unexpected failures for the gcc tests > than what is shown in https://gcc.gnu.org/pipermail/gcc- > testresults/2022-June/764154.html. In any case, I get the same failures > when running the testsuite on master. Perhaps my configure command is > wrong? I used the following: You can use ./contrib/compare_tests to see if there's no failure or new pass. ./contrib/compara_tests is under gcc top directory. > > ../../gcc/configure --enable-host-shared --enable- > languages=c,jit,c++,lto --enable-checking=release > --prefix=(pwd)/../install > --enable-checking=release will give up some internal checks to increase the compilation speed, for the development trunk, it is better not to use release. > Thanks for the review. > > Antoni Boucher (1): > target: Fix asm generation for AVX builtins when using -masm=intel > [PR106095] > > gcc/config/i386/sse.md | 10 ++--- > gcc/testsuite/gcc.target/i386/pr106095.c | 47 ++++++++++++++++++++++++ > 2 files changed, 52 insertions(+), 5 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/i386/pr106095.c > > -- > 2.34.2 -- BR, Hongtao ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] 2022-06-28 6:22 ` [PATCH gcc 0/1] [PATCH] " Hongtao Liu @ 2022-06-28 15:16 ` Antoni Boucher 2022-06-29 1:20 ` Hongtao Liu 0 siblings, 1 reply; 5+ messages in thread From: Antoni Boucher @ 2022-06-28 15:16 UTC (permalink / raw) To: Hongtao Liu; +Cc: GCC Patches, ~antoyo Thanks for the review. Does this mean I can commit it, assuming the output of compare_tests is good? By the way, I wanted to mention that it was my first time playing with the assembly generation, so I was not sure about my changes (even though it makes the test case compile, I'm not sure it doesn't have any unintended side effects): It looked to me that the register qualifiers should be the same for both AT&T and Intel syntaxes, but I'm might be wrong about this. On Tue, 2022-06-28 at 14:22 +0800, Hongtao Liu wrote: > On Tue, Jun 28, 2022 at 9:26 AM ~antoyo via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: > > > > Hi. > > > > This fixes the following bug: > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106095 > The patch LGTM, thanks for handling this. > > > > It's the first time I work outside of the jit component, so please > > tell > > me if I forgot anything. > > > > Here are the results of running the test: > > > > === gcc Summary === > > > > # of expected passes 182481 > > # of unexpected failures 91 > > # of unexpected successes 20 > > # of expected failures 1475 > > # of unsupported tests 2535 > > > > === g++ Summary === > > > > # of expected passes 231596 > > # of unexpected failures 1 > > # of expected failures 2083 > > # of unsupported tests 9948 > > > > === jit Summary === > > > > # of expected passes 14542 > > # of unexpected failures 1 > > > > === libstdc++ Summary === > > > > # of expected passes 15538 > > # of expected failures 95 > > # of unsupported tests 653 > > > > === libgomp Summary === > > > > # of expected passes 5012 > > # of expected failures 33 > > # of unsupported tests 323 > > > > === libitm Summary === > > > > # of expected passes 44 > > # of expected failures 3 > > # of unsupported tests 1 > > > > === libatomic Summary === > > > > # of expected passes 54 > > > > It's the first time I run the whole testsuite, so I'm not sure if > > those > > failures are normal. I got more unexpected failures for the gcc > > tests > > than what is shown in https://gcc.gnu.org/pipermail/gcc- > > testresults/2022-June/764154.html. In any case, I get the same > > failures > > when running the testsuite on master. Perhaps my configure command > > is > > wrong? I used the following: > You can use ./contrib/compare_tests to see if there's no failure or > new pass. > ./contrib/compara_tests is under gcc top directory. > > > > ../../gcc/configure --enable-host-shared --enable- > > languages=c,jit,c++,lto --enable-checking=release > > --prefix=(pwd)/../install > > > --enable-checking=release will give up some internal checks to > increase the compilation speed, for the development trunk, it is > better not to use release. > > Thanks for the review. > > > > Antoni Boucher (1): > > target: Fix asm generation for AVX builtins when using - > > masm=intel > > [PR106095] > > > > gcc/config/i386/sse.md | 10 ++--- > > gcc/testsuite/gcc.target/i386/pr106095.c | 47 > > ++++++++++++++++++++++++ > > 2 files changed, 52 insertions(+), 5 deletions(-) > > create mode 100644 gcc/testsuite/gcc.target/i386/pr106095.c > > > > -- > > 2.34.2 > > > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] 2022-06-28 15:16 ` Antoni Boucher @ 2022-06-29 1:20 ` Hongtao Liu 0 siblings, 0 replies; 5+ messages in thread From: Hongtao Liu @ 2022-06-29 1:20 UTC (permalink / raw) To: Antoni Boucher; +Cc: GCC Patches, ~antoyo On Tue, Jun 28, 2022 at 11:16 PM Antoni Boucher <bouanto@zoho.com> wrote: > > Thanks for the review. > Does this mean I can commit it, assuming the output of compare_tests is > good? Yes. > > By the way, I wanted to mention that it was my first time playing with > the assembly generation, so I was not sure about my changes (even > though it makes the test case compile, I'm not sure it doesn't have any > unintended side effects): > It looked to me that the register qualifiers should be the same for > both AT&T and Intel syntaxes, but I'm might be wrong about this. Yes for the case in your patch, I think it's a typo. But there could be some difference for operand modifiers between AT&T and Intel syntaxes in some patterns. .i.e the use of mode attr <iptr>. > > On Tue, 2022-06-28 at 14:22 +0800, Hongtao Liu wrote: > > On Tue, Jun 28, 2022 at 9:26 AM ~antoyo via Gcc-patches > > <gcc-patches@gcc.gnu.org> wrote: > > > > > > Hi. > > > > > > This fixes the following bug: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106095 > > The patch LGTM, thanks for handling this. > > > > > > It's the first time I work outside of the jit component, so please > > > tell > > > me if I forgot anything. > > > > > > Here are the results of running the test: > > > > > > === gcc Summary === > > > > > > # of expected passes 182481 > > > # of unexpected failures 91 > > > # of unexpected successes 20 > > > # of expected failures 1475 > > > # of unsupported tests 2535 > > > > > > === g++ Summary === > > > > > > # of expected passes 231596 > > > # of unexpected failures 1 > > > # of expected failures 2083 > > > # of unsupported tests 9948 > > > > > > === jit Summary === > > > > > > # of expected passes 14542 > > > # of unexpected failures 1 > > > > > > === libstdc++ Summary === > > > > > > # of expected passes 15538 > > > # of expected failures 95 > > > # of unsupported tests 653 > > > > > > === libgomp Summary === > > > > > > # of expected passes 5012 > > > # of expected failures 33 > > > # of unsupported tests 323 > > > > > > === libitm Summary === > > > > > > # of expected passes 44 > > > # of expected failures 3 > > > # of unsupported tests 1 > > > > > > === libatomic Summary === > > > > > > # of expected passes 54 > > > > > > It's the first time I run the whole testsuite, so I'm not sure if > > > those > > > failures are normal. I got more unexpected failures for the gcc > > > tests > > > than what is shown in https://gcc.gnu.org/pipermail/gcc- > > > testresults/2022-June/764154.html. In any case, I get the same > > > failures > > > when running the testsuite on master. Perhaps my configure command > > > is > > > wrong? I used the following: > > You can use ./contrib/compare_tests to see if there's no failure or > > new pass. > > ./contrib/compara_tests is under gcc top directory. > > > > > > ../../gcc/configure --enable-host-shared --enable- > > > languages=c,jit,c++,lto --enable-checking=release > > > --prefix=(pwd)/../install > > > > > --enable-checking=release will give up some internal checks to > > increase the compilation speed, for the development trunk, it is > > better not to use release. > > > Thanks for the review. > > > > > > Antoni Boucher (1): > > > target: Fix asm generation for AVX builtins when using - > > > masm=intel > > > [PR106095] > > > > > > gcc/config/i386/sse.md | 10 ++--- > > > gcc/testsuite/gcc.target/i386/pr106095.c | 47 > > > ++++++++++++++++++++++++ > > > 2 files changed, 52 insertions(+), 5 deletions(-) > > > create mode 100644 gcc/testsuite/gcc.target/i386/pr106095.c > > > > > > -- > > > 2.34.2 > > > > > > > -- BR, Hongtao ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-06-29 1:20 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-06-28 1:26 [PATCH gcc 0/1] [PATCH] target: Fix asm generation for AVX builtins when using -masm=intel [PR106095] ~antoyo 2022-06-26 22:49 ` [PATCH gcc 1/1] " ~antoyo 2022-06-28 6:22 ` [PATCH gcc 0/1] [PATCH] " Hongtao Liu 2022-06-28 15:16 ` Antoni Boucher 2022-06-29 1:20 ` Hongtao Liu
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