committed [RISC-V]: Harden test scan patterns

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* committed [RISC-V]: Harden test scan patterns
@ 2023-09-27  9:26 Joern Rennecke
  2023-09-27 17:22 ` Jeff Law
  0 siblings, 1 reply; 13+ messages in thread
From: Joern Rennecke @ 2023-09-27  9:26 UTC (permalink / raw)
  To: GCC Patches

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I got tired of scan tests failing when they have an underspecified
pattern that matches LTO information, so I did a global replace for
the most common form of such scan patterns in the gcc.target/riscv
testsuite.

regression tested for:
    riscv-sim
    riscv-sim/-march=rv32gcv_zfh/-mabi=ilp32d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
    riscv-sim/-march=rv32imac/-mabi=ilp32
    riscv-sim/-march=rv64gcv_zfh_zvfh_zba_zbb_zbc_zicond_zicboz_zawrs/-mabi=lp64d/-ftree-vectorize/--param=riscv-autovec-preferenc
e=scalable
    riscv-sim/-march=rv64imac/-mabi=lp64

Committed as obvious.

[-- Attachment #2: harden-scan-patterns.txt --]
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commit d326bb6d7588425d013791299272f913fb23e56d
Author: Joern Rennecke <joern.rennecke@embecosm.com>
Date:   Wed Sep 27 10:05:13 2023 +0100

    Harden scan patterns with a bit of scripting:
    
    $ egrep -r 'scan-assembler(|-not|-times) "[[:alnum:].]{1,7}"' riscv
    $ egrep -rl 'scan-assembler(|-not|-times) "[[:alnum:].]{1,7}"' riscv > files
    $ cat edcmds
    g/\(scan-assembler\(\|-not\|-times\) \+\)"\([[:alnum:]]\{1,5\}\)\.\([[:alpha:].]\{1,3\}\)"/s//\1{\\m\3\\.\4\\M}/
    g/\(scan-assembler\(\|-not\|-times\) \+\)"\([[:alnum:]]\{1,7\}\)"/s//\1{\\m\3}/
    w
    q
    $ sed 's/.*/ed & < edcmds/' < files > tmp
    $ source tmp
    
    gcc/testsuite/
            * gcc.target/riscv/shift-shift-1.c: Avoid spurious pattern matches.
            * gcc.target/riscv/shift-shift-3.c: Likewise.
            * gcc.target/riscv/zba-shNadd-01.c: Likewise.
            * gcc.target/riscv/zba-shNadd-02.c: Likewise.
            * gcc.target/riscv/zbb-andn-orn-xnor-01.c: Likewise.
            * gcc.target/riscv/zbb-andn-orn-xnor-02.c: Likewise.
            * gcc.target/riscv/zbb-min-max.c: Likewise.
            * gcc.target/riscv/zero-extend-1.c: Likewise.
            * gcc.target/riscv/zero-extend-2.c: Likewise.
            * gcc.target/riscv/zero-extend-3.c: Likewise.
            * gcc.target/riscv/zero-extend-4.c: Likewise.
            * gcc.target/riscv/zero-extend-5.c: Likewise.
            * gcc.target/riscv/_Float16-soft-2.c: Likewise.
            * gcc.target/riscv/_Float16-soft-3.c: Likewise.
            * gcc.target/riscv/_Float16-zfh-1.c: Likewise.
            * gcc.target/riscv/_Float16-zfh-2.c: Likewise.
            * gcc.target/riscv/_Float16-zfh-3.c: Likewise.
            * gcc.target/riscv/and-extend-1.c: Likewise.
            * gcc.target/riscv/and-extend-2.c: Likewise.
            * gcc.target/riscv/pr108987.c: Likewise.
            * gcc.target/riscv/ret-1.c: Likewise.
            * gcc.target/riscv/rvv/autovec/align-1.c: Likewise.
            * gcc.target/riscv/rvv/autovec/align-2.c: Likewise.
            * gcc.target/riscv/zba-shNadd-04.c: Likewise.
            * gcc.target/riscv/zba-shNadd-07.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-02.c: Likewise.
            * gcc.target/riscv/zbbw.c: Likewise.
            * gcc.target/riscv/zbc32.c: Likewise.
            * gcc.target/riscv/zbc64.c: Likewise.
            * gcc.target/riscv/zbkb32.c: Likewise.
            * gcc.target/riscv/zbkb64.c: Likewise.
            * gcc.target/riscv/zbkc32.c: Likewise.
            * gcc.target/riscv/zbkc64.c: Likewise.
            * gcc.target/riscv/zbkx32.c: Likewise.
            * gcc.target/riscv/zbkx64.c: Likewise.
            * gcc.target/riscv/zfa-fleq-fltq.c: Likewise.
            * gcc.target/riscv/zfa-fli-zfh.c: Likewise.
            * gcc.target/riscv/zfa-fli.c: Likewise.
            * gcc.target/riscv/zknd64.c: Likewise.
            * gcc.target/riscv/zksed32.c: Likewise.
            * gcc.target/riscv/zksed64.c: Likewise.
            * gcc.target/riscv/zksh32.c: Likewise.
            * gcc.target/riscv/zksh64.c: Likewise.
            * gcc.target/riscv/_Float16-soft-1.c: Likewise.
            * gcc.target/riscv/_Float16-zfhmin-1.c: Likewise.
            * gcc.target/riscv/_Float16-zfhmin-2.c: Likewise.
            * gcc.target/riscv/_Float16-zfhmin-3.c: Likewise.
            * gcc.target/riscv/_Float16-zhinxmin-1.c: Likewise.
            * gcc.target/riscv/_Float16-zhinxmin-2.c: Likewise.
            * gcc.target/riscv/_Float16-zhinxmin-3.c: Likewise.
            * gcc.target/riscv/fle-ieee.c: Likewise.
            * gcc.target/riscv/fle-snan.c: Likewise.
            * gcc.target/riscv/flef-ieee.c: Likewise.
            * gcc.target/riscv/flef-snan.c: Likewise.
            * gcc.target/riscv/flt-ieee.c: Likewise.
            * gcc.target/riscv/flt-snan.c: Likewise.
            * gcc.target/riscv/fltf-ieee.c: Likewise.
            * gcc.target/riscv/fltf-snan.c: Likewise.
            * gcc.target/riscv/interrupt-1.c: Likewise.
            * gcc.target/riscv/interrupt-mmode.c: Likewise.
            * gcc.target/riscv/interrupt-smode.c: Likewise.
            * gcc.target/riscv/interrupt-umode.c: Likewise.
            * gcc.target/riscv/pr106888.c: Likewise.
            * gcc.target/riscv/pr89835.c: Likewise.
            * gcc.target/riscv/shift-and-1.c: Likewise.
            * gcc.target/riscv/shift-and-2.c: Likewise.
            * gcc.target/riscv/shift-shift-2.c: Likewise.
            * gcc.target/riscv/shift-shift-4.c: Likewise.
            * gcc.target/riscv/shift-shift-5.c: Likewise.
            * gcc.target/riscv/shorten-memrefs-7.c: Likewise.
            * gcc.target/riscv/sign-extend.c: Likewise.
            * gcc.target/riscv/switch-qi.c: Likewise.
            * gcc.target/riscv/switch-si.c: Likewise.
            * gcc.target/riscv/xtheadbb-ext-1.c: Likewise.
            * gcc.target/riscv/xtheadbb-ext.c: Likewise.
            * gcc.target/riscv/xtheadbb-extu-1.c: Likewise.
            * gcc.target/riscv/xtheadbb-extu.c: Likewise.
            * gcc.target/riscv/xtheadbb-strlen.c: Likewise.
            * gcc.target/riscv/xtheadbs-tst.c: Likewise.
            * gcc.target/riscv/xtheadfmv-fmv.c: Likewise.
            * gcc.target/riscv/xventanacondops-primitiveSemantics.c: Likewise.
            * gcc.target/riscv/zba-adduw.c: Likewise.
            * gcc.target/riscv/zba-shadd.c: Likewise.
            * gcc.target/riscv/zba-slliuw.c: Likewise.
            * gcc.target/riscv/zba-zextw.c: Likewise.
            * gcc.target/riscv/zbb-min-max-02.c: Likewise.
            * gcc.target/riscv/zbb-min-max-03.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-01.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-03.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-04.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-05.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-06.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-07.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-08.c: Likewise.
            * gcc.target/riscv/zbb-rol-ror-09.c: Likewise.
            * gcc.target/riscv/zbb-strlen.c: Likewise.
            * gcc.target/riscv/zbb_32_bswap-1.c: Likewise.
            * gcc.target/riscv/zbb_32_bswap-2.c: Likewise.
            * gcc.target/riscv/zbb_bswap-1.c: Likewise.
            * gcc.target/riscv/zbb_bswap-2.c: Likewise.
            * gcc.target/riscv/zbs-bclr.c: Likewise.
            * gcc.target/riscv/zbs-bext-02.c: Likewise.
            * gcc.target/riscv/zbs-bext.c: Likewise.
            * gcc.target/riscv/zbs-binv.c: Likewise.
            * gcc.target/riscv/zbs-bset.c: Likewise.
            * gcc.target/riscv/zero-scratch-regs-2.c: Likewise.
            * gcc.target/riscv/zicond-primitiveSemantics.c: Likewise.
            * gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c: Likewise.
            * gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c: Likewise.
            * gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c: Likewise.
            * gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
index 0622588fdb9..ba56dda21ec 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-1.c
@@ -6,4 +6,4 @@ _Float16 test_soft_move (_Float16 a, _Float16 b)
     return b;
 }
 
-/* { dg-final { scan-assembler-not "fmv.h" } } */
+/* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
index 3d37823fa4d..e1a841e205f 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-2.c
@@ -7,7 +7,7 @@ _Float16 test_soft_add (_Float16 a, _Float16 b)
     /* { dg-final { scan-assembler-times "call\t__extendhfsf2" 2 } } */
     return a + b;
     /* { dg-final { scan-assembler-not "call\t__addhf3" } } */
-    /* { dg-final { scan-assembler-times "fadd.s" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.s\M} 1 } } */
     /* { dg-final { scan-assembler-times "call\t__truncsfhf2" 1 } } */
 }
 
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
index ecce364e310..66c5a369424 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-soft-3.c
@@ -7,6 +7,6 @@ int test_soft_compare (_Float16 a, _Float16 b)
     /* { dg-final { scan-assembler-times "call\t__extendhfsf2" 2 } } */
     return a > b;
     /* { dg-final { scan-assembler-not "call\t__gthf2" } } */
-    /* { dg-final { scan-assembler-times "fgt.s" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.s\M} 1 } } */
 }
 
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
index 98908dccbb3..43394550711 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-1.c
@@ -3,6 +3,6 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fmv.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfmv\.h\M} 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
index 58bfa6b4198..3f9ecedb15c 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-2.c
@@ -3,6 +3,6 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fadd.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.h\M} 1 } } */
     return a + b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
index 128b4e53f27..b70b7118bd4 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfh-3.c
@@ -3,6 +3,6 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-times "fgt.h" 1 } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.h\M} 1 } } */
     return a > b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
index 631a049f52f..8fcc51bad55 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-1.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fmv.h" } } */
-    /* { dg-final { scan-assembler-times "fmv.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfmv\.s\M} 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
index 06c85eb797d..f9b615ce3a0 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-2.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fadd.h" } } */
-    /* { dg-final { scan-assembler-times "fadd.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfadd\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfadd\.s\M} 1 } } */
     return a + b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
index 28960d60245..2a35006cfaf 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-3.c
@@ -3,7 +3,7 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fgt.h" } } */
-    /* { dg-final { scan-assembler-times "fgt.s" 1 } } */
+    /* { dg-final { scan-assembler-not {\mfgt\.h\M} } } */
+    /* { dg-final { scan-assembler-times {\mfgt\.s\M} 1 } } */
     return a > b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
index fa049db5b93..4c57890afd0 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
@@ -3,8 +3,8 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fmv.h" } } */
-    /* { dg-final { scan-assembler-not "fmv.s" } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.h\M} } } */
+    /* { dg-final { scan-assembler-not {\mfmv\.s\M} } } */
     /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */
     return b;
 }
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
index 17f45a938d5..31aa40d7e8e 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-2.c
@@ -3,7 +3,7 @@
 
 _Float16 foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fadd.h" } } */
+    /* { dg-final { scan-assembler-not {\mfadd\.h\M} } } */
     /* { dg-final { scan-assembler-not "fadd.s	fa" } } */
     /* { dg-final { scan-assembler-times "fadd.s	a" 1 } } */
     return a + b;
diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
index 939b3787383..230c0229413 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-3.c
@@ -3,7 +3,7 @@
 
 int foo1 (_Float16 a, _Float16 b)
 {
-    /* { dg-final { scan-assembler-not "fgt.h" } } */
+    /* { dg-final { scan-assembler-not {\mfgt\.h\M} } } */
     /* { dg-final { scan-assembler-not "fgt.s	fa" } } */
     /* { dg-final { scan-assembler-times "fgt.s	a" 1 } } */
     return a > b;
diff --git a/gcc/testsuite/gcc.target/riscv/and-extend-1.c b/gcc/testsuite/gcc.target/riscv/and-extend-1.c
index a270d287374..2fe4da3e4c5 100644
--- a/gcc/testsuite/gcc.target/riscv/and-extend-1.c
+++ b/gcc/testsuite/gcc.target/riscv/and-extend-1.c
@@ -23,8 +23,8 @@ foo3(unsigned int a, unsigned int* ptr)
     ptr[1] &= 0xffff;
 }
 
-/* { dg-final { scan-assembler-times "zext.w" 1 } } */
-/* { dg-final { scan-assembler-times "zext.h" 2 } } */
-/* { dg-final { scan-assembler-times "lwu" 1 } } */
-/* { dg-final { scan-assembler-times "lhu" 2 } } */
+/* { dg-final { scan-assembler-times {\mzext\.w\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mzext\.h\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlwu} 1 } } */
+/* { dg-final { scan-assembler-times {\mlhu} 2 } } */
 /* { dg-final { scan-assembler-not "and\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/and-extend-2.c b/gcc/testsuite/gcc.target/riscv/and-extend-2.c
index fe639cd1e82..e5a9cf62351 100644
--- a/gcc/testsuite/gcc.target/riscv/and-extend-2.c
+++ b/gcc/testsuite/gcc.target/riscv/and-extend-2.c
@@ -23,6 +23,6 @@ foo3(unsigned int a, unsigned int* ptr)
     ptr[1] &= 0xffff;
 }
 
-/* { dg-final { scan-assembler-times "zext.h" 2 } } */
-/* { dg-final { scan-assembler-times "lhu" 2 } } */
+/* { dg-final { scan-assembler-times {\mzext\.h\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlhu} 2 } } */
 /* { dg-final { scan-assembler-not "and\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fle-ieee.c b/gcc/testsuite/gcc.target/riscv/fle-ieee.c
index af9d503b1ec..e55331f925d 100644
--- a/gcc/testsuite/gcc.target/riscv/fle-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/fle-ieee.c
@@ -9,4 +9,4 @@ fle (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.d\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fle-snan.c b/gcc/testsuite/gcc.target/riscv/fle-snan.c
index 0579d93109b..f40bb2cbf66 100644
--- a/gcc/testsuite/gcc.target/riscv/fle-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fle-snan.c
@@ -9,4 +9,4 @@ fle (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.d\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.d\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flef-ieee.c b/gcc/testsuite/gcc.target/riscv/flef-ieee.c
index e2d6b0d91b5..f3e7e7d75d6 100644
--- a/gcc/testsuite/gcc.target/riscv/flef-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/flef-ieee.c
@@ -9,4 +9,4 @@ flef (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.s\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flef-snan.c b/gcc/testsuite/gcc.target/riscv/flef-snan.c
index 2d2c5b9e79f..ef75b352305 100644
--- a/gcc/testsuite/gcc.target/riscv/flef-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/flef-snan.c
@@ -9,4 +9,4 @@ flef (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tfle\\.s\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.s\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flt-ieee.c b/gcc/testsuite/gcc.target/riscv/flt-ieee.c
index 7d7aae303e6..c40a0fc1180 100644
--- a/gcc/testsuite/gcc.target/riscv/flt-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/flt-ieee.c
@@ -9,4 +9,4 @@ flt (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.d\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/flt-snan.c b/gcc/testsuite/gcc.target/riscv/flt-snan.c
index ff4c4e9ac8d..c958ec01842 100644
--- a/gcc/testsuite/gcc.target/riscv/flt-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/flt-snan.c
@@ -9,4 +9,4 @@ flt (double x, double y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.d\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.d\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fltf-ieee.c b/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
index ede076eea36..a9c0805037e 100644
--- a/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/fltf-ieee.c
@@ -9,4 +9,4 @@ fltf (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.s\t\[^\n\]*\n\tfsflags\t\\1\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fltf-snan.c b/gcc/testsuite/gcc.target/riscv/fltf-snan.c
index d29d786f7f0..34a51e3e800 100644
--- a/gcc/testsuite/gcc.target/riscv/fltf-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fltf-snan.c
@@ -9,4 +9,4 @@ fltf (float x, float y)
 }
 
 /* { dg-final { scan-assembler "\tfrflags\t(\[^\n\]*)\n\tflt\\.s\t\[^,\]*,(\[^,\]*),(\[^,\]*)\n\tfsflags\t\\1\n\tfeq\\.s\tzero,\\2,\\3\n" } } */
-/* { dg-final { scan-assembler-not "snez" } } */
+/* { dg-final { scan-assembler-not {\msnez} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-1.c b/gcc/testsuite/gcc.target/riscv/interrupt-1.c
index d85eb980e16..506aef4adc4 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-1.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-1.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "mret" } } */
+/* { dg-final { scan-assembler {\mmret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c b/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
index 50d54a0cf34..7b7f0a7a7c6 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-mmode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("machine")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "mret" } } */
+/* { dg-final { scan-assembler {\mmret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-smode.c b/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
index 973a9b1cac5..ef0e59b4597 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-smode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("supervisor")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "sret" } } */
+/* { dg-final { scan-assembler {\msret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c b/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
index 7fcef755b0c..042abf02ad2 100644
--- a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
+++ b/gcc/testsuite/gcc.target/riscv/interrupt-umode.c
@@ -5,4 +5,4 @@ void __attribute__ ((interrupt ("user")))
 foo (void)
 {
 }
-/* { dg-final { scan-assembler "uret" } } */
+/* { dg-final { scan-assembler {\muret} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr106888.c b/gcc/testsuite/gcc.target/riscv/pr106888.c
index 77fb8e5b79c..739d5d7e5ef 100644
--- a/gcc/testsuite/gcc.target/riscv/pr106888.c
+++ b/gcc/testsuite/gcc.target/riscv/pr106888.c
@@ -8,5 +8,5 @@ ctz (int i)
   return res&0xffff;
 }
 
-/* { dg-final { scan-assembler-times "ctzw" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-times {\mctzw} 1 } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr108987.c b/gcc/testsuite/gcc.target/riscv/pr108987.c
index 6179c7e13a4..be9cd92dbfa 100644
--- a/gcc/testsuite/gcc.target/riscv/pr108987.c
+++ b/gcc/testsuite/gcc.target/riscv/pr108987.c
@@ -6,4 +6,4 @@ unsigned long long f5(unsigned long long i)
   return i * 0x0202020202020202ULL;
 }
 
-/* { dg-final { scan-assembler-times "mul" 1 } } */
+/* { dg-final { scan-assembler-times {\mmul} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/pr89835.c b/gcc/testsuite/gcc.target/riscv/pr89835.c
index ab190e11b60..b7adc7c54f8 100644
--- a/gcc/testsuite/gcc.target/riscv/pr89835.c
+++ b/gcc/testsuite/gcc.target/riscv/pr89835.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* Verify that relaxed atomic stores use simple store instuctions.  */
-/* { dg-final { scan-assembler-not "amoswap" } } */
+/* { dg-final { scan-assembler-not {\mamoswap} } } */
 
 void
 foo(int bar, int baz)
diff --git a/gcc/testsuite/gcc.target/riscv/ret-1.c b/gcc/testsuite/gcc.target/riscv/ret-1.c
index 28133aa4226..92795958f5c 100644
--- a/gcc/testsuite/gcc.target/riscv/ret-1.c
+++ b/gcc/testsuite/gcc.target/riscv/ret-1.c
@@ -37,5 +37,5 @@ core_list_find(list_head *list, list_data *info)
 /* There is only one legitimate unconditional jump, so test for that,
    which will catch the case where bb-reorder leaves a jump to a ret
    in the IL.  */
-/* { dg-final { scan-assembler-times "jump" 1 } } */
+/* { dg-final { scan-assembler-times {\mjump} 1 } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
index 14201e1f7e0..64007ee6799 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-1.c
@@ -8,5 +8,5 @@ f (int * __restrict dst, int * __restrict op1, int * __restrict op2, int count)
     dst[i] = op1[i] + op2[i];
 }
 
-/* { dg-final { scan-assembler-not "lw" } } */
-/* { dg-final { scan-assembler-not "sw" } } */
+/* { dg-final { scan-assembler-not {\mlw} } } */
+/* { dg-final { scan-assembler-not {\msw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
index 812584e9d25..a82f34e0464 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/align-2.c
@@ -8,5 +8,5 @@ f (int * __restrict dst, int * __restrict op1, int * __restrict op2, int count)
     dst[i] = op1[i] + op2[i];
 }
 
-/* { dg-final { scan-assembler-not "lw" } } */
-/* { dg-final { scan-assembler-not "sw" } } */
+/* { dg-final { scan-assembler-not {\mlw} } } */
+/* { dg-final { scan-assembler-not {\msw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-and-1.c b/gcc/testsuite/gcc.target/riscv/shift-and-1.c
index 429ab84f9df..2d483d06baa 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-and-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-and-1.c
@@ -8,4 +8,4 @@ sub1 (int i, int j)
 {
   return i << (j & 0x1f);
 }
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-and-2.c b/gcc/testsuite/gcc.target/riscv/shift-and-2.c
index ee9925b7498..9b4ca11fcba 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-and-2.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-and-2.c
@@ -57,5 +57,5 @@ sub9 (unsigned i, unsigned j) {
   return (i >> 10) & j;
 }
 
-/* { dg-final { scan-assembler-not "andi" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-1.c b/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
index 462e532e1f1..bae6c8a4016 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-1.c
@@ -14,5 +14,5 @@ sub2 (unsigned int i)
 {
   return (i << 20) >> 20;
 }
-/* { dg-final { scan-assembler-times "slli" 2 } } */
-/* { dg-final { scan-assembler-times "srli" 2 } } */
+/* { dg-final { scan-assembler-times {\mslli} 2 } } */
+/* { dg-final { scan-assembler-times {\msrli} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-2.c b/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
index bc8c4ef3828..3b0c9d5dfb4 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-2.c
@@ -36,8 +36,8 @@ sub5 (unsigned int i)
   j = i - j;
   return j;
 }
-/* { dg-final { scan-assembler-times "slli" 5 } } */
-/* { dg-final { scan-assembler-times "srli" 5 } } */
+/* { dg-final { scan-assembler-times {\mslli} 5 } } */
+/* { dg-final { scan-assembler-times {\msrli} 5 } } */
 /* { dg-final { scan-assembler-times ",40" 2 } } */ /* For sub5 test */
-/* { dg-final { scan-assembler-not "slliw" } } */
-/* { dg-final { scan-assembler-not "srliw" } } */
+/* { dg-final { scan-assembler-not {\mslliw} } } */
+/* { dg-final { scan-assembler-not {\msrliw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-3.c b/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
index 16999b02796..d9154a12c58 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-3.c
@@ -15,5 +15,5 @@ sub2 (unsigned long i)
 {
   return (i >> 63) << 63;
 }
-/* { dg-final { scan-assembler-times "slli" 2 } } */
-/* { dg-final { scan-assembler-times "srli" 2 } } */
+/* { dg-final { scan-assembler-times {\mslli} 2 } } */
+/* { dg-final { scan-assembler-times {\msrli} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-4.c b/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
index bc7bca10e6f..c479649a185 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-4.c
@@ -11,4 +11,4 @@ sub (int i)
   i &= 0x7fffffff;
   return i > 0x7f800000;
 }
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shift-shift-5.c b/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
index ed8e7b3f1cb..d012866c2ad 100644
--- a/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
+++ b/gcc/testsuite/gcc.target/riscv/shift-shift-5.c
@@ -18,4 +18,4 @@ sub (long l)
   u.l = l;
   return u.s.b;
 }
-/* { dg-final { scan-assembler "srliw" } } */
+/* { dg-final { scan-assembler {\msrliw} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
index 476d079679f..ba7b783e8d2 100644
--- a/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
+++ b/gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c
@@ -44,4 +44,4 @@ load2r (long long *array)
   return a;
 }
 
-/* { dg-final { scan-assembler-not "addi" } } */
+/* { dg-final { scan-assembler-not {\maddi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sign-extend.c b/gcc/testsuite/gcc.target/riscv/sign-extend.c
index 6f840194833..47be57dc88e 100644
--- a/gcc/testsuite/gcc.target/riscv/sign-extend.c
+++ b/gcc/testsuite/gcc.target/riscv/sign-extend.c
@@ -69,13 +69,13 @@ foo11 (unsigned x)
   return x & (15 + x);
 }
 
-/* { dg-final { scan-assembler-times "subw" 2 } } */
-/* { dg-final { scan-assembler-times "addw" 1 } } */
-/* { dg-final { scan-assembler-times "addiw" 1 } } */
-/* { dg-final { scan-assembler-times "mulw" 2 } } */
-/* { dg-final { scan-assembler-times "divw" 1 } } */
-/* { dg-final { scan-assembler-times "divuw" 1 } } */
-/* { dg-final { scan-assembler-times "remw" 1 } } */
-/* { dg-final { scan-assembler-times "remuw" 1 } } */
-/* { dg-final { scan-assembler-times "negw" 1 } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-times {\msubw} 2 } } */
+/* { dg-final { scan-assembler-times {\maddw} 1 } } */
+/* { dg-final { scan-assembler-times {\maddiw} 1 } } */
+/* { dg-final { scan-assembler-times {\mmulw} 2 } } */
+/* { dg-final { scan-assembler-times {\mdivw} 1 } } */
+/* { dg-final { scan-assembler-times {\mdivuw} 1 } } */
+/* { dg-final { scan-assembler-times {\mremw} 1 } } */
+/* { dg-final { scan-assembler-times {\mremuw} 1 } } */
+/* { dg-final { scan-assembler-times {\mnegw} 1 } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/switch-qi.c b/gcc/testsuite/gcc.target/riscv/switch-qi.c
index e39219bea36..9126e0a10b2 100644
--- a/gcc/testsuite/gcc.target/riscv/switch-qi.c
+++ b/gcc/testsuite/gcc.target/riscv/switch-qi.c
@@ -12,4 +12,4 @@ void foo(signed char x) {
   case 4: asdf(14); break;
   }
 }
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/switch-si.c b/gcc/testsuite/gcc.target/riscv/switch-si.c
index c68f98d04e6..e76c2aa088d 100644
--- a/gcc/testsuite/gcc.target/riscv/switch-si.c
+++ b/gcc/testsuite/gcc.target/riscv/switch-si.c
@@ -12,4 +12,4 @@ void foo(int x) {
   case 4: asdf(14); break;
   }
 }
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
index 02f6ec1417d..04b82321045 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext-1.c
@@ -63,5 +63,5 @@ char sext8_16(short s16)
     return s16;
 }
 
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
index 60fb7d44e39..121d9697d71 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
@@ -17,4 +17,4 @@ foo (struct bar *s)
 }
 
 /* { dg-final { scan-assembler "th.ext\t" } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
index 01e3eda7df2..b92445c5132 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu-1.c
@@ -63,5 +63,5 @@ unsigned char zext8_16(unsigned short u16)
     return u16;
 }
 
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
index e0492f1f5ad..fca9b7e438a 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
@@ -17,6 +17,6 @@ foo (struct bar *s)
 }
 
 /* { dg-final { scan-assembler "th.extu\t" } } */
-/* { dg-final { scan-assembler-not "andi" } } */
-/* { dg-final { scan-assembler-not "slli" } } */
-/* { dg-final { scan-assembler-not "srli" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
+/* { dg-final { scan-assembler-not {\mslli} } } */
+/* { dg-final { scan-assembler-not {\msrli} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c b/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
index dbc8d1e7da7..f243b6f1f4f 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbb-strlen.c
@@ -13,7 +13,7 @@ my_str_len (const char *s)
 }
 
 /* { dg-final { scan-assembler "th.tstnbz\t" } } */
-/* { dg-final { scan-assembler-not "jalr" } } */
-/* { dg-final { scan-assembler-not "call" } } */
-/* { dg-final { scan-assembler-not "jr" } } */
-/* { dg-final { scan-assembler-not "tail" } } */
+/* { dg-final { scan-assembler-not {\mjalr} } } */
+/* { dg-final { scan-assembler-not {\mcall} } } */
+/* { dg-final { scan-assembler-not {\mjr} } } */
+/* { dg-final { scan-assembler-not {\mtail} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c b/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
index 674cec09128..f56d9ad344c 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
@@ -10,4 +10,4 @@ foo1 (long i)
 }
 
 /* { dg-final { scan-assembler-times "th.tst\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c b/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
index 89eb48bed1b..9b4e2378448 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c
@@ -14,9 +14,9 @@ d2ll (double d)
   return *(long long*)&d;
 }
 
-/* { dg-final { scan-assembler "fmv.w.x" } } */
+/* { dg-final { scan-assembler {\mfmv\.w.x\M} } } */
 /* { dg-final { scan-assembler "th.fmv.hw.x" } } */
-/* { dg-final { scan-assembler "fmv.x.w" } } */
+/* { dg-final { scan-assembler {\mfmv\.x.w\M} } } */
 /* { dg-final { scan-assembler "th.fmv.x.hw" } } */
 /* { dg-final { scan-assembler-not "\tsw\t" } } */
 /* { dg-final { scan-assembler-not "\tfld\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c b/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
index 644ca12d647..19bbcb6a5df 100644
--- a/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
+++ b/gcc/testsuite/gcc.target/riscv/xventanacondops-primitiveSemantics.c
@@ -6,5 +6,5 @@
 
 /* { dg-final { scan-assembler-times "vt\\.maskc\t" 6 } } */
 /* { dg-final { scan-assembler-times "vt\\.maskcn\t" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-adduw.c b/gcc/testsuite/gcc.target/riscv/zba-adduw.c
index 2ae03aee859..a15ad7f9a55 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-adduw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-adduw.c
@@ -10,4 +10,4 @@ int foo(int n, unsigned char *arr, unsigned y){
   return s;
 }
 
-/* { dg-final { scan-assembler "add.uw" } } */
+/* { dg-final { scan-assembler {\madd\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
index bc97bc74539..34dfd0ce9c7 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c
@@ -15,6 +15,6 @@ long test_3(long a, long b)
   return a + (b << 3);
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "sh2add" 1 } } */
-/* { dg-final { scan-assembler-times "sh3add" 1 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh3add} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
index 5f4b65f2d22..c40f2cb8d1e 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c
@@ -15,6 +15,6 @@ long test_3(long a, long b)
   return a + (b << 3);
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "sh2add" 1 } } */
-/* { dg-final { scan-assembler-times "sh3add" 1 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 1 } } */
+/* { dg-final { scan-assembler-times {\msh3add} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
index abed1491039..48e225d3f1e 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-04.c
@@ -19,5 +19,5 @@ long long sub3(unsigned long long a, unsigned long long b)
   return (a + (b << 1)) & ~0u;
 }
 
-/* { dg-final { scan-assembler-times "sh1add" 3 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 3 } } */
 /* { dg-final { scan-assembler-times "zext.w\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
index 93da241c9b6..cd48664a4cd 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c
@@ -25,7 +25,7 @@ f4 (unsigned long i)
   return i * 1574;
 }
 
-/* { dg-final { scan-assembler-times "sh2add" 2 } } */
-/* { dg-final { scan-assembler-times "sh1add" 1 } } */
-/* { dg-final { scan-assembler-times "slli" 3 } } */
-/* { dg-final { scan-assembler-times "mul" 2 } } */
+/* { dg-final { scan-assembler-times {\msh2add} 2 } } */
+/* { dg-final { scan-assembler-times {\msh1add} 1 } } */
+/* { dg-final { scan-assembler-times {\mslli} 3 } } */
+/* { dg-final { scan-assembler-times {\mmul} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-shadd.c b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
index 33da2530f3f..61305d3a357 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-shadd.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
@@ -10,4 +10,4 @@ unsigned long foo(unsigned int a, unsigned long b)
 }
 
 /* { dg-final { scan-assembler "sh2add.uw" } } */
-/* { dg-final { scan-assembler-not "zext" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not {\mzext} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
index cd3cf0eabc4..c123bb5ece0 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-slliuw.c
@@ -9,4 +9,4 @@ foo (long i)
 }
 /* XXX: This pattern need combine improvement or intermediate instruction
  *      from zbs.   */
-/* { dg-final { scan-assembler "slli.uw" } } */
+/* { dg-final { scan-assembler {\mslli\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zba-zextw.c b/gcc/testsuite/gcc.target/riscv/zba-zextw.c
index 271c186ad6d..7da2a943b85 100644
--- a/gcc/testsuite/gcc.target/riscv/zba-zextw.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-zextw.c
@@ -8,4 +8,4 @@ foo (long i)
   return (long)(unsigned int)i;
 }
 /* XXX: This pattern require combine improvement.   */
-/* { dg-final { scan-assembler-not "slli.uw" } } */
+/* { dg-final { scan-assembler-not {\mslli\.uw\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
index 89a30431ef1..a1f5f03cfc2 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c
@@ -17,6 +17,6 @@ unsigned long long foo3(unsigned long long rs1, unsigned long long rs2)
 return rs1 ^ ~rs2;
 }
 
-/* { dg-final { scan-assembler-times "andn" 2 } } */
-/* { dg-final { scan-assembler-times "orn" 2 } } */
-/* { dg-final { scan-assembler-times "xnor" 2 } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mandn} 2 } } */
+/* { dg-final { scan-assembler-times {\morn} 2 } } */
+/* { dg-final { scan-assembler-times {\mxnor} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
index ef0dade47e6..331bd332a56 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c
@@ -17,6 +17,6 @@ unsigned int foo3(unsigned int rs1, unsigned int rs2)
 return rs1 ^ ~rs2;
 }
 
-/* { dg-final { scan-assembler-times "andn" 2 } } */
-/* { dg-final { scan-assembler-times "orn" 2 } } */
-/* { dg-final { scan-assembler-times "xnor" 2 } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mandn} 2 } } */
+/* { dg-final { scan-assembler-times {\morn} 2 } } */
+/* { dg-final { scan-assembler-times {\mxnor} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
index edfbf807d45..22bfb93dddd 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-02.c
@@ -8,7 +8,7 @@ int f(unsigned int* a)
   return *a * 3 > C ? C : *a * 3;
 }
 
-/* { dg-final { scan-assembler-times "minu" 1 } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
-/* { dg-final { scan-assembler-not "zext.w" } } */
+/* { dg-final { scan-assembler-times {\mminu} 1 } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
+/* { dg-final { scan-assembler-not {\mzext\.w\M} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
index 38c932b9580..769e876ced7 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c
@@ -18,6 +18,6 @@ unsigned f3(unsigned x, unsigned y) {
 /* { dg-final { scan-assembler-not "li\t" } } */
 /* { dg-final { scan-assembler-times "maxu\t" 1 } } */
 /* { dg-final { scan-assembler-times "minu\t" 1 } } */
-/* { dg-final { scan-assembler-not "zext.w" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-not {\mzext\.w\M} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
index ce054ddb37f..2a5d9349b46 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-min-max.c
@@ -26,7 +26,7 @@ foo4 (unsigned long i, unsigned long j)
   return i > j ? i : j;
 }
 
-/* { dg-final { scan-assembler-times "min" 3 } } */
-/* { dg-final { scan-assembler-times "max" 3 } } */
-/* { dg-final { scan-assembler-times "minu" 1 } } */
-/* { dg-final { scan-assembler-times "maxu" 1 } } */
+/* { dg-final { scan-assembler-times {\mmin} 3 } } */
+/* { dg-final { scan-assembler-times {\mmax} 3 } } */
+/* { dg-final { scan-assembler-times {\mminu} 1 } } */
+/* { dg-final { scan-assembler-times {\mmaxu} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
index 0a5b5e12eb2..4f2ff7f54e6 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c
@@ -13,6 +13,6 @@ unsigned long foo2(unsigned long rs1, unsigned long rs2)
     return (rs1 >> shamt) | (rs1 << ((64 - shamt) & (64 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rol" 2 } } */
-/* { dg-final { scan-assembler-times "ror" 2 } } */
-/* { dg-final { scan-assembler-not "and" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mrol} 2 } } */
+/* { dg-final { scan-assembler-times {\mror} 2 } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
index d0d58135809..c24809234b6 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c
@@ -13,6 +13,6 @@ unsigned int foo2(unsigned int rs1, unsigned int rs2)
     return (rs1 >> shamt) | (rs1 << ((32 - shamt) & (32 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rol" 2 } } */
-/* { dg-final { scan-assembler-times "ror" 2 } } */
-/* { dg-final { scan-assembler-not {and} { target { no-opts "-O0" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {\mrol} 2 } } */
+/* { dg-final { scan-assembler-times {\mror} 2 } } */
+/* { dg-final { scan-assembler-not {and} { target { no-opts "-O0" } } } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
index e7e5cbb9a1a..f85c20eb74a 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c
@@ -14,7 +14,7 @@ unsigned int ror(unsigned int rs1, unsigned int rs2)
     return (rs1 >> shamt) | (rs1 << ((32 - shamt) & (32 - 1)));
 }
 
-/* { dg-final { scan-assembler-times "rolw" 1 } } */
-/* { dg-final { scan-assembler-times "rorw" 1 } } */
-/* { dg-final { scan-assembler-not "and" } } */
-/* { dg-final { scan-assembler-not "sext.w" } } */
+/* { dg-final { scan-assembler-times {\mrolw} 1 } } */
+/* { dg-final { scan-assembler-times {\mrorw} 1 } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
+/* { dg-final { scan-assembler-not {\msext\.w\M} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
index 7ef4c29dd5b..28350e5e937 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-04.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
index 2108ccc3e77..cc44653acfb 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-05.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
index 8c0711d6f94..7a98a5712bf 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-06.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
@@ -34,4 +34,4 @@ unsigned int foo3 (unsigned int rs1)
 **	ret
 */
 unsigned int foo4 (unsigned int rs1)
-{ return ((rs1 << 18) | (rs1 >> 14)); }
\ No newline at end of file
+{ return ((rs1 << 18) | (rs1 >> 14)); }
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
index bda3f0e474d..a08a9eb772e 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-07.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
@@ -62,4 +62,4 @@ unsigned long foo4 (unsigned long rs1)
     tempt = tempt << 6;
     rs1 = tempt | (rs1 >> 20);
     return rs1 ; 
-}
\ No newline at end of file
+}
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
index 30696f3bb32..bf19b76b431 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-08.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv64gc_zbb -mabi=lp64d -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
index a3054553e18..5c4b9f58de1 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-rol-ror-09.c
@@ -2,7 +2,7 @@
 /* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -fno-lto -O2" } */
 /* { dg-skip-if "" { *-*-* } { "-g" } } */
 /* { dg-final { check-function-bodies "**" "" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
 
 /*
 **foo1:
diff --git a/gcc/testsuite/gcc.target/riscv/zbb-strlen.c b/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
index 19ebfaef16f..267ee414a44 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb-strlen.c
@@ -13,7 +13,7 @@ my_str_len (const char *s)
 }
 
 /* { dg-final { scan-assembler "orc.b\t" } } */
-/* { dg-final { scan-assembler-not "jalr" } } */
-/* { dg-final { scan-assembler-not "call" } } */
-/* { dg-final { scan-assembler-not "jr" } } */
-/* { dg-final { scan-assembler-not "tail" } } */
+/* { dg-final { scan-assembler-not {\mjalr} } } */
+/* { dg-final { scan-assembler-not {\mcall} } } */
+/* { dg-final { scan-assembler-not {\mjr} } } */
+/* { dg-final { scan-assembler-not {\mtail} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
index 3ff7d9de409..789dda17f05 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-1.c
@@ -7,5 +7,5 @@ int foo(int n)
   return __builtin_bswap32(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
index 679b34c4e41..3b8462d7feb 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_32_bswap-2.c
@@ -7,6 +7,6 @@ int foo(int n)
   return __builtin_bswap16(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
-/* { dg-final { scan-assembler "srli" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
+/* { dg-final { scan-assembler {\msrli} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
index 20feded0df2..158d97bc6e6 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-1.c
@@ -7,5 +7,5 @@ int foo(int n)
   return __builtin_bswap32(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
index c358f6683f3..cb81f981ee3 100644
--- a/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zbb_bswap-2.c
@@ -7,6 +7,6 @@ int foo(int n)
   return __builtin_bswap16(n);
 }
 
-/* { dg-final { scan-assembler "rev8" } } */
-/* { dg-final { scan-assembler "srli" } } */
+/* { dg-final { scan-assembler {\mrev8} } } */
+/* { dg-final { scan-assembler {\msrli} } } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/zbbw.c b/gcc/testsuite/gcc.target/riscv/zbbw.c
index f7b2b63853f..bdf6b0c4ec5 100644
--- a/gcc/testsuite/gcc.target/riscv/zbbw.c
+++ b/gcc/testsuite/gcc.target/riscv/zbbw.c
@@ -20,7 +20,7 @@ popcount (int i)
 }
 
 
-/* { dg-final { scan-assembler-times "clzw" 1 } } */
-/* { dg-final { scan-assembler-times "ctzw" 1 } } */
-/* { dg-final { scan-assembler-times "cpopw" 1 } } */
+/* { dg-final { scan-assembler-times {\mclzw} 1 } } */
+/* { dg-final { scan-assembler-times {\mctzw} 1 } } */
+/* { dg-final { scan-assembler-times {\mcpopw} 1 } } */
 /* { dg-final { scan-assembler-not "andi\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbc32.c b/gcc/testsuite/gcc.target/riscv/zbc32.c
index f3fb2238f7f..049ea95c56b 100644
--- a/gcc/testsuite/gcc.target/riscv/zbc32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbc32.c
@@ -19,5 +19,5 @@ uint32_t foo3(uint32_t rs1, uint32_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
-/* { dg-final { scan-assembler-times "clmulr" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulr} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbc64.c b/gcc/testsuite/gcc.target/riscv/zbc64.c
index 841a0aa7847..69dadd1ca88 100644
--- a/gcc/testsuite/gcc.target/riscv/zbc64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbc64.c
@@ -19,5 +19,5 @@ uint64_t foo3(uint64_t rs1, uint64_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
-/* { dg-final { scan-assembler-times "clmulr" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulr} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkb32.c b/gcc/testsuite/gcc.target/riscv/zbkb32.c
index b2e442dc49d..841f5e0d8e3 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkb32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkb32.c
@@ -30,7 +30,7 @@ uint32_t foo5(uint32_t rs1)
 }
 
 /* { dg-final { scan-assembler-times "pack\t" 1 } } */
-/* { dg-final { scan-assembler-times "packh" 1 } } */
-/* { dg-final { scan-assembler-times "brev8" 1 } } */
+/* { dg-final { scan-assembler-times {\mpackh} 1 } } */
+/* { dg-final { scan-assembler-times {\mbrev8} 1 } } */
 /* { dg-final { scan-assembler-times "\tzip\t" 1 } } */
-/* { dg-final { scan-assembler-times "unzip" 1 } } */
+/* { dg-final { scan-assembler-times {\munzip} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkb64.c b/gcc/testsuite/gcc.target/riscv/zbkb64.c
index 08ac9c2a9f0..8b6a0bff1f2 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkb64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkb64.c
@@ -23,6 +23,6 @@ uint64_t foo4(uint64_t rs1, uint64_t rs2)
     return __builtin_riscv_brev8(rs1);
 }
 /* { dg-final { scan-assembler-times "pack\t" 1 } } */
-/* { dg-final { scan-assembler-times "packh" 1 } } */
-/* { dg-final { scan-assembler-times "packw" 1 } } */
-/* { dg-final { scan-assembler-times "brev8" 1 } } */
+/* { dg-final { scan-assembler-times {\mpackh} 1 } } */
+/* { dg-final { scan-assembler-times {\mpackw} 1 } } */
+/* { dg-final { scan-assembler-times {\mbrev8} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkc32.c b/gcc/testsuite/gcc.target/riscv/zbkc32.c
index 29f0d624a7d..6d2a8fffbc1 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkc32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkc32.c
@@ -14,4 +14,4 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkc64.c b/gcc/testsuite/gcc.target/riscv/zbkc64.c
index 53e6ac215ed..3708fb5fbb1 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkc64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkc64.c
@@ -14,4 +14,4 @@ uint64_t foo2(uint64_t rs1, uint64_t rs2)
 }
 
 /* { dg-final { scan-assembler-times "clmul\t" 1 } } */
-/* { dg-final { scan-assembler-times "clmulh" 1 } } */
+/* { dg-final { scan-assembler-times {\mclmulh} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkx32.c b/gcc/testsuite/gcc.target/riscv/zbkx32.c
index b8b822a7c49..b41fd90de51 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkx32.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkx32.c
@@ -14,5 +14,5 @@ uint32_t foo4(uint32_t rs1, uint32_t rs2)
     return __builtin_riscv_xperm4(rs1, rs2);
 }
 
-/* { dg-final { scan-assembler-times "xperm8" 1 } } */
-/* { dg-final { scan-assembler-times "xperm4" 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm8} 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm4} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbkx64.c b/gcc/testsuite/gcc.target/riscv/zbkx64.c
index 732436701b3..9ed42b40718 100644
--- a/gcc/testsuite/gcc.target/riscv/zbkx64.c
+++ b/gcc/testsuite/gcc.target/riscv/zbkx64.c
@@ -14,5 +14,5 @@ uint64_t foo2(uint64_t rs1, uint64_t rs2)
     return __builtin_riscv_xperm4(rs1, rs2);
 }
 
-/* { dg-final { scan-assembler-times "xperm8" 1 } } */
-/* { dg-final { scan-assembler-times "xperm4" 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm8} 1 } } */
+/* { dg-final { scan-assembler-times {\mxperm4} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bclr.c b/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
index 5d7daa3b826..e37580dc245 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bclr.c
@@ -18,4 +18,4 @@ foo1 (long i)
 
 /* { dg-final { scan-assembler-times "bclr\t" 1 } } */
 /* { dg-final { scan-assembler-times "bclri\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
index 3f3b8404eca..8c5d8c7a41a 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
@@ -14,5 +14,5 @@ foo(const long long B, int a)
 }
 
 /* { dg-final { scan-assembler-times "bext\t" 1 } } */
-/* { dg-final { scan-assembler-not "bset" } } */
-/* { dg-final { scan-assembler-not "and" } } */
+/* { dg-final { scan-assembler-not {\mbset} } } */
+/* { dg-final { scan-assembler-not {\mand} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext.c b/gcc/testsuite/gcc.target/riscv/zbs-bext.c
index a8aadb60390..ff75dad6528 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bext.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext.c
@@ -41,4 +41,4 @@ long bext64_4(long a, char bitno)
 /* { dg-final { scan-assembler-times "xori\t|snez\t" 1 } } */
 /* { dg-final { scan-assembler-times "addi\t" 1 } } */
 /* { dg-final { scan-assembler-times "neg\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-binv.c b/gcc/testsuite/gcc.target/riscv/zbs-binv.c
index d8d6e47f435..f4bf27e9071 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-binv.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-binv.c
@@ -18,4 +18,4 @@ foo1 (long i)
 
 /* { dg-final { scan-assembler-times "binv\t" 1 } } */
 /* { dg-final { scan-assembler-times "binvi\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bset.c b/gcc/testsuite/gcc.target/riscv/zbs-bset.c
index cea2b64bafc..4a5b6f5cb57 100644
--- a/gcc/testsuite/gcc.target/riscv/zbs-bset.c
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bset.c
@@ -39,4 +39,4 @@ sub4 (long i)
 
 /* { dg-final { scan-assembler-times "bset\t" 4 } } */
 /* { dg-final { scan-assembler-times "bseti\t" 1 } } */
-/* { dg-final { scan-assembler-not "andi" } } */
+/* { dg-final { scan-assembler-not {\mandi} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-1.c b/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
index b61ea8eff6b..754842feddd 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-1.c
@@ -5,4 +5,4 @@ sub1 (unsigned int i)
 {
   return i >> 1;
 }
-/* { dg-final { scan-assembler-times "srliw" 1 } } */
+/* { dg-final { scan-assembler-times {\msrliw} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-2.c b/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
index c3d6eeb1f7d..da48fe57463 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-2.c
@@ -10,4 +10,4 @@ sub (unsigned int wc, unsigned long step, unsigned char *start)
     }
   while (step > 1);
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-3.c b/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
index 6485ebd5934..c567300f4ac 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-3.c
@@ -9,4 +9,4 @@ c (void)
     d = b;
   return d;
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-4.c b/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
index e1a8922bb28..3c776b09d6e 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-4.c
@@ -18,4 +18,4 @@ f(void)
 	d->binmap[0] = e;
     }
 }
-/* { dg-final { scan-assembler-times "sext.w" 0 } } */
+/* { dg-final { scan-assembler-times {\msext\.w\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-extend-5.c b/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
index 4e58a151f62..2f689614dce 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-extend-5.c
@@ -5,4 +5,4 @@ sub (unsigned int i, unsigned int j, unsigned int k, int *array)
 {
   return array[i] + array[j] + array[k];
 }
-/* { dg-final { scan-assembler-times "slli" 3 } } */
+/* { dg-final { scan-assembler-times {\mslli} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c b/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
index 9161dd3d4ec..cf3dfac1949 100644
--- a/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
+++ b/gcc/testsuite/gcc.target/riscv/zero-scratch-regs-2.c
@@ -6,7 +6,7 @@ foo (void)
 {
 }
 
-/* { dg-final { scan-assembler-not "vsetvli" } } */
+/* { dg-final { scan-assembler-not {\mvsetvli} } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t0,0" } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t1,0" } } */
 /* { dg-final { scan-assembler "li\[ \t\]*t2,0" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c b/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
index 7c28b0bcccc..74777387f40 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fleq-fltq.c
@@ -14,7 +14,7 @@ foo()
     abort();
 }
 
-/* { dg-final { scan-assembler-times "fleq.s" 1 } } */
-/* { dg-final { scan-assembler-times "fltq.s" 1 } } */
-/* { dg-final { scan-assembler-times "fleq.d" 1 } } */
-/* { dg-final { scan-assembler-times "fltq.d" 1 } } */
+/* { dg-final { scan-assembler-times {\mfleq\.s\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfltq\.s\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfleq\.d\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mfltq\.d\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c b/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
index 05e2dcbe45e..a97c7bd250f 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fli-zfh.c
@@ -39,4 +39,4 @@ void foo_float16 ()
   a = __builtin_nanf16 ("");
 }
 
-/* { dg-final { scan-assembler-times "fli.h" 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.h\M} 32 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zfa-fli.c b/gcc/testsuite/gcc.target/riscv/zfa-fli.c
index e5c1e591c8c..d7269c5f68a 100644
--- a/gcc/testsuite/gcc.target/riscv/zfa-fli.c
+++ b/gcc/testsuite/gcc.target/riscv/zfa-fli.c
@@ -76,5 +76,5 @@ void foo_double64 ()
   a = __builtin_nan ("");
 }
 
-/* { dg-final { scan-assembler-times "fli.s" 32 } } */
-/* { dg-final { scan-assembler-times "fli.d" 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.s\M} 32 } } */
+/* { dg-final { scan-assembler-times {\mfli\.d\M} 32 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
index 47d4e4c5683..bcfa04bef91 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics.c
@@ -43,7 +43,7 @@ int primitiveSemantics_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
index 76773d32a8b..0764d2919d4 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_0_imm.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_0_imm_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
index 2b4ee956eb7..2ff5033bb04 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_imm.c
@@ -67,7 +67,7 @@ int primitiveSemantics_return_imm_imm_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
index 4a96560eb61..93844d166c3 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_imm_reg.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_imm_reg_11(int a, int b) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 6 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 6 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
index 0624b6f16d4..619ad8ecf7d 100644
--- a/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
+++ b/gcc/testsuite/gcc.target/riscv/zicond-primitiveSemantics_return_reg_reg.c
@@ -59,7 +59,7 @@ int primitiveSemantics_return_reg_reg_11(int a, int b, int c) {
   return b;
 }
 
-/* { dg-final { scan-assembler-times "czero.eqz" 12 } } */
-/* { dg-final { scan-assembler-times "czero.nez" 12 } } */
-/* { dg-final { scan-assembler-not "beq" } } */
-/* { dg-final { scan-assembler-not "bne" } } */
+/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mczero\.nez\M} 12 } } */
+/* { dg-final { scan-assembler-not {\mbeq} } } */
+/* { dg-final { scan-assembler-not {\mbne} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zknd64.c b/gcc/testsuite/gcc.target/riscv/zknd64.c
index 910b91c6ed8..707418cd51e 100644
--- a/gcc/testsuite/gcc.target/riscv/zknd64.c
+++ b/gcc/testsuite/gcc.target/riscv/zknd64.c
@@ -33,4 +33,4 @@ uint64_t foo5(uint64_t rs1)
 /* { dg-final { scan-assembler-times "aes64dsm" 1 } } */
 /* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */
 /* { dg-final { scan-assembler-times "aes64ks2" 1 } } */
-/* { dg-final { scan-assembler-times "aes64im" 1 } } */
+/* { dg-final { scan-assembler-times {\maes64im} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksed32.c b/gcc/testsuite/gcc.target/riscv/zksed32.c
index 7df04147e05..0e8f01cd548 100644
--- a/gcc/testsuite/gcc.target/riscv/zksed32.c
+++ b/gcc/testsuite/gcc.target/riscv/zksed32.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs)
 }
 
 
-/* { dg-final { scan-assembler-times "sm4ks" 1 } } */
-/* { dg-final { scan-assembler-times "sm4ed" 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ks} 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ed} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksed64.c b/gcc/testsuite/gcc.target/riscv/zksed64.c
index 913e7be4e4d..9e4d1961419 100644
--- a/gcc/testsuite/gcc.target/riscv/zksed64.c
+++ b/gcc/testsuite/gcc.target/riscv/zksed64.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1, uint32_t rs2, unsigned bs)
 }
 
 
-/* { dg-final { scan-assembler-times "sm4ks" 1 } } */
-/* { dg-final { scan-assembler-times "sm4ed" 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ks} 1 } } */
+/* { dg-final { scan-assembler-times {\msm4ed} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksh32.c b/gcc/testsuite/gcc.target/riscv/zksh32.c
index 20513f986f8..c182e557a85 100644
--- a/gcc/testsuite/gcc.target/riscv/zksh32.c
+++ b/gcc/testsuite/gcc.target/riscv/zksh32.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1)
 }
 
 
-/* { dg-final { scan-assembler-times "sm3p0" 1 } } */
-/* { dg-final { scan-assembler-times "sm3p1" 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p0} 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p1} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/zksh64.c b/gcc/testsuite/gcc.target/riscv/zksh64.c
index 30bb1bdeeeb..d794b39f77a 100644
--- a/gcc/testsuite/gcc.target/riscv/zksh64.c
+++ b/gcc/testsuite/gcc.target/riscv/zksh64.c
@@ -15,5 +15,5 @@ uint32_t foo2(uint32_t rs1)
 }
 
 
-/* { dg-final { scan-assembler-times "sm3p0" 1 } } */
-/* { dg-final { scan-assembler-times "sm3p1" 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p0} 1 } } */
+/* { dg-final { scan-assembler-times {\msm3p1} 1 } } */

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27  9:26 committed [RISC-V]: Harden test scan patterns Joern Rennecke
@ 2023-09-27 17:22 ` Jeff Law
  2023-09-27 18:22   ` Joern Rennecke
  0 siblings, 1 reply; 13+ messages in thread
From: Jeff Law @ 2023-09-27 17:22 UTC (permalink / raw)
  To: Joern Rennecke, GCC Patches



On 9/27/23 03:26, Joern Rennecke wrote:
> I got tired of scan tests failing when they have an underspecified
> pattern that matches LTO information, so I did a global replace for
> the most common form of such scan patterns in the gcc.target/riscv
> testsuite.
> 
> regression tested for:
>      riscv-sim
>      riscv-sim/-march=rv32gcv_zfh/-mabi=ilp32d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
>      riscv-sim/-march=rv32imac/-mabi=ilp32
>      riscv-sim/-march=rv64gcv_zfh_zvfh_zba_zbb_zbc_zicond_zicboz_zawrs/-mabi=lp64d/-ftree-vectorize/--param=riscv-autovec-preferenc
> e=scalable
>      riscv-sim/-march=rv64imac/-mabi=lp64
> 
> Committed as obvious.
It would help to describe how these patterns were under specified so 
that folks don't continue to make the same mistake as new tests get added.

Jeff

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27 17:22 ` Jeff Law
@ 2023-09-27 18:22   ` Joern Rennecke
  2023-09-27 20:14     ` Jeff Law
  0 siblings, 1 reply; 13+ messages in thread
From: Joern Rennecke @ 2023-09-27 18:22 UTC (permalink / raw)
  To: Jeff Law; +Cc: GCC Patches

On Wed, 27 Sept 2023 at 18:22, Jeff Law <jeffreyalaw@gmail.com> wrote:

> It would help to describe how these patterns were under specified so
> that folks don't continue to make the same mistake as new tests get added.

dg-final scan-assembler, scan-assembler-not, and scan-assembler-times
use a tcl regular expression (often referred to abbreviated as RE), as
described in https://www.tcl.tk/man/tcl8.4/TclCmd/re_syntax.html .

If your RE is not specific enough, it can match LTO information that the
compiler places into its assembly output when the relevant options are
provided, which is common when running tests where the test harness
iterates over a number of optimization option combinations.
Note that '.' is an atom that can match any character.  If you want to
match a dot specifically, you have to escape it with a backslash: '\.' .
When you are matching an instruction mnemonic, an effective way to
avoid matching in LTO information is to enforce matching of word start
(\m) and/or word end (\M) .
Note also that the backslash has to be quoted.  If the RE is enclosed in
'"' quotes, extra backslashes are needed.  That is not necessary when it
is enclosed in curly braces.

For example, "ld.w" will be matched in:

.ascii  "h\227\022\212ld@w\251jr\254'\320\255vwj\252\026\016\364"

If you write {\mld\.w\M} instead, you avoid this problem.

#################################

Where should this go?  Maybe somewhere in or linked from
https://gcc.gnu.org/codingconventions.html , Testsuite conventions?

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27 18:22   ` Joern Rennecke
@ 2023-09-27 20:14     ` Jeff Law
  2023-09-27 22:12       ` Andrew Pinski
  2023-09-27 23:21       ` Vineet Gupta
  0 siblings, 2 replies; 13+ messages in thread
From: Jeff Law @ 2023-09-27 20:14 UTC (permalink / raw)
  To: Joern Rennecke; +Cc: GCC Patches



On 9/27/23 12:22, Joern Rennecke wrote:
> On Wed, 27 Sept 2023 at 18:22, Jeff Law <jeffreyalaw@gmail.com> wrote:
> 
>> It would help to describe how these patterns were under specified so
>> that folks don't continue to make the same mistake as new tests get added.
> 
> dg-final scan-assembler, scan-assembler-not, and scan-assembler-times
> use a tcl regular expression (often referred to abbreviated as RE), as
> described in https://www.tcl.tk/man/tcl8.4/TclCmd/re_syntax.html .
> 
> If your RE is not specific enough, it can match LTO information that the
> compiler places into its assembly output when the relevant options are
> provided, which is common when running tests where the test harness
> iterates over a number of optimization option combinations.
> Note that '.' is an atom that can match any character.  If you want to
> match a dot specifically, you have to escape it with a backslash: '\.' .
> When you are matching an instruction mnemonic, an effective way to
> avoid matching in LTO information is to enforce matching of word start
> (\m) and/or word end (\M) .
> Note also that the backslash has to be quoted.  If the RE is enclosed in
> '"' quotes, extra backslashes are needed.  That is not necessary when it
> is enclosed in curly braces.
> 
> For example, "ld.w" will be matched in:
> 
> .ascii  "h\227\022\212ld@w\251jr\254'\320\255vwj\252\026\016\364"
> 
> If you write {\mld\.w\M} instead, you avoid this problem.
OK.  So that naturally leads to the question, why aren't others seeing 
this, both in the RISC-V world and more generally.  I'm not aware of any 
case where I've run the testsuite and tripped over this issue, nor am I 
aware of anyone else tripping over it.

Jeff

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27 20:14     ` Jeff Law
@ 2023-09-27 22:12       ` Andrew Pinski
  2023-09-27 23:21       ` Vineet Gupta
  1 sibling, 0 replies; 13+ messages in thread
From: Andrew Pinski @ 2023-09-27 22:12 UTC (permalink / raw)
  To: Jeff Law; +Cc: Joern Rennecke, GCC Patches

On Wed, Sep 27, 2023 at 1:14 PM Jeff Law <jeffreyalaw@gmail.com> wrote:
>
>
>
> On 9/27/23 12:22, Joern Rennecke wrote:
> > On Wed, 27 Sept 2023 at 18:22, Jeff Law <jeffreyalaw@gmail.com> wrote:
> >
> >> It would help to describe how these patterns were under specified so
> >> that folks don't continue to make the same mistake as new tests get added.
> >
> > dg-final scan-assembler, scan-assembler-not, and scan-assembler-times
> > use a tcl regular expression (often referred to abbreviated as RE), as
> > described in https://www.tcl.tk/man/tcl8.4/TclCmd/re_syntax.html .
> >
> > If your RE is not specific enough, it can match LTO information that the
> > compiler places into its assembly output when the relevant options are
> > provided, which is common when running tests where the test harness
> > iterates over a number of optimization option combinations.
> > Note that '.' is an atom that can match any character.  If you want to
> > match a dot specifically, you have to escape it with a backslash: '\.' .
> > When you are matching an instruction mnemonic, an effective way to
> > avoid matching in LTO information is to enforce matching of word start
> > (\m) and/or word end (\M) .
> > Note also that the backslash has to be quoted.  If the RE is enclosed in
> > '"' quotes, extra backslashes are needed.  That is not necessary when it
> > is enclosed in curly braces.
> >
> > For example, "ld.w" will be matched in:
> >
> > .ascii  "h\227\022\212ld@w\251jr\254'\320\255vwj\252\026\016\364"
> >
> > If you write {\mld\.w\M} instead, you avoid this problem.
> OK.  So that naturally leads to the question, why aren't others seeing
> this, both in the RISC-V world and more generally.  I'm not aware of any
> case where I've run the testsuite and tripped over this issue, nor am I
> aware of anyone else tripping over it.

I can answer the more generally part. Most other testcases if not all
scan-assembler tries to add spaces that allow not to catch things out
of place. Or even file/directory names.
The documentation at
https://gcc.gnu.org/onlinedocs/gccint/Final-Actions.html (and/or
https://gcc.gnu.org/wiki/HowToPrepareATestcase) definitely could be
expanded to make a mention of these gotchas really.

Thanks,
Andrew

>
> Jeff

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27 20:14     ` Jeff Law
  2023-09-27 22:12       ` Andrew Pinski
@ 2023-09-27 23:21       ` Vineet Gupta
  2023-09-29 13:54         ` Jeff Law
  1 sibling, 1 reply; 13+ messages in thread
From: Vineet Gupta @ 2023-09-27 23:21 UTC (permalink / raw)
  To: Jeff Law, Joern Rennecke; +Cc: GCC Patches



On 9/27/23 13:14, Jeff Law wrote:
>>> It would help to describe how these patterns were under specified so
>>> that folks don't continue to make the same mistake as new tests get 
>>> added.
>>
>> dg-final scan-assembler, scan-assembler-not, and scan-assembler-times
>> use a tcl regular expression (often referred to abbreviated as RE), as
>> described in https://www.tcl.tk/man/tcl8.4/TclCmd/re_syntax.html .
>>
>> If your RE is not specific enough, it can match LTO information that the
>> compiler places into its assembly output when the relevant options are
>> provided, which is common when running tests where the test harness
>> iterates over a number of optimization option combinations.
>> Note that '.' is an atom that can match any character.  If you want to
>> match a dot specifically, you have to escape it with a backslash: '\.' .
>> When you are matching an instruction mnemonic, an effective way to
>> avoid matching in LTO information is to enforce matching of word start
>> (\m) and/or word end (\M) .
>> Note also that the backslash has to be quoted.  If the RE is enclosed in
>> '"' quotes, extra backslashes are needed.  That is not necessary when it
>> is enclosed in curly braces.
>>
>> For example, "ld.w" will be matched in:
>>
>> .ascii "h\227\022\212ld@w\251jr\254'\320\255vwj\252\026\016\364"
>>
>> If you write {\mld\.w\M} instead, you avoid this problem.
> OK.  So that naturally leads to the question, why aren't others seeing 
> this, both in the RISC-V world and more generally.  I'm not aware of 
> any case where I've run the testsuite and tripped over this issue, nor 
> am I aware of anyone else tripping over it.

Actually I did run into it. See commit ecfa870ff29d979bd2c ("RISC-V: 
optim const DF +0.0 store to mem [PR/110748]") where a false failure was 
triggered due to these random LTO strings and needed adjusting.

-/* { dg-final { scan-assembler-not "sw" } } */
-/* { dg-final { scan-assembler-not "fld" } } */
-/* { dg-final { scan-assembler-not "fsd" } } */
-/* { dg-final { scan-assembler-not "lw" } } */
+/* { dg-final { scan-assembler-not "\tsw\t" } } */
+/* { dg-final { scan-assembler-not "\tfld\t" } } */
+/* { dg-final { scan-assembler-not "\tfsd\t" } } */
+/* { dg-final { scan-assembler-not "\tlw\t" } } */


^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-27 23:21       ` Vineet Gupta
@ 2023-09-29 13:54         ` Jeff Law
  2023-09-30 21:12           ` Joern Rennecke
  2023-11-08 16:00           ` RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns) Joern Rennecke
  0 siblings, 2 replies; 13+ messages in thread
From: Jeff Law @ 2023-09-29 13:54 UTC (permalink / raw)
  To: Vineet Gupta, Joern Rennecke; +Cc: GCC Patches



On 9/27/23 17:21, Vineet Gupta wrote:
> 
> 
> On 9/27/23 13:14, Jeff Law wrote:
>>>> It would help to describe how these patterns were under specified so
>>>> that folks don't continue to make the same mistake as new tests get 
>>>> added.
>>>
>>> dg-final scan-assembler, scan-assembler-not, and scan-assembler-times
>>> use a tcl regular expression (often referred to abbreviated as RE), as
>>> described in https://www.tcl.tk/man/tcl8.4/TclCmd/re_syntax.html .
>>>
>>> If your RE is not specific enough, it can match LTO information that the
>>> compiler places into its assembly output when the relevant options are
>>> provided, which is common when running tests where the test harness
>>> iterates over a number of optimization option combinations.
>>> Note that '.' is an atom that can match any character.  If you want to
>>> match a dot specifically, you have to escape it with a backslash: '\.' .
>>> When you are matching an instruction mnemonic, an effective way to
>>> avoid matching in LTO information is to enforce matching of word start
>>> (\m) and/or word end (\M) .
>>> Note also that the backslash has to be quoted.  If the RE is enclosed in
>>> '"' quotes, extra backslashes are needed.  That is not necessary when it
>>> is enclosed in curly braces.
>>>
>>> For example, "ld.w" will be matched in:
>>>
>>> .ascii "h\227\022\212ld@w\251jr\254'\320\255vwj\252\026\016\364"
>>>
>>> If you write {\mld\.w\M} instead, you avoid this problem.
>> OK.  So that naturally leads to the question, why aren't others seeing 
>> this, both in the RISC-V world and more generally.  I'm not aware of 
>> any case where I've run the testsuite and tripped over this issue, nor 
>> am I aware of anyone else tripping over it.
> 
> Actually I did run into it. See commit ecfa870ff29d979bd2c ("RISC-V: 
> optim const DF +0.0 store to mem [PR/110748]") where a false failure was 
> triggered due to these random LTO strings and needed adjusting.
Ah!  Good (I suppose).

> 
> -/* { dg-final { scan-assembler-not "sw" } } */
> -/* { dg-final { scan-assembler-not "fld" } } */
> -/* { dg-final { scan-assembler-not "fsd" } } */
> -/* { dg-final { scan-assembler-not "lw" } } */
> +/* { dg-final { scan-assembler-not "\tsw\t" } } */
> +/* { dg-final { scan-assembler-not "\tfld\t" } } */
> +/* { dg-final { scan-assembler-not "\tfsd\t" } } */
> +/* { dg-final { scan-assembler-not "\tlw\t" } } */
The downside of this approach (which I nearly suggested to Joern) is 
that it relies on tabs before/after the mnemonic.  That would also imply 
a review policy to ensure we always use tabs -- and there's going to be 
cases where spotting a tab vs space is going to be tough in a patch 
review, particularly after the mnemonic.

We could instead match a regexp that allows spaces or tabs, but at that 
point I doubt it's simpler than Joern's approach.

So I recommend we go forward with Joern's approach (so consider that an 
ACK for the trunk).   Joern  can you post a follow-up manual twiddle so 
that other ports can follow your example and avoid this problem?

THanks,

jeff

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-29 13:54         ` Jeff Law
@ 2023-09-30 21:12           ` Joern Rennecke
  2023-10-11  4:48             ` Joern Rennecke
  2023-11-08 16:00           ` RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns) Joern Rennecke
  1 sibling, 1 reply; 13+ messages in thread
From: Joern Rennecke @ 2023-09-30 21:12 UTC (permalink / raw)
  To: Jeff Law; +Cc: Vineet Gupta, GCC Patches

On Fri, 29 Sept 2023 at 14:54, Jeff Law <jeffreyalaw@gmail.com> wrote:

> So I recommend we go forward with Joern's approach (so consider that an
> ACK for the trunk).   Joern  can you post a follow-up manual twiddle so
> that other ports can follow your example and avoid this problem?

The manual... so not in the general web pages, but the stuff under gcc/doc ?
I see that we have a description of scan-assembler* directives in
sourcebuild.texi ,
so I suppose that it should go there.  I suppose the advice should also apply to
scan-assembler-dem(-not), but not to scan-symbol-section .

The more I think about this, the more it feels like we are providing the wrong
tools and then are telling users they're using it incorrectly
(like "You're holding it wrong.").
Quoting dots with \. is not much of an issue, but prepending \t or \m
impairs legibility.  I like the obsoleted word-start/end markers \< / \>
much better, as they don't blend in with text.
^ as start-of-line marker is nice for legibility, but it will generally not
work with common semantics, as it'll be thrown off by white space,
and even more, by labels.

Also, we might have different directives for not scanning in LTO sections -
or just ignoring .ascii .  Or maybe the other way round - you have to do
something special if you want to scan inside strings, and by default we
don't look inside strings?
LTO information uses ascii, and ISTR sometimes also a zero-terminated
variant (asciiz?); There might also some string constant outputs, or stabs
information.
One possible rule I think might work is: if the RE doesn't mention a quote,
don't scan what's quoted inside double quotes.  Although we might to have
to look out for backslash-escaped quotes to find the proper end of a quoted
string.

Or should we instead make assembly scans specific to sections in which
assembly output goes, like text sections?  The danger is that we might miss
a text section by another name.  We can give an error if we find no text
section, but there might be a recognizable text section which is a red
herring besides the one that's hidden by some unusual name.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-09-30 21:12           ` Joern Rennecke
@ 2023-10-11  4:48             ` Joern Rennecke
  2023-10-11  7:12               ` Joern Rennecke
  2023-11-08 15:14               ` Joern Rennecke
  0 siblings, 2 replies; 13+ messages in thread
From: Joern Rennecke @ 2023-10-11  4:48 UTC (permalink / raw)
  To: Jeff Law; +Cc: Vineet Gupta, GCC Patches

On Sat, 30 Sept 2023 at 22:12, Joern Rennecke
<joern.rennecke@embecosm.com> wrote:

> Also, we might have different directives for not scanning in LTO sections -
> or just ignoring .ascii .  Or maybe the other way round - you have to do
> something special if you want to scan inside strings, and by default we
> don't look inside strings?
> LTO information uses ascii, and ISTR sometimes also a zero-terminated
> variant (asciiz?); There might also some string constant outputs, or stabs
> information.
> One possible rule I think might work is: if the RE doesn't mention a quote,
> don't scan what's quoted inside double quotes.  Although we might to have
> to look out for backslash-escaped quotes to find the proper end of a quoted
> string.

I've though about this some more, and we need something that's simple for
dejagnu and simple to describe.

So I propose we look at the first character of the regexp, and if it's neither
^ nor \ (neither caret nor backslash), we consider the regexp un-anchored,
and prepend ^[^"]* , so it won't allow a match after a double quote.
Then document this in sourcebuild.texi, with some mention of lto information
and stabs, and also mentioning that if you really want to match irrespective
of a leading quote, you can prepend ^.* to your regexp.
There are good reasons to be more specific with your regexps in general,
but the matches in LTO are particularily damaging because they appear
semi-random, so often escape a regression test when the test is made,
only to surface during somebody else's regression test.

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-10-11  4:48             ` Joern Rennecke
@ 2023-10-11  7:12               ` Joern Rennecke
  2023-11-08 15:14               ` Joern Rennecke
  1 sibling, 0 replies; 13+ messages in thread
From: Joern Rennecke @ 2023-10-11  7:12 UTC (permalink / raw)
  To: Jeff Law; +Cc: Vineet Gupta, GCC Patches

On Wed, 11 Oct 2023 at 05:48, Joern Rennecke
<joern.rennecke@embecosm.com> wrote:

> So I propose we look at the first character of the regexp, and if it's neither
> ^ nor \ (neither caret nor backslash), we consider the regexp un-anchored,
> and prepend ^[^"]* , so it won't allow a match after a double quote.

Looking at the sources for dg-scan / scan-assembler-times / scan-assembler-dem /
scan-assembler-dem-not, and the tcl regexp command and re_syntax manual
pages, I realise it won't work like that.  The backslash-escaped
characters in the
source file end up just as single characters if enclosed merely with
double quotes,
so "\t" is a single character, although {\t} and {\m} will  be passed
as two characters
to regexp (and "\m" is just an m).

And ^ , by default, matches only the begin of the text, which for the
aforementioned scan-assembler* procs means the entire (demangled for *-dem)
output file.
(The manual is a bit muddled about start of string or start of line,
but a test with
tclsh shows the default is indeed start of string.)
We can make use embedded options to make a prepended string work, i.e.
(?w)^[^"]*?

Although I'm not sure what that'd do on macOS - would the compiler output
contain lines terminated only with \r, and these be invisible to ^ ?
I see that we have a number of scan patterns that start with \n ing++.dg,
so I would hope that we can rely on lines ending with \n .
(\n\r or \r\n are OK for this purpose.)

Incidentally, these patterns should also work  with (?w^[^"]*? prepended,
as a line that ends should also have a start, but it could get a low count for
scan-assembler-times.  There are a number of tests in gcc.target/s390
that have directives starting with: scan-assembler-times {\n\t
which are perfectly anchored, but we might depress the count if we
prepend a pattern that matches the start of the line that has the newline.

We'd also have to make an exception for regexps that start with a parenthesis
to avoid disabling REs with embedded options.

So it seems we have to except patterns starting wit any of:
\\ \t \n (
Maybe we should also add [ to that list, for "[\n\r]" ?

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: committed [RISC-V]: Harden test scan patterns
  2023-10-11  4:48             ` Joern Rennecke
  2023-10-11  7:12               ` Joern Rennecke
@ 2023-11-08 15:14               ` Joern Rennecke
  1 sibling, 0 replies; 13+ messages in thread
From: Joern Rennecke @ 2023-11-08 15:14 UTC (permalink / raw)
  To: Jeff Law; +Cc: Vineet Gupta, GCC Patches

[-- Attachment #1: Type: text/plain, Size: 1406 bytes --]

On Wed, 11 Oct 2023 at 05:48, Joern Rennecke
<joern.rennecke@embecosm.com> wrote:

> I've though about this some more, and we need something that's simple for
> dejagnu and simple to describe.
>
> So I propose we look at the first character of the regexp, and if it's neither
> ^ nor \ (neither caret nor backslash), we consider the regexp un-anchored,
> and prepend ^[^"]* , so it won't allow a match after a double quote.
> Then document this in sourcebuild.texi, with some mention of lto information
> and stabs, and also mentioning that if you really want to match irrespective
> of a leading quote, you can prepend ^.* to your regexp.
> There are good reasons to be more specific with your regexps in general,
> but the matches in LTO are particularily damaging because they appear
> semi-random, so often escape a regression test when the test is made,
> only to surface during somebody else's regression test.

I've tried this, and it turns out that we actually have a lot of tests that scan
after or even inside quotes.  I've adjusted the C part of the
testsuite, and parts
of the c++ testsuite, haven't even looked at fortran regressions, but the thing
gets uncomfortably large.  With so many tests affected, this would also cause
headaches when merging branches.

I've attached the patch to illustrate why it's probably not such a good idea.
I have a different approach now which I'll post next.

[-- Attachment #2: scanasm-diff-4.txt --]
[-- Type: text/plain, Size: 137288 bytes --]

2023-10-11  Joern Rennecke  <joern.rennecke@embecosm.com>

gcc/testsuite/
	* lib/scanasm.exp (scan-assembler-times): If first char of
	pattern hints at a simple pattern, prevent match start after
	double quote on same line.
	(scan-assembler-dem, scan-assembler-dem-not): Likewise.
	(dg-scan): Likewise, if also name starts with scan-assembler.
gcc/
	* doc/sourcebuild.texi (Scan the assembly output): Document change.

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 8bf701461ec..8b0097c399e 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -3277,20 +3277,33 @@ Passes if @var{regexp} does not match text in the file generated by
 @table @code
 @item scan-assembler @var{regex} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} matches text in the test's assembler output.
+Note that the assembly output can contain semi-random strings, e.g. in
+LTO and stabs sections.  If @var{regex} is not specific enough, it
+is bound to result in spurious matches.  Not necessarily when the test
+is originally tried, but more likely later, causing intermittent test
+failures.  To avoid the worst of these issues, if the regexp supplied
+does not start with any of the characters @code{\}, @code{\t}, @code{\n},
+@code{(} nor @code{[}, the string @code{(?w)^[^"]*?} will be prepended
+to the regexp, thus avoiding any match that starts after a double quote
+on a line.
 
 @item scan-assembler-not @var{regex} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} does not match text in the test's assembler output.
+@var{regep} is handled like in @code{scan-assembler}.
 
 @item scan-assembler-times @var{regex} @var{num} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} is matched exactly @var{num} times in the test's
 assembler output.
+@var{regep} is handled like in @code{scan-assembler}.
 
 @item scan-assembler-dem @var{regex} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} matches text in the test's demangled assembler output.
+@var{regep} is handled like in @code{scan-assembler}.
 
 @item scan-assembler-dem-not @var{regex} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} does not match text in the test's demangled assembler
 output.
+@var{regep} is handled like in @code{scan-assembler}.
 
 @item scan-assembler-symbol-section @var{functions} @var{section} [@{ target/xfail @var{selector} @}]
 Passes if @var{functions} are all in @var{section}.  The caller needs to
diff --git a/gcc/testsuite/c-c++-common/ident-1b.c b/gcc/testsuite/c-c++-common/ident-1b.c
index b8b83e64ad2..1f96dbbbbdb 100644
--- a/gcc/testsuite/c-c++-common/ident-1b.c
+++ b/gcc/testsuite/c-c++-common/ident-1b.c
@@ -5,4 +5,4 @@
 /* { dg-require-effective-target ident_directive }*/
 int i;
 
-/* { dg-final { scan-assembler "GCC: " { xfail { { hppa*-*-hpux* && { ! lp64 } } || { powerpc-ibm-aix* || powerpc*-*-darwin* } } } } } */
+/* { dg-final { scan-assembler {"GCC: } { xfail { { hppa*-*-hpux* && { ! lp64 } } || { powerpc-ibm-aix* || powerpc*-*-darwin* } } } } } */
diff --git a/gcc/testsuite/c-c++-common/ident-2b.c b/gcc/testsuite/c-c++-common/ident-2b.c
index 52f0693e164..d488257eca8 100644
--- a/gcc/testsuite/c-c++-common/ident-2b.c
+++ b/gcc/testsuite/c-c++-common/ident-2b.c
@@ -5,4 +5,4 @@
 /* { dg-require-effective-target ident_directive }*/
 int ident;
 
-/* { dg-final { scan-assembler "GCC: " { xfail { { hppa*-*-hpux* && { ! lp64 } } || { powerpc-ibm-aix* || powerpc*-*-darwin* } } } } } */
+/* { dg-final { scan-assembler {"GCC: } { xfail { { hppa*-*-hpux* && { ! lp64 } } || { powerpc-ibm-aix* || powerpc*-*-darwin* } } } } } */
diff --git a/gcc/testsuite/g++.dg/abi/comdat1.C b/gcc/testsuite/g++.dg/abi/comdat1.C
index e1025e357b3..15bd8bc166b 100644
--- a/gcc/testsuite/g++.dg/abi/comdat1.C
+++ b/gcc/testsuite/g++.dg/abi/comdat1.C
@@ -1,10 +1,10 @@
 // PR c++/62302
 
 // { dg-do compile { target *-*-*gnu* } }
-// { dg-final { scan-assembler "_ZN3optIiED5Ev,comdat" } }
-// { dg-final { scan-assembler-not "_ZN3optIiED0Ev,comdat" } }
-// { dg-final { scan-assembler-not "_ZN3optIiED1Ev,comdat" } }
-// { dg-final { scan-assembler-not "_ZN3optIiED2Ev,comdat" } }
+// { dg-final { scan-assembler {.section[^\n]*_ZN3optIiED5Ev,comdat} } }
+// { dg-final { scan-assembler-not {.section[^\n]*_ZN3optIiED0Ev,comdat} } }
+// { dg-final { scan-assembler-not {.section[^\n]*_ZN3optIiED1Ev,comdat} } }
+// { dg-final { scan-assembler-not {.section[^\n]*_ZN3optIiED2Ev,comdat} } }
 
 struct Option {
   virtual ~Option() {}
diff --git a/gcc/testsuite/g++.dg/abi/guard1.C b/gcc/testsuite/g++.dg/abi/guard1.C
index 76b43d30f36..927c6736a05 100644
--- a/gcc/testsuite/g++.dg/abi/guard1.C
+++ b/gcc/testsuite/g++.dg/abi/guard1.C
@@ -1,5 +1,5 @@
 // PR c++/41611
-// { dg-final { scan-assembler-not "_ZGVZN1A1fEvE1i" } }
+// { dg-final { scan-assembler-not "\\_ZGVZN1A1fEvE1i" } }
 
 struct A {
   static int f()
diff --git a/gcc/testsuite/g++.dg/abi/guard2.C b/gcc/testsuite/g++.dg/abi/guard2.C
index 74139a87729..aaf7e9c738f 100644
--- a/gcc/testsuite/g++.dg/abi/guard2.C
+++ b/gcc/testsuite/g++.dg/abi/guard2.C
@@ -1,6 +1,6 @@
 // PR c++/41611
 // Test that the guard gets its own COMDAT group.
-// { dg-final { scan-assembler "_ZGVZN1A1fEvE1i,comdat" { target *-*-linux* *-*-gnu* *-*-uclinux* } } }
+// { dg-final { scan-assembler {\.section[^\n]*_ZGVZN1A1fEvE1i,comdat} { target *-*-linux* *-*-gnu* *-*-uclinux* } } }
 
 struct A {
   static int f()
diff --git a/gcc/testsuite/g++.dg/contracts/contracts12.C b/gcc/testsuite/g++.dg/contracts/contracts12.C
index f888d51296d..0f7de358218 100644
--- a/gcc/testsuite/g++.dg/contracts/contracts12.C
+++ b/gcc/testsuite/g++.dg/contracts/contracts12.C
@@ -3,7 +3,7 @@
 // { dg-do compile }
 // { dg-options "-std=c++2a -fcontracts -fcontract-build-level=default" }
 // { dg-final { scan-assembler-not "audit" } }
-// { dg-final { scan-assembler "default" } }
+// { dg-final { scan-assembler {"default} } }
 
 int main()
 {
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/cdtor-1.C b/gcc/testsuite/g++.dg/debug/dwarf2/cdtor-1.C
index b211c02c894..091398530c1 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/cdtor-1.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/cdtor-1.C
@@ -14,4 +14,4 @@ main()
   K k;
 }
 
-// { dg-final {scan-assembler-times " DW_AT_\[MIPS_\]*linkage_name" 4 } }
+// { dg-final {scan-assembler-times "\\ DW_AT_\[MIPS_\]*linkage_name" 4 } }
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.C b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.C
index 5868ebc9c85..a9fed0626bf 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-any.C
@@ -1,82 +1,82 @@
 // { dg-do compile }
 // { dg-options "-gdwarf-2 -dA -femit-struct-debug-detailed=any -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_ptr_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_ptr_base.*DW_AT_name} } }
 # 1 "fesd-any.C"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.C b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.C
index fe0016a4563..07ef81cdb87 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-baseonly.C
@@ -1,82 +1,82 @@
 // { dg-do compile }
 // { dg-options "-gdwarf-2 -dA -femit-struct-debug-baseonly -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_ptr_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_ptr_base.*DW_AT_name} } }
 # 1 "fesd-baseonly.C"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C
index c5a33967426..51441b03512 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-none.C
@@ -1,82 +1,82 @@
 // { dg-do compile }
 // { dg-options "-gdwarf-2 -dA -femit-struct-debug-detailed=none -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_tmpl_defn_ptr_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_tmpl_defn_ptr_base.*DW_AT_name} } }
 # 1 "fesd-none.C"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C
index ba40f176375..5aebb91f96e 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-reduced.C
@@ -1,82 +1,82 @@
 // { dg-do compile }
 // { dg-options "-gdwarf-2 -dA -femit-struct-debug-reduced -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_tmpl_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_ptr_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_tmpl_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_ptr_base.*DW_AT_name} } }
 # 1 "fesd-reduced.C"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C
index 86eeb21cf10..3f378998a6d 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/fesd-sys.C
@@ -1,82 +1,82 @@
 // { dg-do compile }
 // { dg-options "-gdwarf-2 -dA -femit-struct-debug-detailed=sys -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_tmpl_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_tmpl_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_tmpl_defn_ptr_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_fld_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_decl_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ref_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_tmpl_defn_ptr_head<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_fld_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_var_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_tmpl_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_tmpl_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_decl_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ref_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_tmpl_defn_ptr_base<int>.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_tmpl_defn_ptr_base.*DW_AT_name} } }
 # 1 "fesd-sys.C"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-1.C b/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-1.C
index bfdb4f8f5a0..b9f57fbacb6 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-1.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-1.C
@@ -14,4 +14,4 @@ func ()
   return var2;
 }
 
-// { dg-final { scan-assembler-times "var2\[^\n\r\]*DW_AT_name" 1 } }
+// { dg-final { scan-assembler-times {"var2[^\n\r]*DW_AT_name} 1 } }
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/local-var-in-contructor.C b/gcc/testsuite/g++.dg/debug/dwarf2/local-var-in-contructor.C
index fafff62eab6..bc75d76d773 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/local-var-in-contructor.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/local-var-in-contructor.C
@@ -2,7 +2,7 @@
 // Origin PR27574
 // { dg-do compile }
 // { dg-options "-O0 -gdwarf-2" }
-// { dg-final { scan-assembler "problem" } }
+// { dg-final { scan-assembler {"problem} } }
 
 void f (int *)
 {
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/localclass1.C b/gcc/testsuite/g++.dg/debug/dwarf2/localclass1.C
index 6eb87bb9f01..7e7924b1bcb 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/localclass1.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/localclass1.C
@@ -55,22 +55,22 @@ main ()
   return foo (1) - 10;
 }
 
-// { dg-final { scan-assembler "main\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "foo\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn2\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn3\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn4\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "staticfn5\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "staticfn6\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "method1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg2\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg3\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg4\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg5\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg6\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg7\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg8\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "localstruct1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "localstruct2\[^\n\r\]*DW_AT_name" } }
+// { dg-final { scan-assembler {"main[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"foo[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn2[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn3[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn4[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"staticfn5[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"staticfn6[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"method1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg2[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg3[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg4[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg5[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg6[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg7[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg8[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"localstruct1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"localstruct2[^\n\r]*DW_AT_name} } }
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/localclass2.C b/gcc/testsuite/g++.dg/debug/dwarf2/localclass2.C
index 475f02b5604..da7aad1814e 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/localclass2.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/localclass2.C
@@ -55,22 +55,22 @@ main ()
   return foo (1) - 10;
 }
 
-// { dg-final { scan-assembler "main\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "foo\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn2\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn3\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "staticfn4\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "staticfn5\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "staticfn6\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "method1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg2\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "arg3\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg4\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg5\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg6\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg7\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "arg8\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler "localstruct1\[^\n\r\]*DW_AT_name" } }
-// { dg-final { scan-assembler-not "localstruct2\[^\n\r\]*DW_AT_name" } }
+// { dg-final { scan-assembler {"main[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"foo[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn2[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn3[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"staticfn4[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"staticfn5[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"staticfn6[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"method1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg2[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"arg3[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg4[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg5[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg6[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg7[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"arg8[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler {"localstruct1[^\n\r]*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"localstruct2[^\n\r]*DW_AT_name} } }
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-1.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-1.C
index 3556231edd2..9c5d88841f5 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-1.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-1.C
@@ -3,7 +3,7 @@
 // { dg-options "-gdwarf-2 -dA" }
 // { dg-do compile }
 // { dg-final { scan-assembler "DW_TAG_template_type_param" } }
-// { dg-final { scan-assembler "U\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"U[^\n\r]* DW_AT_name} } }
 
 template <class U>
 U
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-3.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-3.C
index d806104e54a..d1e8a45c519 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-3.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-3.C
@@ -2,7 +2,7 @@
 // Origin PR debug/30161
 // { dg-options "-gdwarf-2 -dA -gno-strict-dwarf -fno-merge-debug-strings" }
 // { dg-final { scan-assembler "DW_TAG_template_value_param" } }
-// { dg-final { scan-assembler "f\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"f[^\n\r]* DW_AT_name} } }
 // { dg-final { scan-assembler "DW_AT_location\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*DW_OP_addr\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*_Z4blehv\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*DW_OP_stack_value" } } */
 
 typedef void (*func_ptr)();
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-5.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-5.C
index cb3a73fa220..ad49f5f843a 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-5.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-func-params-5.C
@@ -2,7 +2,7 @@
 // Origin PR debug/30161
 // { dg-options "-gdwarf-2 -dA" }
 // { dg-final { scan-assembler "DW_TAG_template_type_param" } }
-// { dg-final { scan-assembler "T\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"T[^\n\r]* DW_AT_name} } }
 
 template <class T>
 struct vector
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-1.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-1.C
index 21c71ec0624..82dbec1d449 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-1.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-1.C
@@ -3,7 +3,7 @@
 // { dg-options "-gdwarf-2 -dA" }
 // { dg-do compile }
 // { dg-final { scan-assembler "DW_TAG_template_type_param" } }
-// { dg-final { scan-assembler "U\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"U[^\n\r]* DW_AT_name} } }
 
 template <class U>
 class A
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-13.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-13.C
index f32ac1711ec..32bfa37c300 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-13.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-13.C
@@ -1,7 +1,7 @@
 // { dg-options "-gdwarf-2 -dA" }
 // { dg-do compile }
 // { dg-final { scan-assembler "DW_TAG_template_value_param" } }
-// { dg-final { scan-assembler "N\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"N[^\n\r]* DW_AT_name} } }
 // { dg-final { scan-assembler "9\[^\n\r]* DW_AT_const_value" } }
 
 template <int N> class C {};
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-3.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-3.C
index 7a9af770120..d34188e3970 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-3.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-3.C
@@ -2,7 +2,7 @@
 // Origin PR debug/30161
 // { dg-options "-gdwarf-2 -dA -gno-strict-dwarf -fno-merge-debug-strings" }
 // { dg-final { scan-assembler "DW_TAG_template_value_param" } }
-// { dg-final { scan-assembler "f\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"f[^\n\r]* DW_AT_name} } }
 // { dg-final { scan-assembler "DW_AT_location\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*DW_OP_addr\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*_Z4blehv\[^\\r\\n\]*\[\\r\\n\]*\[^\\r\\n\]*DW_OP_stack_value" } } */
 
 typedef void (*func_ptr) ();
diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-5.C b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-5.C
index ed08122bebc..19a9d17a4d3 100644
--- a/gcc/testsuite/g++.dg/debug/dwarf2/template-params-5.C
+++ b/gcc/testsuite/g++.dg/debug/dwarf2/template-params-5.C
@@ -2,7 +2,7 @@
 // Origin PR debug/30161
 // { dg-options "-gdwarf-2 -dA" }
 // { dg-final { scan-assembler "DW_TAG_template_type_param" } }
-// { dg-final { scan-assembler "T\[^\n\r]* DW_AT_name" } }
+// { dg-final { scan-assembler {"T[^\n\r]* DW_AT_name} } }
 
 template <class T>
 struct vector
diff --git a/gcc/testsuite/g++.dg/debug/enum-1.C b/gcc/testsuite/g++.dg/debug/enum-1.C
index 32124c15355..8fab494d816 100644
--- a/gcc/testsuite/g++.dg/debug/enum-1.C
+++ b/gcc/testsuite/g++.dg/debug/enum-1.C
@@ -1,7 +1,7 @@
 /* Verify that used enums are output.  */
 /* { dg-do compile } */
 /* { dg-additional-options "-fno-eliminate-unused-debug-symbols" { target powerpc-ibm-aix* } } */
-/* { dg-final { scan-assembler "JTI_MAX" } } */
+/* { dg-final { scan-assembler {"JTI_MAX} } } */
 
 int var;
 
diff --git a/gcc/testsuite/g++.dg/debug/enum-2.C b/gcc/testsuite/g++.dg/debug/enum-2.C
index 554de37c40a..b59ddac417b 100644
--- a/gcc/testsuite/g++.dg/debug/enum-2.C
+++ b/gcc/testsuite/g++.dg/debug/enum-2.C
@@ -1,7 +1,7 @@
 /* Verify that used enums are output.  */
 /* { dg-do compile } */
 /* { dg-options "-fno-eliminate-unused-debug-symbols" } */
-/* { dg-final { scan-assembler "JTI_MAX" } } */
+/* { dg-final { scan-assembler {"JTI_MAX} } } */
 
 int var;
 
diff --git a/gcc/testsuite/g++.dg/ext/pretty1.C b/gcc/testsuite/g++.dg/ext/pretty1.C
index 06608ae30eb..201d7946b41 100644
--- a/gcc/testsuite/g++.dg/ext/pretty1.C
+++ b/gcc/testsuite/g++.dg/ext/pretty1.C
@@ -60,8 +60,8 @@ __assert_fail (const char *cond, const char *file, unsigned int line,
   abort ();
 }
 
-// { dg-final { scan-assembler "int bar\\(T\\).*with T = int" } }
-// { dg-final { scan-assembler "top level" } }
-// { dg-final { scan-assembler "int main\\(\\)" } }
-// { dg-final { scan-assembler "int bar\\(T\\).*with T = double" } }
-// { dg-final { scan-assembler "int bar\\(T\\).*with T = unsigned char\*" } }
+// { dg-final { scan-assembler {"int bar\(T\).*with T = int} } }
+// { dg-final { scan-assembler {"top level} } }
+// { dg-final { scan-assembler {"int main\(\)} } }
+// { dg-final { scan-assembler {"int bar\(T\).*with T = double} } }
+// { dg-final { scan-assembler {"int bar\(T\).*with T = unsigned char\*} } }
diff --git a/gcc/testsuite/g++.dg/ext/pretty3.C b/gcc/testsuite/g++.dg/ext/pretty3.C
index 01b14579af2..c04d751e2d0 100644
--- a/gcc/testsuite/g++.dg/ext/pretty3.C
+++ b/gcc/testsuite/g++.dg/ext/pretty3.C
@@ -16,4 +16,4 @@ int main ()
 {
   printf ("%s\n", D<int>().foo (0));
 }
-// { dg-final { scan-assembler "const char\\* D<U>::foo\\(typename B<U>::X\\)" } }
+// { dg-final { scan-assembler {"const char\* D<U>::foo\(typename B<U>::X\)} } }
diff --git a/gcc/testsuite/g++.dg/other/unused1.C b/gcc/testsuite/g++.dg/other/unused1.C
index 77625d080f8..8fcdb9574cd 100644
--- a/gcc/testsuite/g++.dg/other/unused1.C
+++ b/gcc/testsuite/g++.dg/other/unused1.C
@@ -41,9 +41,9 @@ int bar5 (void)
   else
     return 6;
 }
-/* { dg-final { scan-assembler "foo" } } */
-/* { dg-final { scan-assembler "boo" } } */
-/* { dg-final { scan-assembler "cue" } } */
+/* { dg-final { scan-assembler {"foo} } } */
+/* { dg-final { scan-assembler {"boo} } } */
+/* { dg-final { scan-assembler {"cue} } } */
 /* The xfail below is for PR33429.  */
 /* { dg-final { scan-assembler "(string|ascii?)z?\[\t \]\"class2(\"|\\\\0)" { xfail *-*-* } } } */
 /* { dg-final { scan-assembler "(string|ascii?)z?\[\t \]\"printer(\"|\\\\0)" } } */
diff --git a/gcc/testsuite/g++.dg/pr44486.C b/gcc/testsuite/g++.dg/pr44486.C
index 01e84289f0b..3fd301d5369 100644
--- a/gcc/testsuite/g++.dg/pr44486.C
+++ b/gcc/testsuite/g++.dg/pr44486.C
@@ -7,4 +7,4 @@ namespace { S f() { const char * s = __PRETTY_FUNCTION__; return S(); } }
 
 int main() { f(); }
 
-// { dg-final { scan-assembler "S \{anonymous\}::f" } }
+// { dg-final { scan-assembler {"S \{anonymous\}::f} } }
diff --git a/gcc/testsuite/gcc.dg/20060410.c b/gcc/testsuite/gcc.dg/20060410.c
index b4d00cb991d..9d7e7ed8ec1 100644
--- a/gcc/testsuite/gcc.dg/20060410.c
+++ b/gcc/testsuite/gcc.dg/20060410.c
@@ -13,4 +13,4 @@ int bar (void)
     return ((struct foo *)0x1234)->i;
 }
 
-/* { dg-final { scan-assembler "foo" { xfail nvptx-*-* } } } */
+/* { dg-final { scan-assembler {"foo} { xfail nvptx-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/const-elim-2.c b/gcc/testsuite/gcc.dg/const-elim-2.c
index bc465cabaca..3d85e661a4e 100644
--- a/gcc/testsuite/gcc.dg/const-elim-2.c
+++ b/gcc/testsuite/gcc.dg/const-elim-2.c
@@ -1,7 +1,7 @@
 /* The string constant in this test case should be emitted exactly once.  */
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
-/* { dg-final { scan-assembler-times "hi there" 1 { xfail nvptx-*-* pdp11-*-* } } } */
+/* { dg-final { scan-assembler-times {"hi there} 1 { xfail nvptx-*-* pdp11-*-* } } } */
 
 static inline int returns_23() { return 23; }
 
diff --git a/gcc/testsuite/gcc.dg/cpp/pr34692.c b/gcc/testsuite/gcc.dg/cpp/pr34692.c
index bcb0ca33d24..4359b2008b3 100644
--- a/gcc/testsuite/gcc.dg/cpp/pr34692.c
+++ b/gcc/testsuite/gcc.dg/cpp/pr34692.c
@@ -6,7 +6,7 @@
 /* { dg-final { scan-hidden "varb" } } */
 /* { dg-final { scan-hidden "varc" } } */
 /* { dg-final { scan-hidden "vard" } } */
-/* { dg-final { scan-assembler "a b cde f g h" } } */
+/* { dg-final { scan-assembler {"a b cde f g h} } } */
 
 #define FOO(y, x) y #x
 #define BAR(x) x
diff --git a/gcc/testsuite/gcc.dg/debug/debug-1.c b/gcc/testsuite/gcc.dg/debug/debug-1.c
index d849527d211..1e5f1273694 100644
--- a/gcc/testsuite/gcc.dg/debug/debug-1.c
+++ b/gcc/testsuite/gcc.dg/debug/debug-1.c
@@ -21,7 +21,7 @@
 
    Similar for MMIX, with the payload insns being "LDO $0,p; ZSNZ $0,$0,2".  */
 /* { dg-options "-dA -fno-if-conversion" { target mips*-*-* mmix-knuth-mmixware } } */
-/* { dg-final { scan-assembler "xyzzy" } } */
+/* { dg-final { scan-assembler {"xyzzy} } } */
 
 long p;
 
diff --git a/gcc/testsuite/gcc.dg/debug/debug-2.c b/gcc/testsuite/gcc.dg/debug/debug-2.c
index ed69994df55..11bbceb59b7 100644
--- a/gcc/testsuite/gcc.dg/debug/debug-2.c
+++ b/gcc/testsuite/gcc.dg/debug/debug-2.c
@@ -3,7 +3,7 @@
 /* { dg-options "-dA" } */
 /* See the comment in debug-1.c.  */
 /* { dg-options "-dA -fno-if-conversion" { target mips*-*-* mmix-knuth-mmixware } } */
-/* { dg-final { scan-assembler "xyzzy" } } */
+/* { dg-final { scan-assembler {"xyzzy} } } */
 
 long p;
 
diff --git a/gcc/testsuite/gcc.dg/debug/debug-6.c b/gcc/testsuite/gcc.dg/debug/debug-6.c
index 4fe680df0b6..a19734d199c 100644
--- a/gcc/testsuite/gcc.dg/debug/debug-6.c
+++ b/gcc/testsuite/gcc.dg/debug/debug-6.c
@@ -1,7 +1,7 @@
 /* Verify that bb-reorder re-inserts nested scopes properly.  */
 /* { dg-do compile } */
 /* { dg-options "-dA" } */
-/* { dg-final { scan-assembler "xyzzy" } } */
+/* { dg-final { scan-assembler {"xyzzy} } } */
 
 extern void abort (void);
 
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-merge.c b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-merge.c
index 15e09b116cc..ec5d3773470 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-merge.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-merge.c
@@ -3,7 +3,7 @@
 /* { dg-require-effective-target string_merging } */
 /* { dg-options "-O2 -gdwarf -dA" } */
 /* { dg-final { scan-assembler "DW_AT_producer: \"GNU C" } } */
-/* { dg-final { scan-assembler-not "GNU C\[^\\n\\r\]*DW_AT_producer" } } */
+/* { dg-final { scan-assembler-not "()GNU C\[^\\n\\r\]*DW_AT_producer" } } */
 
 void func (void)
 {
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c
index 4062268e54c..d2c9044ca8e 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-any.c
@@ -1,48 +1,48 @@
 // { dg-do compile }
 // { dg-options "-gdwarf -dA -femit-struct-debug-detailed=any -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
 # 1 "fesd-any.c"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c
index fffdf04cfb6..9b4bd079fee 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-baseonly.c
@@ -1,48 +1,48 @@
 // { dg-do compile }
 // { dg-options "-gdwarf -dA -femit-struct-debug-baseonly -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
 # 1 "fesd-baseonly.c"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c
index 6fba51287ef..852aa8b661b 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-none.c
@@ -1,48 +1,48 @@
 // { dg-do compile }
 // { dg-options "-gdwarf -dA -femit-struct-debug-detailed=none -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
 # 1 "fesd-none.c"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c
index 4209e30e3f9..8d6dd30dac3 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-reduced.c
@@ -1,48 +1,48 @@
 // { dg-do compile }
 // { dg-options "-gdwarf -dA -femit-struct-debug-reduced -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
 # 1 "fesd-reduced.c"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c
index 9c100d7cf91..aa9779ac3fd 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/fesd-sys.c
@@ -1,48 +1,48 @@
 // { dg-do compile }
 // { dg-options "-gdwarf -dA -femit-struct-debug-detailed=sys -fno-eliminate-unused-debug-symbols" }
-// { dg-final { scan-assembler "timespec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_sec.*DW_AT_name" } }
-// { dg-final { scan-assembler "tv_nsec.*DW_AT_name" } }
-// { dg-final { scan-assembler "itimerspec.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_interval.*DW_AT_name" } }
-// { dg-final { scan-assembler "it_value.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_head.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_head_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "gstruct_head_ordy_decl_ref_head.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler-not "field_head_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_ptr_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field_base_ordy_defn_fld_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_defn_var_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field1_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_inc.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ref.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_ptr.*DW_AT_name" } }
-// { dg-final { scan-assembler "field2_base_ordy_defn_var_base_fld.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_head_ordy_decl_ref_base.*DW_AT_name" } }
-// { dg-final { scan-assembler "gstruct_base_ordy_decl_ref_base.*DW_AT_name" } }
+// { dg-final { scan-assembler {"timespec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_sec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"tv_nsec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"itimerspec.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_interval.*DW_AT_name} } }
+// { dg-final { scan-assembler {"it_value.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_head.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_head_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"gstruct_head_ordy_decl_ref_head.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler-not {"field_head_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_ptr_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field_base_ordy_defn_fld_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_defn_var_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field1_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_inc.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ref.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_ptr.*DW_AT_name} } }
+// { dg-final { scan-assembler {"field2_base_ordy_defn_var_base_fld.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_head_ordy_decl_ref_base.*DW_AT_name} } }
+// { dg-final { scan-assembler {"gstruct_base_ordy_decl_ref_base.*DW_AT_name} } }
 # 1 "fesd-sys.c"
 # 1 "<built-in>"
 # 1 "<command-line>"
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr31230.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr31230.c
index 36d55bf30fd..936f93fdc19 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/pr31230.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr31230.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-gdwarf -dA --param ggc-min-expand=0 --param ggc-min-heapsize=0" } */
-/* { dg-final { scan-assembler-times "DIE.*DW_TAG_array_type" 1  } } */
-/* { dg-final { scan-assembler-times "DIE.*DW_TAG_subrange_type" 1  } } */
+/* { dg-final { scan-assembler-times {DIE[^\n]*DW_TAG_array_type} 1  } } */
+/* { dg-final { scan-assembler-times {DIE[^\n]*DW_TAG_subrange_type} 1  } } */
 
 void f1 (void)
 {
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
index 4fd8b74f329..4e19fe04da8 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
@@ -8,4 +8,4 @@ foo (const char *format, ...)
 {
 }
 
-// { dg-final { scan-assembler-times "DIE.*DW_TAG_unspecified_parameters" 1 } }
+// { dg-final { scan-assembler-times {DIE[^\n]*DW_TAG_unspecified_parameters} 1 } }
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-1.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-1.c
index a9c0efb3fa8..381ac46f641 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-1.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-1.c
@@ -14,4 +14,4 @@ int main()
    unusedbar.  */
 /* { dg-final { scan-assembler-times "DW_TAG_subprogram" 4 } } */
 /* { dg-final { scan-assembler-times "DW_TAG_formal_parameter" 2 } } */
-/* { dg-final { scan-assembler-not "unusedbar" } } */
+/* { dg-final { scan-assembler-not {"unusedbar} } } */
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-2.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-2.c
index c3a710e2f89..b91dea79f03 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-2.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr96383-2.c
@@ -14,4 +14,4 @@ int main()
    unusedbar.  */
 /* { dg-final { scan-assembler-times "DW_TAG_subprogram" 4 } } */
 /* { dg-final { scan-assembler-times "DW_TAG_formal_parameter" 2 } } */
-/* { dg-final { scan-assembler-not "unusedbar" } } */
+/* { dg-final { scan-assembler-not {"unusedbar} } } */
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c b/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
index 19457173eb3..d10da077830 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
@@ -5,7 +5,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -gdwarf -dA -fno-merge-debug-strings -fdebug-prefix-map=a=b" } */
 /* { dg-final { scan-assembler "\"GNU C\[^\\n\\r\]+ DW_AT_producer" } } */
-/* { dg-final { scan-assembler-not "debug-prefix-map" } } */
+/* { dg-final { scan-assembler-not "()debug-prefix-map" } } */
 
 void func (void)
 {
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/static1.c b/gcc/testsuite/gcc.dg/debug/dwarf2/static1.c
index bdc118ddcec..a6919e812cd 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/static1.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/static1.c
@@ -5,4 +5,4 @@ main(void)
 {
  static int unused_local_var;
 }
-/* { dg-final { scan-assembler "unused_local_var" } } */
+/* { dg-final { scan-assembler {"unused_local_var"} } } */
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/var1.c b/gcc/testsuite/gcc.dg/debug/dwarf2/var1.c
index 297d244e2cc..0a81d297547 100644
--- a/gcc/testsuite/gcc.dg/debug/dwarf2/var1.c
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/var1.c
@@ -1,7 +1,7 @@
 /* PR 23190 */
 /* { dg-do compile }
 /* { dg-options "-gdwarf -dA -fno-merge-debug-strings" } */
-/* { dg-final { scan-assembler "xyzzy\[^\\n\\r\]+DW_AT_name" } } */
+/* { dg-final { scan-assembler {"xyzzy[^\n\r]+DW_AT_name} } } */
 
 void f(void)
 {
diff --git a/gcc/testsuite/gcc.dg/debug/enum-1.c b/gcc/testsuite/gcc.dg/debug/enum-1.c
index 32124c15355..8fab494d816 100644
--- a/gcc/testsuite/gcc.dg/debug/enum-1.c
+++ b/gcc/testsuite/gcc.dg/debug/enum-1.c
@@ -1,7 +1,7 @@
 /* Verify that used enums are output.  */
 /* { dg-do compile } */
 /* { dg-additional-options "-fno-eliminate-unused-debug-symbols" { target powerpc-ibm-aix* } } */
-/* { dg-final { scan-assembler "JTI_MAX" } } */
+/* { dg-final { scan-assembler {"JTI_MAX} } } */
 
 int var;
 
diff --git a/gcc/testsuite/gcc.dg/pr28755.c b/gcc/testsuite/gcc.dg/pr28755.c
index 50b56fb8907..918085829d4 100644
--- a/gcc/testsuite/gcc.dg/pr28755.c
+++ b/gcc/testsuite/gcc.dg/pr28755.c
@@ -2,7 +2,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target ptr32plus } */
 /* { dg-options "-Os" } */
-/* { dg-final { scan-assembler-times "2112543726\|7deadbee" 2 } } */
+/* { dg-final { scan-assembler-times {"2112543726\|7deadbee} 2 } } */
 /* { dg-skip-if "integer output is different here" { nvptx-*-* } } */
 
 struct S
diff --git a/gcc/testsuite/gcc.dg/pr87314-1.c b/gcc/testsuite/gcc.dg/pr87314-1.c
index 0cb9c07e32c..13170afeccc 100644
--- a/gcc/testsuite/gcc.dg/pr87314-1.c
+++ b/gcc/testsuite/gcc.dg/pr87314-1.c
@@ -8,6 +8,6 @@ int h() { return "bye"=="helloooobye"+8; }
 /* { dg-final { scan-tree-dump-times "hello" 1 "original" } } */
 /* The test in h() should be retained because the result depends on
    string merging.  */
-/* { dg-final { scan-assembler "hellooo" { target { ! nvptx*-*-* } } } } */
+/* { dg-final { scan-assembler {"hellooo} { target { ! nvptx*-*-* } } } } */
 /* { dg-final { scan-assembler "104, 101, 108, 108, 111, 111, 111" { target { nvptx*-*-* } } } } */
 
diff --git a/gcc/testsuite/gcc.dg/torture/pr36400.c b/gcc/testsuite/gcc.dg/torture/pr36400.c
index 8d21ef84791..3a888c5a1f1 100644
--- a/gcc/testsuite/gcc.dg/torture/pr36400.c
+++ b/gcc/testsuite/gcc.dg/torture/pr36400.c
@@ -14,4 +14,4 @@ void baz()
   barptr->some_string = "Everything OK";
 }
 
-/* { dg-final { scan-assembler "Everything OK" { xfail nvptx-*-* pdp11-*-* } } } */
+/* { dg-final { scan-assembler {"Everything OK} { xfail nvptx-*-* pdp11-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/unused-5.c b/gcc/testsuite/gcc.dg/unused-5.c
index bdd5c8ecd47..3ff8d41a710 100644
--- a/gcc/testsuite/gcc.dg/unused-5.c
+++ b/gcc/testsuite/gcc.dg/unused-5.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-Wunused" } */
-/* { dg-final { scan-assembler "string_to_look_for" } } */
+/* { dg-final { scan-assembler {"string_to_look_for} } } */
 /* nvptx outputs strings as array of ints.  */
 /* { dg-skip-if "" { nvptx-*-* } } */
 
diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
index 5df80325dff..2770ef8c54d 100644
--- a/gcc/testsuite/lib/scanasm.exp
+++ b/gcc/testsuite/lib/scanasm.exp
@@ -65,6 +65,12 @@ proc dg-scan { name positive testcase output_file orig_args } {
 
     set pattern [lindex $orig_args 0]
     set printable_pattern [make_pattern_printable $pattern]
+    # Avoid matches in lto sections or stabs with simple patterns like "sr" .
+    if { [string first [string index $pattern  0] "\\\t\n(\["] < 0 
+         && [string compare -length 14 $name scan-assembler] == 0 } {
+      set pattern "(?w)^\[^\"]*?$pattern"
+    }
+
 
     set files [dg_glob_remote $output_file]
     if { $files == "" } {
@@ -473,6 +479,10 @@ proc scan-assembler-times { args } {
     set pattern [lindex $args 0]
     set times [lindex $args 1]
     set pp_pattern [make_pattern_printable $pattern]
+    # Avoid matches in lto sections or stabs with simple patterns like "sr" .
+    if { [string first [string index $pattern  0] "\\\t\n(\["] < 0 } {
+      set pattern "(?w)^\[^\"]*?$pattern"
+    }
 
     # This must match the rule in gcc-dg.exp.
     set output_file "[file rootname [file tail $filename]].s"
@@ -537,6 +547,10 @@ proc scan-assembler-dem { args } {
     set filename [lindex $testcase 0]
     set pattern [lindex $args 0]
     set pp_pattern [make_pattern_printable $pattern]
+    # Avoid matches in lto sections or stabs with simple patterns like "sr" .
+    if { [string first [string index $pattern  0] "\\\t\n(\["] < 0 } {
+      set pattern "(?w)^\[^\"]*?$pattern"
+    }
     set output_file "[file rootname [file tail $filename]].s"
 
     set files [glob -nocomplain $output_file]
@@ -593,6 +607,10 @@ proc scan-assembler-dem-not { args } {
     set filename [lindex $testcase 0]
     set pattern [lindex $args 0]
     set pp_pattern [make_pattern_printable $pattern]
+    # Avoid matches in lto sections or stabs with simple patterns like "sr" .
+    if { [string first [string index $pattern  0] "\\\t\n(\["] < 0 } {
+      set pattern "(?w)^\[^\"]*?$pattern"
+    }
     set output_file "[file rootname [file tail $filename]].s"
 
     set files [glob -nocomplain $output_file]

^ permalink raw reply	[flat|nested] 13+ messages in thread

* RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)
  2023-09-29 13:54         ` Jeff Law
  2023-09-30 21:12           ` Joern Rennecke
@ 2023-11-08 16:00           ` Joern Rennecke
  2023-11-10  6:02             ` Jeff Law
  1 sibling, 1 reply; 13+ messages in thread
From: Joern Rennecke @ 2023-11-08 16:00 UTC (permalink / raw)
  To: Jeff Law; +Cc: Vineet Gupta, GCC Patches

[-- Attachment #1: Type: text/plain, Size: 677 bytes --]

On Fri, 29 Sept 2023 at 14:54, Jeff Law <jeffreyalaw@gmail.com> wrote:
> ...  Joern  can you post a follow-up manual twiddle so
> that other ports can follow your example and avoid this problem?
>
> THanks,
>
> jeff

The attached patch makes the scan-assembler* directives ignore the LTO
sections.

Regression tested (using QEMU) for
    riscv-sim
    riscv-sim/-march=rv32gcv_zfh/-mabi=ilp32d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
    riscv-sim/-march=rv32imac/-mabi=ilp32
    riscv-sim/-march=rv64gcv_zfh_zvfh_zba_zbb_zbc_zicond_zicboz_zawrs/-mabi=lp64d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
    riscv-sim/-march=rv64imac/-mabi=lp64

[-- Attachment #2: scanasm-diff-5.txt --]
[-- Type: text/plain, Size: 5605 bytes --]

2023-11-08  Joern Rennecke  <joern.rennecke@embecosm.com>

gcc/testsuite/
	* lib/scanasm.exp (scan-assembler-times): Disregard LTO sections.
	(scan-assembler-dem, scan-assembler-dem-not): Likewise.
	(dg-scan): Likewise, if name starts with scan-assembler.
	(scan-raw-assembler): New proc.
	* gcc.dg/pr61868.c: Use scan-raw-assembler.
	* gcc.dg/scantest-lto.c: New test.
gcc/
	* doc/sourcebuild.texi (Scan the assembly output): Document change.

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 8bf701461ec..5a34a10e6c2 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -3276,21 +3276,28 @@ Passes if @var{regexp} does not match text in the file generated by
 
 @table @code
 @item scan-assembler @var{regex} [@{ target/xfail @var{selector} @}]
-Passes if @var{regex} matches text in the test's assembler output.
+Passes if @var{regex} matches text in the test's assembler output,
+excluding LTO sections.
+
+@item scan-raw-assembler @var{regex} [@{ target/xfail @var{selector} @}]
+Passes if @var{regex} matches text in the test's assembler output,
+including LTO sections.
 
 @item scan-assembler-not @var{regex} [@{ target/xfail @var{selector} @}]
-Passes if @var{regex} does not match text in the test's assembler output.
+Passes if @var{regex} does not match text in the test's assembler output,
+excluding LTO sections.
 
 @item scan-assembler-times @var{regex} @var{num} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} is matched exactly @var{num} times in the test's
-assembler output.
+assembler output, excluding LTO sections.
 
 @item scan-assembler-dem @var{regex} [@{ target/xfail @var{selector} @}]
-Passes if @var{regex} matches text in the test's demangled assembler output.
+Passes if @var{regex} matches text in the test's demangled assembler output,
+excluding LTO sections.
 
 @item scan-assembler-dem-not @var{regex} [@{ target/xfail @var{selector} @}]
 Passes if @var{regex} does not match text in the test's demangled assembler
-output.
+output, excluding LTO sections.
 
 @item scan-assembler-symbol-section @var{functions} @var{section} [@{ target/xfail @var{selector} @}]
 Passes if @var{functions} are all in @var{section}.  The caller needs to
diff --git a/gcc/testsuite/gcc.dg/pr61868.c b/gcc/testsuite/gcc.dg/pr61868.c
index 4a7e8f6ae2d..52ab7838643 100644
--- a/gcc/testsuite/gcc.dg/pr61868.c
+++ b/gcc/testsuite/gcc.dg/pr61868.c
@@ -7,4 +7,4 @@ int main ()
   foo (100);
   return 0;
 }
-/* { dg-final { scan-assembler "\.gnu\.lto.*.12345" } } */
+/* { dg-final { scan-raw-assembler "\.gnu\.lto.*.12345" } } */
diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
index 5df80325dff..16b5198d38b 100644
--- a/gcc/testsuite/lib/scanasm.exp
+++ b/gcc/testsuite/lib/scanasm.exp
@@ -79,6 +79,12 @@ proc dg-scan { name positive testcase output_file orig_args } {
     }
     set text [read $fd]
     close $fd
+    if { [string compare -length 14 $name scan-assembler] == 0 } {
+      # Remove LTO sections.
+      # ??? Somehow, .*? is still greedy.
+      # regsub -all {(^|\n)[[:space:]]*\.section[[:space:]]*\.gnu\.lto_.*?\n(?=[[:space:]]*\.text\n)} $text {\1} text
+      regsub -all {(^|\n)[[:space:]]*\.section[[:space:]]*\.gnu\.lto_(?:[^\n]*\n(?![[:space:]]*\.(section|text|data|bss)))*[^\n]*\n} $text {\1} text
+    }
 
     set match [regexp -- $pattern $text]
     if { $match == $positive } {
@@ -108,6 +114,16 @@ proc scan-assembler { args } {
 
 set_required_options_for scan-assembler
 
+proc scan-raw-assembler { args } {
+    set testcase [testname-for-summary]
+    # The name might include a list of options; extract the file name.
+    set filename [lindex $testcase 0]
+    set output_file "[file rootname [file tail $filename]].s"
+    dg-scan "scan-raw-assembler" 1 $testcase $output_file $args
+}
+
+set_required_options_for scan-raw-assembler
+
 # Check that a pattern is not present in the .s file produced by the
 # compiler.  See dg-scan for details.
 
@@ -487,6 +503,7 @@ proc scan-assembler-times { args } {
     set fd [open $output_file r]
     set text [read $fd]
     close $fd
+    regsub -all {(^|\n)[[:space:]]*\.section[[:space:]]*\.gnu\.lto_(?:[^\n]*\n(?![[:space:]]*\.(section|text|data|bss)))*[^\n]*\n} $text {\1} text
 
     set result_count [llength [regexp -inline -all -- $pattern $text]]
     if {$result_count == $times} {
@@ -548,6 +565,7 @@ proc scan-assembler-dem { args } {
 
     set output [remote_exec host "$cxxfilt" "" "$output_file"]
     set text [lindex $output 1]
+    regsub -all {(^|\n)[[:space:]]*\.section[[:space:]]*\.gnu\.lto_(?:[^\n]*\n(?![[:space:]]*\.(section|text|data|bss)))*[^\n]*\n} $text {\1} text
 
     if [regexp -- $pattern $text] {
 	pass "$testcase scan-assembler-dem $pp_pattern"
@@ -604,6 +622,7 @@ proc scan-assembler-dem-not { args } {
 
     set output [remote_exec host "$cxxfilt" "" "$output_file"]
     set text [lindex $output 1]
+    regsub -all {(^|\n)[[:space:]]*\.section[[:space:]]*\.gnu\.lto_(?:[^\n]*\n(?![[:space:]]*\.(section|text|data|bss)))*[^\n]*\n} $text {\1} text
 
     if ![regexp -- $pattern $text] {
 	pass "$testcase scan-assembler-dem-not $pp_pattern"
diff --git a/gcc/testsuite/gcc.dg/scantest-lto.c b/gcc/testsuite/gcc.dg/scantest-lto.c
new file mode 100644
index 00000000000..5f8abaf77f3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/scantest-lto.c
@@ -0,0 +1,9 @@
+/* { dg-options "-O2 -flto" } */
+
+void foo ()
+{
+}
+
+/* Check that scan-assembler* directives skip the LTO section.  */
+/* { dg-final { scan-assembler-not "ascii" } } */
+/* { dg-final { scan-assembler-times "ascii" 0 } } */

^ permalink raw reply	[flat|nested] 13+ messages in thread

* Re: RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns)
  2023-11-08 16:00           ` RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns) Joern Rennecke
@ 2023-11-10  6:02             ` Jeff Law
  0 siblings, 0 replies; 13+ messages in thread
From: Jeff Law @ 2023-11-10  6:02 UTC (permalink / raw)
  To: Joern Rennecke; +Cc: Vineet Gupta, GCC Patches



On 11/8/23 09:00, Joern Rennecke wrote:
> On Fri, 29 Sept 2023 at 14:54, Jeff Law<jeffreyalaw@gmail.com>  wrote:
>> ...  Joern  can you post a follow-up manual twiddle so
>> that other ports can follow your example and avoid this problem?
>>
>> THanks,
>>
>> jeff
> The attached patch makes the scan-assembler* directives ignore the LTO
> sections.
> 
> Regression tested (using QEMU) for
>      riscv-sim
>      riscv-sim/-march=rv32gcv_zfh/-mabi=ilp32d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
>      riscv-sim/-march=rv32imac/-mabi=ilp32
>      riscv-sim/-march=rv64gcv_zfh_zvfh_zba_zbb_zbc_zicond_zicboz_zawrs/-mabi=lp64d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
>      riscv-sim/-march=rv64imac/-mabi=lp64
> 
> 
> scanasm-diff-5.txt
> 
> 2023-11-08  Joern Rennecke<joern.rennecke@embecosm.com>
> 
> gcc/testsuite/
> 	* lib/scanasm.exp (scan-assembler-times): Disregard LTO sections.
> 	(scan-assembler-dem, scan-assembler-dem-not): Likewise.
> 	(dg-scan): Likewise, if name starts with scan-assembler.
> 	(scan-raw-assembler): New proc.
> 	* gcc.dg/pr61868.c: Use scan-raw-assembler.
> 	* gcc.dg/scantest-lto.c: New test.
> gcc/
> 	* doc/sourcebuild.texi (Scan the assembly output): Document change.
Looks reasonable to me. OK for the trunk.
jeff

^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2023-11-10  6:02 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-27  9:26 committed [RISC-V]: Harden test scan patterns Joern Rennecke
2023-09-27 17:22 ` Jeff Law
2023-09-27 18:22   ` Joern Rennecke
2023-09-27 20:14     ` Jeff Law
2023-09-27 22:12       ` Andrew Pinski
2023-09-27 23:21       ` Vineet Gupta
2023-09-29 13:54         ` Jeff Law
2023-09-30 21:12           ` Joern Rennecke
2023-10-11  4:48             ` Joern Rennecke
2023-10-11  7:12               ` Joern Rennecke
2023-11-08 15:14               ` Joern Rennecke
2023-11-08 16:00           ` RFA: make scan-assembler* ignore LTO sections (Was: Re: committed [RISC-V]: Harden test scan patterns) Joern Rennecke
2023-11-10  6:02             ` Jeff Law

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