* Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? [not found] ` <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com> @ 2024-01-04 13:50 ` Radek Barton 2024-01-04 19:11 ` Andrew Pinski 2024-01-09 19:37 ` Radek Barton 0 siblings, 2 replies; 15+ messages in thread From: Radek Barton @ 2024-01-04 13:50 UTC (permalink / raw) To: gcc-patches [-- Attachment #1.1: Type: text/plain, Size: 960 bytes --] Hello, everyone. Our "Arm64 on Windows Ecosystem" team is currently working on adding aarch64-w64-mingw32 target and we've noticed that recent commit adding SME support (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) is using .hidden and .size pseudo-ops that are not supported by this target yet. We'd like to hear your opinion what would be the most acceptable fix for the community: 1. Wrap the unsupported pseudo-ops using macros and #ifdef them for the target. The attached 0001-Ifdef-.hidden-and-.size-pseudo-ops-for-aarch64-w64-m.patch is demonstrating this option. 2. Move SME related sources to a separate config, t-sme, that won't be included by the aarch64-w64-mingw32 target config. The attached 0001-Exclude-SME-feature-from-libgcc-for-aarch64-w64-ming.patch by Evgeny Karpov is a proposal of this change. 3. Do you have any other proposal? Best regards, Radek Bartoň [-- Attachment #2: 0001-Exclude-SME-feature-from-libgcc-for-aarch64-w64-ming.patch --] [-- Type: application/octet-stream, Size: 5488 bytes --] From 31dcd57681d50e9ebec537a18714d3980479722e Mon Sep 17 00:00:00 2001 From: Evgeny Karpov <eukarpov@gmail.com> Date: Tue, 19 Dec 2023 09:47:48 +0100 Subject: [PATCH] Exclude SME feature from libgcc for `aarch64-w64-mingw32` target Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden` and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the `.hidden` and `.size` pseudo-ops though. This patch moves SME feature to a separate config file, `t-sme` that can be then excluded for the `aarch64-w64-mingw32` target. --- libgcc/config.host | 12 ++++++------ libgcc/config/aarch64/t-aarch64 | 10 ---------- libgcc/config/aarch64/t-sme | 28 ++++++++++++++++++++++++++++ 3 files changed, 34 insertions(+), 16 deletions(-) create mode 100644 libgcc/config/aarch64/t-sme diff --git a/libgcc/config.host b/libgcc/config.host index 017fbc7a06d..f8d513a7a38 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -414,7 +414,7 @@ aarch64*-*-elf | aarch64*-*-rtems*) extra_parts="$extra_parts crtfastmath.o" tmake_file="${tmake_file} ${cpu_type}/t-aarch64" tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp t-crtfm" tmake_file="${tmake_file} t-dfprules" md_unwind_header=aarch64/aarch64-unwind.h ;; @@ -422,21 +422,21 @@ aarch64*-*-freebsd*) extra_parts="$extra_parts crtfastmath.o" tmake_file="${tmake_file} ${cpu_type}/t-aarch64" tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp t-crtfm" tmake_file="${tmake_file} t-dfprules" md_unwind_header=aarch64/freebsd-unwind.h ;; aarch64*-*-netbsd*) extra_parts="$extra_parts crtfastmath.o" tmake_file="${tmake_file} ${cpu_type}/t-aarch64" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp t-crtfm" tmake_file="${tmake_file} t-dfprules" md_unwind_header=aarch64/aarch64-unwind.h ;; aarch64*-*-fuchsia*) tmake_file="${tmake_file} ${cpu_type}/t-aarch64" tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp" tmake_file="${tmake_file} t-dfprules" ;; aarch64*-*-linux*) @@ -444,7 +444,7 @@ aarch64*-*-linux*) md_unwind_header=aarch64/linux-unwind.h tmake_file="${tmake_file} ${cpu_type}/t-aarch64" tmake_file="${tmake_file} ${cpu_type}/t-lse t-slibgcc-libgcc" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp t-crtfm" tmake_file="${tmake_file} t-dfprules" tmake_file="${tmake_file} ${cpu_type}/t-heap-trampoline" ;; @@ -453,7 +453,7 @@ aarch64*-*-vxworks7*) md_unwind_header=aarch64/aarch64-unwind.h tmake_file="${tmake_file} ${cpu_type}/t-aarch64" tmake_file="${tmake_file} ${cpu_type}/t-lse" - tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp t-crtfm" + tmake_file="${tmake_file} ${cpu_type}/t-sme ${cpu_type}/t-softfp t-softfp t-crtfm" tmake_file="${tmake_file} t-dfprules" ;; alpha*-*-linux*) diff --git a/libgcc/config/aarch64/t-aarch64 b/libgcc/config/aarch64/t-aarch64 index b70e7b94edd..b622eee2746 100644 --- a/libgcc/config/aarch64/t-aarch64 +++ b/libgcc/config/aarch64/t-aarch64 @@ -20,13 +20,3 @@ LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c LIB2ADD += $(srcdir)/config/aarch64/cpuinfo.c - -# Add sme runtime to shared libgcc -LIB2ADDEH += \ - $(srcdir)/config/aarch64/__aarch64_have_sme.c \ - $(srcdir)/config/aarch64/__arm_sme_state.S \ - $(srcdir)/config/aarch64/__arm_tpidr2_restore.S \ - $(srcdir)/config/aarch64/__arm_tpidr2_save.S \ - $(srcdir)/config/aarch64/__arm_za_disable.S - -SHLIB_MAPFILES += $(srcdir)/config/aarch64/libgcc-sme.ver diff --git a/libgcc/config/aarch64/t-sme b/libgcc/config/aarch64/t-sme new file mode 100644 index 00000000000..ae9c3ab1907 --- /dev/null +++ b/libgcc/config/aarch64/t-sme @@ -0,0 +1,28 @@ +# Add sme runtime to shared libgcc for AArch64 architecture. +# Copyright (C) 2012-2023 Free Software Foundation, Inc. +# Contributed by ARM Ltd. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +LIB2ADDEH += \ + $(srcdir)/config/aarch64/__aarch64_have_sme.c \ + $(srcdir)/config/aarch64/__arm_sme_state.S \ + $(srcdir)/config/aarch64/__arm_tpidr2_restore.S \ + $(srcdir)/config/aarch64/__arm_tpidr2_save.S \ + $(srcdir)/config/aarch64/__arm_za_disable.S + +SHLIB_MAPFILES += $(srcdir)/config/aarch64/libgcc-sme.ver -- 2.43.0.windows.1 [-- Attachment #3: 0001-Ifdef-.hidden-and-.size-pseudo-ops-for-aarch64-w64-m.patch --] [-- Type: application/octet-stream, Size: 3719 bytes --] From a46f0a775b13d77dd56f42bf4b33867302e1f12e Mon Sep 17 00:00:00 2001 From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH] Ifdef `.hidden` and `.size` pseudo-ops for `aarch64-w64-mingw32` target Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden` and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the `.hidden` and `.size` pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__MINGW64__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 25 +++++++++++++++++++++-- 4 files changed, 29 insertions(+), 8 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..1fbb8c1ff53 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..2466b5863e4 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..c372fcffe18 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..dc7e0bc7a5c 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -83,16 +83,37 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) # endif #endif +#ifdef __MINGW64__ + #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ .balign align; \ name: \ .cfi_startproc; \ BTI_C -#define ENTRY(name) ENTRY_ALIGN(name, 16) +#define END(name) \ + .cfi_endproc; + +/* The hidden directive is invalid for COFF targets. */ +#define HIDDEN(f) + +#else + +#define ENTRY_ALIGN(name, align) \ + .global name; \ + .type name,%function; \ + .balign align; \ + name: \ + .cfi_startproc; \ + BTI_C #define END(name) \ .cfi_endproc; \ .size name, .-name + +#define HIDDEN(f) .hidden f + +#endif + +#define ENTRY(name) ENTRY_ALIGN(name, 16) \ No newline at end of file -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-04 13:50 ` Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? Radek Barton @ 2024-01-04 19:11 ` Andrew Pinski 2024-01-05 14:43 ` [EXTERNAL] " Radek Barton 2024-01-09 19:37 ` Radek Barton 1 sibling, 1 reply; 15+ messages in thread From: Andrew Pinski @ 2024-01-04 19:11 UTC (permalink / raw) To: Radek Barton, Andrew Pinski (QUIC); +Cc: gcc-patches On Thu, Jan 4, 2024 at 5:51 AM Radek Barton <radek.barton@microsoft.com> wrote: > > Hello, everyone. > > > Our "Arm64 on Windows Ecosystem" team is currently working on adding aarch64-w64-mingw32 target and we've noticed that recent commit adding SME support (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) is using .hidden and .size pseudo-ops that are not supported by this target yet. We'd like to hear your opinion what would be the most acceptable fix for the community: > > Wrap the unsupported pseudo-ops using macros and #ifdef them for the target. The attached 0001-Ifdef-.hidden-and-.size-pseudo-ops-for-aarch64-w64-m.patch is demonstrating this option. > Move SME related sources to a separate config, t-sme, that won't be included by the aarch64-w64-mingw32 target config. The attached 0001-Exclude-SME-feature-from-libgcc-for-aarch64-w64-ming.patch by Evgeny Karpov is a proposal of this change. > Do you have any other proposal? For the .type issue you should use the following define instead: ``` #ifdef __ELF__ #define TYPE(x) .type x,function #else #define TYPE(x) #endif ``` Which comes directly from config/aarch64/crti.S . HIDDEN should be handled similarly. We really should still have SME support for GCC for windows. Thanks, Andrew Pinski > > > Best regards, > > Radek Bartoň ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [EXTERNAL] Re: Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-04 19:11 ` Andrew Pinski @ 2024-01-05 14:43 ` Radek Barton 0 siblings, 0 replies; 15+ messages in thread From: Radek Barton @ 2024-01-05 14:43 UTC (permalink / raw) To: Andrew Pinski, Andrew Pinski (QUIC); +Cc: gcc-patches [-- Attachment #1.1: Type: text/plain, Size: 2476 bytes --] Hello, Andrew. Thank you for your input. I've updated the "fixing" patch according to your feedback. Please let me know if I understood it correctly. Radek ________________________________ From: Andrew Pinski <pinskia@gmail.com> Sent: Thursday, January 4, 2024 8:11 PM To: Radek Barton <radek.barton@microsoft.com>; Andrew Pinski (QUIC) <quic_apinski@quicinc.com> Cc: gcc-patches@gcc.gnu.org <gcc-patches@gcc.gnu.org> Subject: [EXTERNAL] Re: Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? [You don't often get email from pinskia@gmail.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] On Thu, Jan 4, 2024 at 5:51 AM Radek Barton <radek.barton@microsoft.com> wrote: > > Hello, everyone. > > > Our "Arm64 on Windows Ecosystem" team is currently working on adding aarch64-w64-mingw32 target and we've noticed that recent commit adding SME support (https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgcc.gnu.org%2Fpipermail%2Fgcc-cvs%2F2023-December%2F394915.html&data=05%7C02%7Cradek.barton%40microsoft.com%7C51df4d9506014407bc8908dc0d58eeac%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C638399922842775482%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=5%2FK9lrqVSFn35cxjmhyEnKpiArJEMcOp5BQbAr%2F3r1s%3D&reserved=0<https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html>) is using .hidden and .size pseudo-ops that are not supported by this target yet. We'd like to hear your opinion what would be the most acceptable fix for the community: > > Wrap the unsupported pseudo-ops using macros and #ifdef them for the target. The attached 0001-Ifdef-.hidden-and-.size-pseudo-ops-for-aarch64-w64-m.patch is demonstrating this option. > Move SME related sources to a separate config, t-sme, that won't be included by the aarch64-w64-mingw32 target config. The attached 0001-Exclude-SME-feature-from-libgcc-for-aarch64-w64-ming.patch by Evgeny Karpov is a proposal of this change. > Do you have any other proposal? For the .type issue you should use the following define instead: ``` #ifdef __ELF__ #define TYPE(x) .type x,function #else #define TYPE(x) #endif ``` Which comes directly from config/aarch64/crti.S . HIDDEN should be handled similarly. We really should still have SME support for GCC for windows. Thanks, Andrew Pinski > > > Best regards, > > Radek Bartoň [-- Attachment #2: 0001-Ifdef-.hidden-.type-and-.size-pseudo-ops-for-aarch64.patch --] [-- Type: application/octet-stream, Size: 4541 bytes --] From b3ae1edd4c309607b401b16378f58a6dc0ada7e7 Mon Sep 17 00:00:00 2001 From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- libgcc/config/aarch64/crti.S | 8 ++------ 5 files changed, 20 insertions(+), 14 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..1fbb8c1ff53 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..2466b5863e4 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..c372fcffe18 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..4e524812e4a 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -58,6 +58,16 @@ # define AUTIASP #endif +#ifdef __ELF__ +#define TYPE(x) .type x,function +#define HIDDEN(x) .hidden x +#define SIZE(x) .size x, .-x +#else +#define TYPE(x) +#define HIDDEN(x) +#define SIZE(x) +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ + TYPE(name); \ .balign align; \ name: \ .cfi_startproc; \ @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define END(name) \ .cfi_endproc; \ - .size name, .-name + SIZE(name) diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S index 1371967c196..02d96e32b5f 100644 --- a/libgcc/config/aarch64/crti.S +++ b/libgcc/config/aarch64/crti.S @@ -21,6 +21,8 @@ # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see # <http://www.gnu.org/licenses/>. +#include "aarch64-asm.h" + /* An executable stack is *not* required for these functions. */ #if defined(__ELF__) && defined(__linux__) .section .note.GNU-stack,"",%progbits @@ -31,12 +33,6 @@ # .init sections. Users may put any desired instructions in those # sections. -#ifdef __ELF__ -#define TYPE(x) .type x,function -#else -#define TYPE(x) -#endif - # Note - this macro is complemented by the FUNC_END macro # in crtn.S. If you change this macro you must also change # that macro match. -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-04 13:50 ` Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? Radek Barton 2024-01-04 19:11 ` Andrew Pinski @ 2024-01-09 19:37 ` Radek Barton 2024-01-10 8:49 ` Jonathan Yong 2024-01-11 13:08 ` Richard Sandiford 1 sibling, 2 replies; 15+ messages in thread From: Radek Barton @ 2024-01-09 19:37 UTC (permalink / raw) To: gcc-patches; +Cc: pinskia, richard.sandiford, 10walls [-- Attachment #1: Type: text/plain, Size: 532 bytes --] Hello. I forgot to add the target maintainers to the CC. My apologies for that. Furthermore, I am adding also relevant changes in `libgcc/config/aarch64/lse.S` file to the patch. Originally we wanted to submit those changes separately but after the feedback from Andrew Pinski, it makes sense to add them here. I needed to rename `HIDDEN`, `TYPE`, and `SIZE` macros to `HIDDEN_PO`, `TYPE_PO`, and `SIZE_PO` (pseudo-op) because there is a collision with other macro named `SIZE` in the `lse.S` file. Best regards, Radek [-- Attachment #2: v3-0001-Ifdef-.hidden-.type-and-.size-pseudo-ops-for-aarc.patch --] [-- Type: application/octet-stream, Size: 6340 bytes --] From eb30feb218f122db8d8d8970e7e1d6d1514ab6c4 Mon Sep 17 00:00:00 2001 In-Reply-To: <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com> References: <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com> From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH v3] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target Cc: Andrew Pinski <pinskia@gmail.com>, Richard Sandiford <richard.sandiford@arm.com>, Jonathan Yong <10walls@gmail.com> Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- libgcc/config/aarch64/crti.S | 12 ++++-------- libgcc/config/aarch64/lse.S | 9 +++++---- 6 files changed, 27 insertions(+), 20 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..8658da5dfa7 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..739694ed189 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN_PO (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..95eae3ea958 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN_PO (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN_PO (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..dbb81b4be6b 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -58,6 +58,16 @@ # define AUTIASP #endif +#ifdef __ELF__ +#define TYPE_PO(x) .type x,function +#define HIDDEN_PO(x) .hidden x +#define SIZE_PO(x) .size x, .-x +#else +#define TYPE_PO(x) +#define HIDDEN_PO(x) +#define SIZE_PO(x) +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ + TYPE_PO(name); \ .balign align; \ name: \ .cfi_startproc; \ @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define END(name) \ .cfi_endproc; \ - .size name, .-name + SIZE_PO(name) diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S index 1371967c196..ed87a2ad696 100644 --- a/libgcc/config/aarch64/crti.S +++ b/libgcc/config/aarch64/crti.S @@ -21,6 +21,8 @@ # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see # <http://www.gnu.org/licenses/>. +#include "aarch64-asm.h" + /* An executable stack is *not* required for these functions. */ #if defined(__ELF__) && defined(__linux__) .section .note.GNU-stack,"",%progbits @@ -31,12 +33,6 @@ # .init sections. Users may put any desired instructions in those # sections. -#ifdef __ELF__ -#define TYPE(x) .type x,function -#else -#define TYPE(x) -#endif - # Note - this macro is complemented by the FUNC_END macro # in crtn.S. If you change this macro you must also change # that macro match. @@ -53,7 +49,7 @@ .section ".init" .align 2 .global _init - TYPE(_init) + TYPE_PO(_init) _init: FUNC_START @@ -61,7 +57,7 @@ _init: .section ".fini" .align 2 .global _fini - TYPE(_fini) + TYPE_PO(_fini) _fini: FUNC_START diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index 671a86cfb87..af55ef88098 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -51,6 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * indirectly, they do not need to start with a BTI instruction. */ +#include "aarch64-asm.h" #include "auto-target.h" /* Tell the assembler to accept LSE instructions. */ @@ -61,7 +62,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #endif /* Declare the symbol gating the LSE implementations. */ - .hidden __aarch64_have_lse_atomics + HIDDEN_PO(__aarch64_have_lse_atomics) /* Turn size and memory model defines into mnemonic fragments. */ #if SIZE == 1 @@ -171,15 +172,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see .text .balign 16 .globl \name - .hidden \name - .type \name, %function + HIDDEN_PO(\name) + TYPE_PO(\name) .cfi_startproc \name: .endm .macro ENDFN name .cfi_endproc - .size \name, . - \name + SIZE_PO(\name) .endm /* Branch to LABEL if LSE is disabled. */ -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-09 19:37 ` Radek Barton @ 2024-01-10 8:49 ` Jonathan Yong 2024-01-10 9:02 ` Iain Sandoe 2024-01-11 13:08 ` Richard Sandiford 1 sibling, 1 reply; 15+ messages in thread From: Jonathan Yong @ 2024-01-10 8:49 UTC (permalink / raw) To: Radek Barton, gcc-patches; +Cc: pinskia, richard.sandiford On 1/9/24 19:37, Radek Barton wrote: > Hello. > > I forgot to add the target maintainers to the CC. My apologies for that. > > Furthermore, I am adding also relevant changes in `libgcc/config/aarch64/lse.S` file to the patch. Originally we wanted to submit those changes separately but after the feedback from Andrew Pinski, it makes sense to add them here. I needed to rename `HIDDEN`, `TYPE`, and `SIZE` macros to `HIDDEN_PO`, `TYPE_PO`, and `SIZE_PO` (pseudo-op) because there is a collision with other macro named `SIZE` in the `lse.S` file. > > Best regards, > > Radek Looks fine to me, but is __ELF__ correct? I am not familiar with pseudo-ops, OK if it is ELF specific when PE is targeted. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-10 8:49 ` Jonathan Yong @ 2024-01-10 9:02 ` Iain Sandoe 2024-01-10 9:13 ` Iain Sandoe 0 siblings, 1 reply; 15+ messages in thread From: Iain Sandoe @ 2024-01-10 9:02 UTC (permalink / raw) To: Jonathan Yong; +Cc: Radek Barton, GCC Patches, pinskia, Richard Sandiford > On 10 Jan 2024, at 08:49, Jonathan Yong <10walls@gmail.com> wrote: > > On 1/9/24 19:37, Radek Barton wrote: >> Hello. >> I forgot to add the target maintainers to the CC. My apologies for that. >> Furthermore, I am adding also relevant changes in `libgcc/config/aarch64/lse.S` file to the patch. Originally we wanted to submit those changes separately but after the feedback from Andrew Pinski, it makes sense to add them here. I needed to rename `HIDDEN`, `TYPE`, and `SIZE` macros to `HIDDEN_PO`, `TYPE_PO`, and `SIZE_PO` (pseudo-op) because there is a collision with other macro named `SIZE` in the `lse.S` file. >> Best regards, >> Radek > > Looks fine to me, but is __ELF__ correct? I am not familiar with pseudo-ops, OK if it is ELF specific when PE is targeted. > I suspect that, the end, we really need to generalize this so that ELF, XCOFF, Mach-O etc. are handled. In other places in the tree, typically an “asm.h” (or similar name) is included which contains macros that adjust: global symbol local symbol type size (and sometimes .cfi_xxxx-related) Then the asm sources are adjusted to use those macros throughout, which means that they build correctly for the different object file formats. You should be able to find a suitable example in other ports which could be updated to cater for aarch64-specific cases. 0.02GBP only, ( I do not have cycles to tackle this myself right now, although I have temporary workarounds in my Darwin branch) Iain ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-10 9:02 ` Iain Sandoe @ 2024-01-10 9:13 ` Iain Sandoe 2024-01-10 10:32 ` [EXTERNAL] " Radek Barton 0 siblings, 1 reply; 15+ messages in thread From: Iain Sandoe @ 2024-01-10 9:13 UTC (permalink / raw) To: Jonathan Yong, Radek Barton; +Cc: GCC Patches, pinskia, Richard Sandiford > On 10 Jan 2024, at 09:02, Iain Sandoe <idsandoe@googlemail.com> wrote: >> On 10 Jan 2024, at 08:49, Jonathan Yong <10walls@gmail.com> wrote: >> >> On 1/9/24 19:37, Radek Barton wrote: >>> Hello. >>> I forgot to add the target maintainers to the CC. My apologies for that. >>> Furthermore, I am adding also relevant changes in `libgcc/config/aarch64/lse.S` file to the patch. Originally we wanted to submit those changes separately but after the feedback from Andrew Pinski, it makes sense to add them here. I needed to rename `HIDDEN`, `TYPE`, and `SIZE` macros to `HIDDEN_PO`, `TYPE_PO`, and `SIZE_PO` (pseudo-op) because there is a collision with other macro named `SIZE` in the `lse.S` file. >>> Best regards, >>> Radek >> >> Looks fine to me, but is __ELF__ correct? I am not familiar with pseudo-ops, OK if it is ELF specific when PE is targeted. >> > > I suspect that, the end, we really need to generalize this so that ELF, XCOFF, Mach-O etc. are handled. In other places in the tree, typically an “asm.h” (or similar name) is included which contains macros that adjust: > > global symbol > local symbol > type > size > > (and sometimes .cfi_xxxx-related) > > Then the asm sources are adjusted to use those macros throughout, which means that they build correctly for the different object file formats. > > You should be able to find a suitable example in other ports which could be updated to cater for aarch64-specific cases. duh, I was not looking hard enough - it seems that there is already such a file libgcc/config/aarch64/aarch64-asm.h It has just not been used in the SME stuff. Iain ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [EXTERNAL] Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-10 9:13 ` Iain Sandoe @ 2024-01-10 10:32 ` Radek Barton 0 siblings, 0 replies; 15+ messages in thread From: Radek Barton @ 2024-01-10 10:32 UTC (permalink / raw) To: Iain Sandoe, Jonathan Yong; +Cc: GCC Patches, pinskia, Richard Sandiford Originally we've used `!__MINGW64__` but changed it to `__ELF__` upon feedback received. Should I change it back to `!__MINGW64__`? Or introduce '__COFF__' and then use `!__COFF__`? What would be the minimal acceptable change? we are currently probably not able to provide that generic solution as has Iain Sandoe implied. Note that we have moved the pseudo-ops wrapper macros to the `libgcc/config/aarch64/aarch64-asm.h` file already. Thank you all for your valuable feedback. Radek ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-09 19:37 ` Radek Barton 2024-01-10 8:49 ` Jonathan Yong @ 2024-01-11 13:08 ` Richard Sandiford 2024-01-15 16:07 ` Radek Barton 1 sibling, 1 reply; 15+ messages in thread From: Richard Sandiford @ 2024-01-11 13:08 UTC (permalink / raw) To: Radek Barton; +Cc: gcc-patches, pinskia, 10walls Radek Barton <radek.barton@microsoft.com> writes: > Hello. > > I forgot to add the target maintainers to the CC. My apologies for that. > > Furthermore, I am adding also relevant changes in `libgcc/config/aarch64/lse.S` file to the patch. Originally we wanted to submit those changes separately but after the feedback from Andrew Pinski, it makes sense to add them here. I needed to rename `HIDDEN`, `TYPE`, and `SIZE` macros to `HIDDEN_PO`, `TYPE_PO`, and `SIZE_PO` (pseudo-op) because there is a collision with other macro named `SIZE` in the `lse.S` file. How about avoiding the clash by using the names HIDDEN, SYMBOL_TYPE and SYMBOL_SIZE, with SYMBOL_TYPE taking the symbol type as argument? What's the practical effect of not marking the symbols as hidden on mingw32? Will they still be local to the DLL/EXE, since they haven't been explicitly exported? (Sorry for the probably dumb question.) SME support for mingw32 will be limited until __aarch64_have_sme.c is ported to Windows. Until then, __aarch64_have_sme will just reflect the --with-cpu/arch default. But that obviously doesn't need to be fixed at the same time, just saying for the record. Thanks, Richard > > Best regards, > > Radek > > From eb30feb218f122db8d8d8970e7e1d6d1514ab6c4 Mon Sep 17 00:00:00 2001 > In-Reply-To: <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com> > References: <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com> > From: Zac Walker <zacwalker@microsoft.com> > Date: Wed, 3 Jan 2024 20:21:04 +0100 > Subject: [PATCH v3] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for > `aarch64-w64-mingw32` target > Cc: Andrew Pinski <pinskia@gmail.com>, > Richard Sandiford <richard.sandiford@arm.com>, > Jonathan Yong <10walls@gmail.com> > > Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. > --- > libgcc/config/aarch64/__arm_sme_state.S | 2 +- > libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- > libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- > libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- > libgcc/config/aarch64/crti.S | 12 ++++-------- > libgcc/config/aarch64/lse.S | 9 +++++---- > 6 files changed, 27 insertions(+), 20 deletions(-) > > diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S > index 0da9b585b6c..8658da5dfa7 100644 > --- a/libgcc/config/aarch64/__arm_sme_state.S > +++ b/libgcc/config/aarch64/__arm_sme_state.S > @@ -30,7 +30,7 @@ > - Takes no argument. > - Returns SME state in x0 and TPIDR2_EL0 in x1. */ > > -.hidden __aarch64_have_sme > +HIDDEN_PO (__aarch64_have_sme) > > variant_pcs (__arm_sme_state) > > diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S > index 9135cba1ddb..739694ed189 100644 > --- a/libgcc/config/aarch64/__arm_tpidr2_save.S > +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S > @@ -31,7 +31,7 @@ > - Does not return a value. > - Can abort on failure (then registers are not preserved). */ > > -.hidden __aarch64_have_sme > +HIDDEN_PO (__aarch64_have_sme) > > variant_pcs (__arm_tpidr2_save) > > @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) > > /* Hidden alias used by __arm_za_disable. */ > .global __libgcc_arm_tpidr2_save > -.hidden __libgcc_arm_tpidr2_save > +HIDDEN_PO (__libgcc_arm_tpidr2_save) > .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save > diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S > index 5785a959e22..95eae3ea958 100644 > --- a/libgcc/config/aarch64/__arm_za_disable.S > +++ b/libgcc/config/aarch64/__arm_za_disable.S > @@ -31,9 +31,9 @@ > - Does not return a value. > - Can abort on failure (then registers are not preserved). */ > > -.hidden __aarch64_have_sme > +HIDDEN_PO (__aarch64_have_sme) > > -.hidden __libgcc_arm_tpidr2_save > +HIDDEN_PO (__libgcc_arm_tpidr2_save) > > variant_pcs (__arm_za_disable) > > @@ -66,5 +66,5 @@ END (__arm_za_disable) > > /* Hidden alias used by the unwinder. */ > .global __libgcc_arm_za_disable > -.hidden __libgcc_arm_za_disable > +HIDDEN_PO (__libgcc_arm_za_disable) > .set __libgcc_arm_za_disable, __arm_za_disable > diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h > index 24568429b5c..dbb81b4be6b 100644 > --- a/libgcc/config/aarch64/aarch64-asm.h > +++ b/libgcc/config/aarch64/aarch64-asm.h > @@ -58,6 +58,16 @@ > # define AUTIASP > #endif > > +#ifdef __ELF__ > +#define TYPE_PO(x) .type x,function > +#define HIDDEN_PO(x) .hidden x > +#define SIZE_PO(x) .size x, .-x > +#else > +#define TYPE_PO(x) > +#define HIDDEN_PO(x) > +#define SIZE_PO(x) > +#endif > + > /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ > #define GNU_PROPERTY(type, value) \ > .section .note.gnu.property, "a"; \ > @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) > > #define ENTRY_ALIGN(name, align) \ > .global name; \ > - .type name,%function; \ > + TYPE_PO(name); \ > .balign align; \ > name: \ > .cfi_startproc; \ > @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) > > #define END(name) \ > .cfi_endproc; \ > - .size name, .-name > + SIZE_PO(name) > diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S > index 1371967c196..ed87a2ad696 100644 > --- a/libgcc/config/aarch64/crti.S > +++ b/libgcc/config/aarch64/crti.S > @@ -21,6 +21,8 @@ > # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > # <http://www.gnu.org/licenses/>. > > +#include "aarch64-asm.h" > + > /* An executable stack is *not* required for these functions. */ > #if defined(__ELF__) && defined(__linux__) > .section .note.GNU-stack,"",%progbits > @@ -31,12 +33,6 @@ > # .init sections. Users may put any desired instructions in those > # sections. > > -#ifdef __ELF__ > -#define TYPE(x) .type x,function > -#else > -#define TYPE(x) > -#endif > - > # Note - this macro is complemented by the FUNC_END macro > # in crtn.S. If you change this macro you must also change > # that macro match. > @@ -53,7 +49,7 @@ > .section ".init" > .align 2 > .global _init > - TYPE(_init) > + TYPE_PO(_init) > _init: > FUNC_START > > @@ -61,7 +57,7 @@ _init: > .section ".fini" > .align 2 > .global _fini > - TYPE(_fini) > + TYPE_PO(_fini) > _fini: > FUNC_START > > diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S > index 671a86cfb87..af55ef88098 100644 > --- a/libgcc/config/aarch64/lse.S > +++ b/libgcc/config/aarch64/lse.S > @@ -51,6 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > * indirectly, they do not need to start with a BTI instruction. > */ > > +#include "aarch64-asm.h" > #include "auto-target.h" > > /* Tell the assembler to accept LSE instructions. */ > @@ -61,7 +62,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > #endif > > /* Declare the symbol gating the LSE implementations. */ > - .hidden __aarch64_have_lse_atomics > + HIDDEN_PO(__aarch64_have_lse_atomics) > > /* Turn size and memory model defines into mnemonic fragments. */ > #if SIZE == 1 > @@ -171,15 +172,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see > .text > .balign 16 > .globl \name > - .hidden \name > - .type \name, %function > + HIDDEN_PO(\name) > + TYPE_PO(\name) > .cfi_startproc > \name: > .endm > > .macro ENDFN name > .cfi_endproc > - .size \name, . - \name > + SIZE_PO(\name) > .endm > > /* Branch to LABEL if LSE is disabled. */ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-11 13:08 ` Richard Sandiford @ 2024-01-15 16:07 ` Radek Barton 2024-01-15 17:21 ` Radek Barton 2024-01-23 15:35 ` Richard Sandiford 0 siblings, 2 replies; 15+ messages in thread From: Radek Barton @ 2024-01-15 16:07 UTC (permalink / raw) To: Richard Sandiford; +Cc: gcc-patches, pinskia, 10walls [-- Attachment #1: Type: text/plain, Size: 598 bytes --] Hello Richard. Thank you for your suggestion. I am sending a patch update according to it. > How about avoiding the clash by using the names HIDDEN, SYMBOL_TYPE and > SYMBOL_SIZE, with SYMBOL_TYPE taking the symbol type as argument? Yes, unless the symbol is explicitly exported using `__declspec(dllexport)`, it will be effectively hidden. > What's the practical effect of not marking the symbols as hidden on > mingw32? Will they still be local to the DLL/EXE, since they haven't >been explicitly exported? (Sorry for the probably dumb question.) Best regards, Radek Bartoň [-- Attachment #2: v4-0001-Ifdef-.hidden-.type-and-.size-pseudo-ops-for-aarc.patch --] [-- Type: application/octet-stream, Size: 6281 bytes --] From eb30feb218f122db8d8d8970e7e1d6d1514ab6c4 Mon Sep 17 00:00:00 2001 In-Reply-To: <mptsf34rpad.fsf@arm.com> References: <mptsf34rpad.fsf@arm.com> From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH v4] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target Cc: Andrew Pinski <pinskia@gmail.com>, Richard Sandiford <richard.sandiford@arm.com>, Jonathan Yong <10walls@gmail.com>, Richard Sandiford <richard.sandiford@arm.com> Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- libgcc/config/aarch64/crti.S | 12 ++++-------- libgcc/config/aarch64/lse.S | 9 +++++---- 6 files changed, 27 insertions(+), 20 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..8658da5dfa7 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..739694ed189 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN_PO (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..95eae3ea958 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN_PO (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN_PO (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN_PO (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..dbb81b4be6b 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -58,6 +58,16 @@ # define AUTIASP #endif +#ifdef __ELF__ +#define TYPE_PO(x) .type x,function +#define HIDDEN_PO(x) .hidden x +#define SIZE_PO(x) .size x, .-x +#else +#define TYPE_PO(x) +#define HIDDEN_PO(x) +#define SIZE_PO(x) +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ + TYPE_PO(name); \ .balign align; \ name: \ .cfi_startproc; \ @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define END(name) \ .cfi_endproc; \ - .size name, .-name + SIZE_PO(name) diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S index 1371967c196..ed87a2ad696 100644 --- a/libgcc/config/aarch64/crti.S +++ b/libgcc/config/aarch64/crti.S @@ -21,6 +21,8 @@ # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see # <http://www.gnu.org/licenses/>. +#include "aarch64-asm.h" + /* An executable stack is *not* required for these functions. */ #if defined(__ELF__) && defined(__linux__) .section .note.GNU-stack,"",%progbits @@ -31,12 +33,6 @@ # .init sections. Users may put any desired instructions in those # sections. -#ifdef __ELF__ -#define TYPE(x) .type x,function -#else -#define TYPE(x) -#endif - # Note - this macro is complemented by the FUNC_END macro # in crtn.S. If you change this macro you must also change # that macro match. @@ -53,7 +49,7 @@ .section ".init" .align 2 .global _init - TYPE(_init) + TYPE_PO(_init) _init: FUNC_START @@ -61,7 +57,7 @@ _init: .section ".fini" .align 2 .global _fini - TYPE(_fini) + TYPE_PO(_fini) _fini: FUNC_START diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index 671a86cfb87..af55ef88098 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -51,6 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * indirectly, they do not need to start with a BTI instruction. */ +#include "aarch64-asm.h" #include "auto-target.h" /* Tell the assembler to accept LSE instructions. */ @@ -61,7 +62,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #endif /* Declare the symbol gating the LSE implementations. */ - .hidden __aarch64_have_lse_atomics + HIDDEN_PO(__aarch64_have_lse_atomics) /* Turn size and memory model defines into mnemonic fragments. */ #if SIZE == 1 @@ -171,15 +172,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see .text .balign 16 .globl \name - .hidden \name - .type \name, %function + HIDDEN_PO(\name) + TYPE_PO(\name) .cfi_startproc \name: .endm .macro ENDFN name .cfi_endproc - .size \name, . - \name + SIZE_PO(\name) .endm /* Branch to LABEL if LSE is disabled. */ -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-15 16:07 ` Radek Barton @ 2024-01-15 17:21 ` Radek Barton 2024-01-18 12:06 ` Radek Barton ` (2 more replies) 2024-01-23 15:35 ` Richard Sandiford 1 sibling, 3 replies; 15+ messages in thread From: Radek Barton @ 2024-01-15 17:21 UTC (permalink / raw) To: Richard Sandiford; +Cc: gcc-patches, pinskia, 10walls [-- Attachment #1: Type: text/plain, Size: 26 bytes --] Wrong attachment, sorry. [-- Attachment #2: v4-0001-Ifdef-.hidden-.type-and-.size-pseudo-ops-for-aarc.patch --] [-- Type: application/octet-stream, Size: 6375 bytes --] From 1a896c6b43a57b29fa0bc4d32aa86d7e28b824da Mon Sep 17 00:00:00 2001 In-Reply-To: <mptsf34rpad.fsf@arm.com> References: <mptsf34rpad.fsf@arm.com> From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH v4] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target Cc: Andrew Pinski <pinskia@gmail.com>, Richard Sandiford <richard.sandiford@arm.com>, Jonathan Yong <10walls@gmail.com>, Richard Sandiford <richard.sandiford@arm.com> Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- libgcc/config/aarch64/crti.S | 12 ++++-------- libgcc/config/aarch64/lse.S | 9 +++++---- 6 files changed, 27 insertions(+), 20 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..1fbb8c1ff53 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..2466b5863e4 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..c372fcffe18 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..83c2e5944b3 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -58,6 +58,16 @@ # define AUTIASP #endif +#ifdef __ELF__ +#define HIDDEN(name) .hidden name +#define SYMBOL_SIZE(name) .size name, .-name +#define SYMBOL_TYPE(name, _type) .type name, _type +#else +#define HIDDEN(name) +#define SYMBOL_SIZE(name) +#define SYMBOL_TYPE(name, _type) +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ + SYMBOL_TYPE(name, %function); \ .balign align; \ name: \ .cfi_startproc; \ @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define END(name) \ .cfi_endproc; \ - .size name, .-name + SYMBOL_SIZE(name) diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S index 1371967c196..b6805b86421 100644 --- a/libgcc/config/aarch64/crti.S +++ b/libgcc/config/aarch64/crti.S @@ -21,6 +21,8 @@ # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see # <http://www.gnu.org/licenses/>. +#include "aarch64-asm.h" + /* An executable stack is *not* required for these functions. */ #if defined(__ELF__) && defined(__linux__) .section .note.GNU-stack,"",%progbits @@ -31,12 +33,6 @@ # .init sections. Users may put any desired instructions in those # sections. -#ifdef __ELF__ -#define TYPE(x) .type x,function -#else -#define TYPE(x) -#endif - # Note - this macro is complemented by the FUNC_END macro # in crtn.S. If you change this macro you must also change # that macro match. @@ -53,7 +49,7 @@ .section ".init" .align 2 .global _init - TYPE(_init) + SYMBOL_TYPE(_init, function) _init: FUNC_START @@ -61,7 +57,7 @@ _init: .section ".fini" .align 2 .global _fini - TYPE(_fini) + SYMBOL_TYPE(_fini, function) _fini: FUNC_START diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index 671a86cfb87..cee1e88c6a4 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -51,6 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * indirectly, they do not need to start with a BTI instruction. */ +#include "aarch64-asm.h" #include "auto-target.h" /* Tell the assembler to accept LSE instructions. */ @@ -61,7 +62,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #endif /* Declare the symbol gating the LSE implementations. */ - .hidden __aarch64_have_lse_atomics + HIDDEN(__aarch64_have_lse_atomics) /* Turn size and memory model defines into mnemonic fragments. */ #if SIZE == 1 @@ -171,15 +172,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see .text .balign 16 .globl \name - .hidden \name - .type \name, %function + HIDDEN(\name) + SYMBOL_TYPE(\name, %function) .cfi_startproc \name: .endm .macro ENDFN name .cfi_endproc - .size \name, . - \name + SYMBOL_SIZE(\name) .endm /* Branch to LABEL if LSE is disabled. */ -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-15 17:21 ` Radek Barton @ 2024-01-18 12:06 ` Radek Barton 2024-01-25 17:46 ` Szabolcs Nagy 2024-01-25 17:51 ` Szabolcs Nagy 2 siblings, 0 replies; 15+ messages in thread From: Radek Barton @ 2024-01-18 12:06 UTC (permalink / raw) To: Richard Sandiford; +Cc: gcc-patches, pinskia, 10walls Are there any further comments or suggestions, please? What needs to be done to merge this change? (Note we don't have merge rights). Thank you. Radek ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-15 17:21 ` Radek Barton 2024-01-18 12:06 ` Radek Barton @ 2024-01-25 17:46 ` Szabolcs Nagy 2024-01-25 17:51 ` Szabolcs Nagy 2 siblings, 0 replies; 15+ messages in thread From: Szabolcs Nagy @ 2024-01-25 17:46 UTC (permalink / raw) To: Radek Barton; +Cc: Richard Sandiford, gcc-patches, pinskia, 10walls [-- Attachment #1: Type: text/plain, Size: 42 bytes --] The 01/15/2024 17:21, Radek Barton wrote: [-- Attachment #2: v4-0001-Ifdef-.hidden-.type-and-.size-pseudo-ops-for-aarc.patch --] [-- Type: application/octet-stream, Size: 6375 bytes --] From 1a896c6b43a57b29fa0bc4d32aa86d7e28b824da Mon Sep 17 00:00:00 2001 In-Reply-To: <mptsf34rpad.fsf@arm.com> References: <mptsf34rpad.fsf@arm.com> From: Zac Walker <zacwalker@microsoft.com> Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH v4] Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target Cc: Andrew Pinski <pinskia@gmail.com>, Richard Sandiford <richard.sandiford@arm.com>, Jonathan Yong <10walls@gmail.com>, Richard Sandiford <richard.sandiford@arm.com> Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 14 ++++++++++++-- libgcc/config/aarch64/crti.S | 12 ++++-------- libgcc/config/aarch64/lse.S | 9 +++++---- 6 files changed, 27 insertions(+), 20 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..1fbb8c1ff53 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..2466b5863e4 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..c372fcffe18 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..83c2e5944b3 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -58,6 +58,16 @@ # define AUTIASP #endif +#ifdef __ELF__ +#define HIDDEN(name) .hidden name +#define SYMBOL_SIZE(name) .size name, .-name +#define SYMBOL_TYPE(name, _type) .type name, _type +#else +#define HIDDEN(name) +#define SYMBOL_SIZE(name) +#define SYMBOL_TYPE(name, _type) +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -85,7 +95,7 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ + SYMBOL_TYPE(name, %function); \ .balign align; \ name: \ .cfi_startproc; \ @@ -95,4 +105,4 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) #define END(name) \ .cfi_endproc; \ - .size name, .-name + SYMBOL_SIZE(name) diff --git a/libgcc/config/aarch64/crti.S b/libgcc/config/aarch64/crti.S index 1371967c196..b6805b86421 100644 --- a/libgcc/config/aarch64/crti.S +++ b/libgcc/config/aarch64/crti.S @@ -21,6 +21,8 @@ # see the files COPYING3 and COPYING.RUNTIME respectively. If not, see # <http://www.gnu.org/licenses/>. +#include "aarch64-asm.h" + /* An executable stack is *not* required for these functions. */ #if defined(__ELF__) && defined(__linux__) .section .note.GNU-stack,"",%progbits @@ -31,12 +33,6 @@ # .init sections. Users may put any desired instructions in those # sections. -#ifdef __ELF__ -#define TYPE(x) .type x,function -#else -#define TYPE(x) -#endif - # Note - this macro is complemented by the FUNC_END macro # in crtn.S. If you change this macro you must also change # that macro match. @@ -53,7 +49,7 @@ .section ".init" .align 2 .global _init - TYPE(_init) + SYMBOL_TYPE(_init, function) _init: FUNC_START @@ -61,7 +57,7 @@ _init: .section ".fini" .align 2 .global _fini - TYPE(_fini) + SYMBOL_TYPE(_fini, function) _fini: FUNC_START diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index 671a86cfb87..cee1e88c6a4 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -51,6 +51,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see * indirectly, they do not need to start with a BTI instruction. */ +#include "aarch64-asm.h" #include "auto-target.h" /* Tell the assembler to accept LSE instructions. */ @@ -61,7 +62,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #endif /* Declare the symbol gating the LSE implementations. */ - .hidden __aarch64_have_lse_atomics + HIDDEN(__aarch64_have_lse_atomics) /* Turn size and memory model defines into mnemonic fragments. */ #if SIZE == 1 @@ -171,15 +172,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see .text .balign 16 .globl \name - .hidden \name - .type \name, %function + HIDDEN(\name) + SYMBOL_TYPE(\name, %function) .cfi_startproc \name: .endm .macro ENDFN name .cfi_endproc - .size \name, . - \name + SYMBOL_SIZE(\name) .endm /* Branch to LABEL if LSE is disabled. */ -- 2.43.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-15 17:21 ` Radek Barton 2024-01-18 12:06 ` Radek Barton 2024-01-25 17:46 ` Szabolcs Nagy @ 2024-01-25 17:51 ` Szabolcs Nagy 2 siblings, 0 replies; 15+ messages in thread From: Szabolcs Nagy @ 2024-01-25 17:51 UTC (permalink / raw) To: Radek Barton, Richard Sandiford; +Cc: gcc-patches, pinskia, 10walls this patch added double notes on crt*.o and lse derived objects. (which does not seem to cause build break but some linkers may not like it) after #include "aarch64-asm.h" all gnu-stack and gnu-property related stuff should be removed since the header takes care of it. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? 2024-01-15 16:07 ` Radek Barton 2024-01-15 17:21 ` Radek Barton @ 2024-01-23 15:35 ` Richard Sandiford 1 sibling, 0 replies; 15+ messages in thread From: Richard Sandiford @ 2024-01-23 15:35 UTC (permalink / raw) To: Radek Barton; +Cc: gcc-patches, pinskia, 10walls Radek Barton <radek.barton@microsoft.com> writes: > Hello Richard. > > Thank you for your suggestion. I am sending a patch update according to it. > >> How about avoiding the clash by using the names HIDDEN, SYMBOL_TYPE and >> SYMBOL_SIZE, with SYMBOL_TYPE taking the symbol type as argument? > > Yes, unless the symbol is explicitly exported using `__declspec(dllexport)`, it will be effectively hidden. > >> What's the practical effect of not marking the symbols as hidden on >> mingw32? Will they still be local to the DLL/EXE, since they haven't >>been explicitly exported? (Sorry for the probably dumb question.) Thanks for the updated patch and sorry for the slow reply -- I was away last week. I've now pushed the patch after testing on aarch64-linux-gnu. Richard ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2024-01-25 17:52 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <PR3PR83MB0459E41CA2C7CF4A233A2DA492672@PR3PR83MB0459.EURPRD83.prod.outlook.com>
[not found] ` <PR3PR83MB0459CD0B388EC092D67DCF9E92672@PR3PR83MB0459.EURPRD83.prod.outlook.com>
2024-01-04 13:50 ` Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target? Radek Barton
2024-01-04 19:11 ` Andrew Pinski
2024-01-05 14:43 ` [EXTERNAL] " Radek Barton
2024-01-09 19:37 ` Radek Barton
2024-01-10 8:49 ` Jonathan Yong
2024-01-10 9:02 ` Iain Sandoe
2024-01-10 9:13 ` Iain Sandoe
2024-01-10 10:32 ` [EXTERNAL] " Radek Barton
2024-01-11 13:08 ` Richard Sandiford
2024-01-15 16:07 ` Radek Barton
2024-01-15 17:21 ` Radek Barton
2024-01-18 12:06 ` Radek Barton
2024-01-25 17:46 ` Szabolcs Nagy
2024-01-25 17:51 ` Szabolcs Nagy
2024-01-23 15:35 ` Richard Sandiford
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).